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Searched refs:DE4X5_MII (Results 1 – 6 of 6) sorted by relevance

/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/net/ethernet/dec/tulip/
H A Dde4x5.h28 #define DE4X5_MII iobase+(0x048 << lp->bus) /* MII Interface Register */ macro
925 mii_wr(MII_CR_10|(lp->fdx?MII_CR_FDM:0), MII_CR, lp->phy[lp->active].addr, DE4X5_MII);\
947 mii_wr(mii_rd(0x18, lp->phy[lp->active].addr, DE4X5_MII) & ~0x2000,\
948 0x18, lp->phy[lp->active].addr, DE4X5_MII);\
951 sr = mii_rd(MII_SR, lp->phy[lp->active].addr, DE4X5_MII);\
954 mii_wr(MII_CR_100|(fdx?MII_CR_FDM:0), MII_CR, lp->phy[lp->active].addr, DE4X5_MII);\
975 mii_wr(MII_CR_100|MII_CR_ASSE, MII_CR, lp->phy[lp->active].addr, DE4X5_MII);\
H A Dde4x5.c2771 mii_wr(ana, MII_ANA, lp->phy[lp->active].addr, DE4X5_MII); in dc21140m_autoconf()
2784 mii_wr(ana, MII_ANA, lp->phy[lp->active].addr, DE4X5_MII); in dc21140m_autoconf()
2828 ana = mii_rd(MII_ANA, lp->phy[lp->active].addr, DE4X5_MII); in dc21140m_autoconf()
2973 mii_wr(ana, MII_ANA, lp->phy[lp->active].addr, DE4X5_MII); in dc2114x_autoconf()
3012 ana = mii_rd(MII_ANA, lp->phy[lp->active].addr, DE4X5_MII); in dc2114x_autoconf()
3499 mii_rd(MII_SR, lp->phy[lp->active].addr, DE4X5_MII); in is_100_up()
3520 mii_rd(MII_SR, lp->phy[lp->active].addr, DE4X5_MII); in is_10_up()
3542 return mii_rd(MII_SR, lp->phy[lp->active].addr, DE4X5_MII); in is_anc_capable()
4982 id = mii_get_oui(i, DE4X5_MII); in mii_get_phy()
5019 mii_wr(MII_CR_RST, MII_CR, lp->phy[k].addr, DE4X5_MII); in mii_get_phy()
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/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/net/ethernet/dec/tulip/
H A Dde4x5.h28 #define DE4X5_MII iobase+(0x048 << lp->bus) /* MII Interface Register */ macro
925 mii_wr(MII_CR_10|(lp->fdx?MII_CR_FDM:0), MII_CR, lp->phy[lp->active].addr, DE4X5_MII);\
947 mii_wr(mii_rd(0x18, lp->phy[lp->active].addr, DE4X5_MII) & ~0x2000,\
948 0x18, lp->phy[lp->active].addr, DE4X5_MII);\
951 sr = mii_rd(MII_SR, lp->phy[lp->active].addr, DE4X5_MII);\
954 mii_wr(MII_CR_100|(fdx?MII_CR_FDM:0), MII_CR, lp->phy[lp->active].addr, DE4X5_MII);\
975 mii_wr(MII_CR_100|MII_CR_ASSE, MII_CR, lp->phy[lp->active].addr, DE4X5_MII);\
H A Dde4x5.c2771 mii_wr(ana, MII_ANA, lp->phy[lp->active].addr, DE4X5_MII); in dc21140m_autoconf()
2784 mii_wr(ana, MII_ANA, lp->phy[lp->active].addr, DE4X5_MII); in dc21140m_autoconf()
2828 ana = mii_rd(MII_ANA, lp->phy[lp->active].addr, DE4X5_MII); in dc21140m_autoconf()
2973 mii_wr(ana, MII_ANA, lp->phy[lp->active].addr, DE4X5_MII); in dc2114x_autoconf()
3012 ana = mii_rd(MII_ANA, lp->phy[lp->active].addr, DE4X5_MII); in dc2114x_autoconf()
3499 mii_rd(MII_SR, lp->phy[lp->active].addr, DE4X5_MII); in is_100_up()
3520 mii_rd(MII_SR, lp->phy[lp->active].addr, DE4X5_MII); in is_10_up()
3542 return mii_rd(MII_SR, lp->phy[lp->active].addr, DE4X5_MII); in is_anc_capable()
4982 id = mii_get_oui(i, DE4X5_MII); in mii_get_phy()
5019 mii_wr(MII_CR_RST, MII_CR, lp->phy[k].addr, DE4X5_MII); in mii_get_phy()
[all …]
/dports/multimedia/libv4l/linux-5.13-rc2/drivers/net/ethernet/dec/tulip/
H A Dde4x5.h28 #define DE4X5_MII iobase+(0x048 << lp->bus) /* MII Interface Register */ macro
925 mii_wr(MII_CR_10|(lp->fdx?MII_CR_FDM:0), MII_CR, lp->phy[lp->active].addr, DE4X5_MII);\
947 mii_wr(mii_rd(0x18, lp->phy[lp->active].addr, DE4X5_MII) & ~0x2000,\
948 0x18, lp->phy[lp->active].addr, DE4X5_MII);\
951 sr = mii_rd(MII_SR, lp->phy[lp->active].addr, DE4X5_MII);\
954 mii_wr(MII_CR_100|(fdx?MII_CR_FDM:0), MII_CR, lp->phy[lp->active].addr, DE4X5_MII);\
975 mii_wr(MII_CR_100|MII_CR_ASSE, MII_CR, lp->phy[lp->active].addr, DE4X5_MII);\
H A Dde4x5.c2771 mii_wr(ana, MII_ANA, lp->phy[lp->active].addr, DE4X5_MII); in dc21140m_autoconf()
2784 mii_wr(ana, MII_ANA, lp->phy[lp->active].addr, DE4X5_MII); in dc21140m_autoconf()
2828 ana = mii_rd(MII_ANA, lp->phy[lp->active].addr, DE4X5_MII); in dc21140m_autoconf()
2973 mii_wr(ana, MII_ANA, lp->phy[lp->active].addr, DE4X5_MII); in dc2114x_autoconf()
3012 ana = mii_rd(MII_ANA, lp->phy[lp->active].addr, DE4X5_MII); in dc2114x_autoconf()
3499 mii_rd(MII_SR, lp->phy[lp->active].addr, DE4X5_MII); in is_100_up()
3520 mii_rd(MII_SR, lp->phy[lp->active].addr, DE4X5_MII); in is_10_up()
3542 return mii_rd(MII_SR, lp->phy[lp->active].addr, DE4X5_MII); in is_anc_capable()
4982 id = mii_get_oui(i, DE4X5_MII); in mii_get_phy()
5019 mii_wr(MII_CR_RST, MII_CR, lp->phy[k].addr, DE4X5_MII); in mii_get_phy()
[all …]