1 /* 2 * Hamlib AOR backend - AR7030 Plus description 3 * Copyright (c) 2000-2010 by Stephane Fillod & Fritz Melchert 4 * Copyright (c) 2009-2010 by Larry Gadallah (VE6VQ) 5 * 6 * 7 * This library is free software; you can redistribute it and/or 8 * modify it under the terms of the GNU Lesser General Public 9 * License as published by the Free Software Foundation; either 10 * version 2.1 of the License, or (at your option) any later version. 11 * 12 * This library is distributed in the hope that it will be useful, 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 15 * Lesser General Public License for more details. 16 * 17 * You should have received a copy of the GNU Lesser General Public 18 * License along with this library; if not, write to the Free Software 19 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA 20 * 21 */ 22 23 #ifndef _AR7030P_H 24 #define _AR7030P_H 1 25 26 #include "hamlib/rig.h" 27 #include "token.h" 28 29 /* 30 31 AR-7030 Computer remote control protocol. 32 33 Information for firmware releases 1.1A, 1.2A, 1.4A and 1.4B 34 35 1) Remote control overview. 36 37 The AR-7030 receiver allows remote control of all of its functions by means 38 of a direct memory access system. A controlling computer can read and modify 39 the internal memory maps of the receiver to set required parameters and then 40 call for the receiver's control program to process the new settings. Commands 41 to the receiver are byte structured in binary format, so it is not possible 42 to control from a terminal. 43 44 All multi-byte numbers within the receiver are binary, stored MSB first. 45 46 2) Receiver frequency configuration. 47 48 Receive frequency is set by two oscillators - local and carrier. In AM and FM 49 modes the carrier oscillator is not used, and the final IF frequency is 455 50 kHz. In Sync mode the carrier oscillator is offset by +20.29kHz before mixing 51 with the IF. 52 53 The IF frequencies have a fixed inter-conversion frequency of 44.545MHz and, 54 because of the high-side local oscillator, both IF's are inverted. 55 56 The receiver controller processes the following variables to establish the 57 tuned frequency :- 58 59 [local offset] Frequency shift applied to local oscillator. 60 [carrier offset] 455.00kHz for LSB, USB, Data and CW modes / 61 434.71kHz for Sync mode. 62 63 [filter offset] IF Filter frequency at the (vestigial) carrier position as an 64 offset from 455kHz. 65 66 [PBS] User set filter shift. 67 [BFO] User set offset between carrier position and frequency display. 68 [TUNE] Receiver tuned frequency as shown on display. 69 70 The relationship between these variables and the tuning is as follows :- 71 72 [carrier offset] + [filter offset] + [PBS] + [BFO] ==> Carrier oscillator 73 45.000MHz + [filter offset] + [PBS] ==> [local offset] 74 [TUNE] + [local offset] ==> Local oscillator 75 76 3) Serial data protocol. 77 78 All data transfers are at 1200 baud, No parity, 8 bits, 1 stop bit 79 (1200 N 8 1). There is no hardware or software flow control other than that 80 inherent in the command structure. The receiver can accept data at any time at 81 full rate provided the IR remote controller is not used or is disabled. 82 A maximum of one byte can be transmitted for each byte received, so data flow 83 into a controlling computer is appropriately limited. 84 85 Each byte sent to the receiver is a complete command - it is best thought of 86 as two hexadecimal digits - the first digit is the operation code, the second 87 digit is 4-bits of data relating to the operation. Because the receiver 88 operates with 8-bit bytes, intermediate 4-bit values are stored in registers 89 in the receiver for recombination and processing. For example to write into the 90 receiver's memory, the following steps would be followed:- 91 92 a) Send address high order 4-bits into H-register 93 b) Send address low order 4-bits and set Address register 94 c) Send first data byte high order 4-bits into H-register 95 d) Send first data byte low order 4-bits and execute Write Data Operation 96 e) Send second data byte high order 4-bits into H-register 97 f) Send second data byte low order 4-bits and execute Write Data Operation 98 g) Repeat (e) and (f) for each subsequent byte to be written. 99 100 4) Memory organisation. 101 102 Different memory areas in the receiver are referenced by selecting Pages - 103 up to 16 pages are supported. 104 105 The memory is broadly divided into 3 sections :- 106 107 a) Working memory - where all current operating variables are stored and 108 registers and stack are located. This memory is volatile and data is lost 109 when power to the receiver is removed. 110 111 b) Battery sustained memory - where duplicate parameters are stored for 112 retention when power is removed. This memory area is also used for storage 113 of filter parameters, setup memories and squelch and BFO settings for the 114 frequency memories and contains the real time clock registers. 115 116 c) EEPROM - where frequency, mode, filter and PBS information for the 117 frequency memories is stored. Additionally S-meter and IF calibration values 118 are stored here. This memory can be read or written to download and upload 119 the receiver's frequency memories, but repetitive writing should be avoided 120 because the memory devices will only support a finite number of write cycles. 121 122 5) Variations between A and B types and firmware revisions. 123 Type A firmware supports only basic receiver functions, type B extends 124 operations and includes support for the Notch / Noise Blanker option. 125 The whole of the type A memory map is retained in type B, but more 126 memory and operations are added for the extended functions of type B. 127 128 In the following information, circled note numbers are included to indicate 129 where items are specific to one type or revision of the firmware:- 130 131 <1> Applicable to type B firmware only. 132 <2> Applicable to revision 1.4 only, types A and B 133 <3> Function is changed or added to in type B 134 135 6) Operation codes. 136 The high order 4-bits of each byte sent to the receiver is the operation code, 137 the low order 4-bits is data (shown here as x) :- 138 139 Code Ident Operation 140 0x NOP No Operation 141 142 3x SRH Set H-register x => H-register (4-bits) 143 144 5x PGE Set page x => Page register (4-bits) 145 146 4x ADR Set address 0Hx => Address register (12-bits) 147 0 => H-register 148 149 1x ADH Set address high x => Address register (high 4-bits) 150 151 6x WRD Write data Hx => [Page, Address] 152 Address register + 1 => Address register 153 0 => H-register, 154 0 => Mask register 155 156 9x MSK <1> Set mask Hx => Mask register 157 0 => H-register 158 2x EXE Execute routine x 159 160 Ax BUT <1> Operate button x 161 162 7x RDD Read data [Page, Address] => Serial output 163 Address register + x => Address register 164 165 8x LOC Set lock level x 166 */ 167 #if 1 168 169 #define NOP(x) (unsigned char) ( 0x00 | ( 0x0f & (x) ) ) 170 #define SRH(x) (unsigned char) ( 0x30 | ( 0x0f & (x) ) ) 171 #define PGE(x) (unsigned char) ( 0x50 | ( 0x0f & (x) ) ) 172 #define ADR(x) (unsigned char) ( 0x40 | ( 0x0f & (x) ) ) 173 #define ADH(x) (unsigned char) ( 0x10 | ( 0x0f & (x) ) ) 174 #define WRD(x) (unsigned char) ( 0x60 | ( 0x0f & (x) ) ) 175 #define MSK(x) (unsigned char) ( 0x90 | ( 0x0f & (x) ) ) 176 #define EXE(x) (unsigned char) ( 0x20 | ( 0x0f & (x) ) ) 177 #define BUT(x) (unsigned char) ( 0xa0 | ( 0x0f & (x) ) ) 178 #define RDD(x) (unsigned char) ( 0x70 | ( 0x0f & (x) ) ) 179 #define LOC(x) (unsigned char) ( 0x80 | ( 0x0f & (x) ) ) 180 181 #endif // 0 182 183 enum OPCODE_e 184 { 185 op_NOP = 0x00, 186 op_SRH = 0x30, 187 op_PGE = 0x50, 188 op_ADR = 0x40, 189 op_ADH = 0x10, 190 op_WRD = 0x60, 191 op_MSK = 0x90, 192 op_EXE = 0x20, 193 op_BUT = 0xa0, 194 op_RDD = 0x70, 195 op_LOC = 0x80 196 }; 197 198 /* 199 Note that the H-register is zeroed after use, and that the high order 4-bits 200 of the Address register must be set (if non-zero) after the low order 8-bits. 201 The Address register is automatically incremented by one after a write data 202 operation and by x after a read data operation. When writing to any of the 203 EEPROM memory pages a time of 10ms per byte has to be allowed. For this reason 204 it is recommended that instructions SRH and WRD are always used together 205 (even if the SRH is not needed) since this will ensure that the EEPROM has 206 sufficient time to complete its write cycle. 207 208 Additionally to allow time for local receiver memory updates and SNC detector 209 sampling in addition to the EEPROM write cycle, it is recommended to lock the 210 receiver to level 2 or 3, or add a NOP instruction after each write. This is 211 not required for firmware revision 1.4 but locking is still recommended. 212 213 The mask operation helps with locations in memory that are shared by two 214 parameters and aids setting and clearing bits. The mask operates only in 215 Page 0. 216 217 If bits in the mask are set, then a following write operation will leave the 218 corresponding bits unchanged. The mask register is cleared after a write so 219 that subsequent writes are processed normally. Because it defaults to zero at 220 reset, the mask is inoperative unless specifically set. 221 222 The operate button instruction uses the same button codes as are returned 223 from routine 15 (see section 8), with an additional code of zero which 224 operates the power button, but will not switch the receiver off. Also code 225 0 will switch the receiver on (from standby state). 226 227 7) Memory pages. 228 229 Page 0 Working memory (RAM) 256 bytes. 230 Page 1 Battery sustained memory (RAM) 256 bytes. 231 Page 2 Non-volatile memory (EEPROM) 512 bytes. 232 Page 3 <1> Non-volatile memory (EEPROM) 4096 bytes. 233 Page 4 <1> Non-volatile memory (EEPROM) 4096 bytes. 234 Pages 5 - 14 Not assigned. 235 Page 15 Receiver Ident (ROM) 8 bytes. 236 */ 237 enum PAGE_e 238 { 239 NONE = -1, 240 WORKING = 0, 241 BBRAM = 1, 242 EEPROM1 = 2, 243 EEPROM2 = 3, 244 EEPROM3 = 4, 245 ROM = 15 246 }; 247 248 /* 249 The ident is divided into model number (5 bytes), software revision (2 bytes) 250 and type letter (1 byte). 251 252 e.g. 7030_14A => Model AR-7030, revision 1.4, type letter A. 253 254 8) Lock levels. 255 256 Level 0 Normal operation. 257 258 Level 1 IR remote control disabled. 259 260 Front panel buttons ignored. 261 Front panel spin-wheels logged but not actioned. 262 Display update (frequency & S-meter) continues. 263 264 Level 2 As level 1, but display update suspended. 265 266 In revisions before 1.4 squelch operation is inhibited, which results in 267 no audio output after a mode change. In revision 1.4 squelch operation 268 continues and mode changing is as expected. 269 270 Level 3 Remote operation exclusively. 271 272 Lock level 1 is recommended during any multi-byte reads or writes of the 273 receiver's memory to prevent data contention between internal and remote 274 memory access. See also EEPROM notes in section (6) 275 */ 276 enum LOCK_LVL_e 277 { 278 LOCK_0 = 0, 279 LOCK_1 = 1, 280 LOCK_2 = 2, 281 LOCK_3 = 3, 282 LOCK_NONE = 4 283 }; 284 285 /* 286 8) Routines. 287 288 Routine 0 Reset Setup receiver as at switch-on. 289 290 Routine 1 Set frequency Program local oscillator from frequ area and 291 setup RF filters and oscillator range. 292 293 Routine 2 Set mode Setup from mode byte in memory and display mode, 294 select preferred filter and PBS, BFO values etc. 295 296 Routine 3 Set passband Setup all IF parameters from filter, pbsval and 297 bfoval bytes. 298 299 Routine 4 Set all Set all receiver parameters from current memory values. 300 301 Routine 5 <2> Set audio Setup audio controller from memory register values. 302 303 Routine 6 <2> Set RF-IF Setup RF Gain, IF Gain and AGC speed. Also sets Notch 304 Filter and Noise Blanker if these options are fitted. 305 306 Routine 7 Not assigned 307 308 Routine 8 Not assigned 309 310 Routine 9 Direct Rx control Program control register from rxcon area. 311 312 Routine 10 Direct DDS control Program local oscillator and carrier 313 oscillator DDS systems from wbuff area. 314 The 32-bits at wbuff control the carrier frequency, 315 value is 385674.4682 / kHz. The 32 bits at wbuff+4 control 316 the local osc frequency, value is 753270.4456 / MHz. 317 318 Routine 11 Display menus Display menus from menu1 and menu2 bytes. 319 320 Routine 12 Display frequency Display frequency from frequ area. 321 322 Routine 13 Display buffer Display ASCII data in wbuff area. First byte is 323 display address, starting at 128 for the top line and 192 324 for the bottom line. An address value of 1 clears the display. 325 Data string (max length 24 characters) ends with a zero byte. 326 327 Routine 14 Read signal strength Transmits byte representing received 328 signal strength (read from AGC voltage). Output is 8-bit 329 binary in range 0 to 255. 330 331 Routine 15 Read buttons Transmits byte indicating state of front panel 332 buttons. Output is 8-bit binary with an offset of +48 333 (i.e. ASCII numbers). Buttons held continuously will only be 334 registered once. 335 */ 336 337 enum ROUTINE_e 338 { 339 RESET = 0, 340 SET_FREQ = 1, 341 SET_MODE = 2, 342 SET_PASS = 3, 343 SET_ALL = 4, 344 SET_AUDIO = 5, 345 SET_RFIF = 6, 346 DIR_RX_CTL = 9, 347 DIR_DDS_CTL = 10, 348 DISP_MENUS = 11, 349 DISP_FREQ = 12, 350 DISP_BUFF = 13, 351 READ_SIGNAL = 14, 352 READ_BTNS = 15 353 }; 354 355 /* 356 Button codes :- 357 358 0 = None pressed 5 = RF-IF button 359 1 = Mode up button 6 = Memory button 360 2 = Mode down button 7 = * button 361 3 = Fast button 8 = Menu button 362 4 = Filter button 9 = Power button 363 */ 364 enum BUTTON_e 365 { 366 BTN_NONE = 0, 367 BTN_UP = 1, 368 BTN_DOWN = 2, 369 BTN_FAST = 3, 370 BTN_FILTER = 4, 371 BTN_RFIF = 5, 372 BTN_MEMORY = 6, 373 BTN_STAR = 7, 374 BTN_MENU = 8, 375 BTN_POWER = 9 376 }; 377 378 /* 379 Note that the work buffer wbuff area in memory is used continuously by the 380 receiver unless lock levels 2 or 3 are invoked. Lock levels of 1 or more 381 should be used when reading any front panel controls to prevent erratic 382 results. 383 384 10) Battery sustained RAM (Memory page 1) 385 386 Address Ident Length Description 387 0 0x000 13 bytes Real time clock / timer registers :- 388 0 0x000 rt_con 1 byte Clock control register 389 2 0x002 rt_sec 1 byte Clock seconds (2 BCD digits) 390 3 0x003 rt_min 1 byte Clock minutes (2 BCD digits) 391 4 0x004 rt_hrs 1 byte Clock hours (2 BCD digits - 24 hr format) 392 5 0x005 rt_dat 1 byte Clock year (2 bits) and date (2 BCD digits) 393 6 0x006 rt_mth 1 byte Clock month (2 BCD digits - low 5 bits only) 394 8 0x008 tm_con 1 byte Timer control register 395 10 0x00A tm_sec 1 byte Timer seconds (2 BCD digits) 396 11 0x00B tm_min 1 byte Timer minutes (2 BCD digits) 397 12 0x00C tm_hrs 1 byte Timer hours (2 BCD digits - 24 hr format) 398 13 0x00D 15 bytes Power-down save area :- 399 13 0x00D ph_cal 1 byte Sync detector phase cal value 400 14 0x00E pd_slp 1 byte Timer run / sleep time in minutes 401 15 0x00F pd_dly 1 byte Scan delay value x 0.125 seconds 402 16 0x010 pd_sst 1 byte Scan start channel 403 17 0x011 pd_ssp 1 byte Scan stop channel 404 18 0x012 pd_stp 2 bytes Channel step size 405 20 0x014 pd_sql 1 byte Squelch 406 21 0x015 pd_ifg 1 byte IF gain 407 22 0x016 pd_flg 1 byte Flags (from pdflgs) 408 23 0x017 pd_frq 3 bytes Frequency 409 26 0x01A pd_mod <3> 1 byte Mode (bits 0-3) and 410 NB threshold (bits 4-7) 411 27 0x01B pd_vol <3> 1 byte Volume (bits 0-5) and 412 rx memory hundreds (bits 6&7) 413 28 0x01C 26 bytes Receiver setup save area :- 414 28 0x01C md_flt 1 byte AM mode : Filter (bits 0-3) and 415 AGC speed (bits 4-7) 416 29 0x01D md_pbs 1 byte AM mode : PBS value 417 30 0x01E md_bfo 1 byte AM mode : BFO value 418 31 0x01F 3 bytes Ditto for Sync mode 419 34 0x022 3 bytes Ditto for NFM mode - 420 except Squelch instead of BFO 421 37 0x025 3 bytes Ditto for Data mode 422 40 0x028 3 bytes Ditto for CW mode 423 43 0x02B 3 bytes Ditto for LSB mode 424 46 0x02E 3 bytes Ditto for USB mode 425 49 0x031 st_aud <3> 1 byte Audio bass setting (bits 0-4) 426 bit 5 Notch auto track enable 427 bit 6 Ident search enable 428 bit 7 Ident preview enable 429 50 0x032 1 byte Audio treble setting (bits 0-3) and 430 RF Gain (bits 4-7) 431 51 0x033 1 byte Aux output level - left channel 432 52 0x034 1 byte Aux output level - right channel 433 53 0x035 st_flg 1 byte Flags (from stflgs) 434 54 0x036 26 bytes Setup memory A (configured as above) 435 80 0x050 26 bytes Setup memory B (configured as above) 436 106 0x06A 26 bytes Setup memory C (configured as above) 437 132 0x084 24 bytes Filter data area :- 438 132 0x084 fl_sel 1 byte Filter 1 : selection bits and IF bandwidth 439 133 0x085 fl_bw 1 byte Filter 1 : bandwidth (2 BCD digits, x.x kHz) 440 134 0x086 fl_uso 1 byte Filter 1 : USB offset value x 33.19Hz 441 135 0x087 fl_lso 1 byte Filter 1 : LSB offset value x 33.19Hz 442 136 0x088 4 bytes Ditto for filter 2 443 140 0x08C 4 bytes Ditto for filter 3 444 144 0x090 4 bytes Ditto for filter 4 445 148 0x094 4 bytes Ditto for filter 5 446 152 0x098 4 bytes Ditto for filter 6 447 156 0x09C mem_sq 100 bytes Squelch / BFO values for 448 frequency memories 0 to 99 449 (BFO for Data and CW modes, 450 Squelch for others) 451 */ 452 #define MAX_MEM_SQL_PAGE0 (99) 453 454 enum FILTER_e 455 { 456 FILTER_1 = 1, 457 FILTER_2 = 2, 458 FILTER_3 = 3, 459 FILTER_4 = 4, 460 FILTER_5 = 5, 461 FILTER_6 = 6 462 }; 463 464 enum BBRAM_mem_e 465 { 466 RT_CON = 0, 467 RT_SEC = 2, 468 RT_MIN = 3, 469 RT_HRS = 4, 470 RT_DAT = 5, 471 RT_MTH = 6, 472 TM_CON = 8, 473 TM_SEC = 10, 474 TM_MIN = 11, 475 TM_HRS = 12, 476 PH_CAL = 13, 477 PD_SLP = 14, 478 PD_DLY = 15, 479 PD_SST = 16, 480 PD_SSP = 17, 481 PD_STP = 18, 482 PD_SQL = 20, 483 PD_IFG = 21, 484 PD_FLG = 22, 485 PD_FRQ = 23, 486 PD_MOD = 26, 487 PD_VOL = 27, 488 MD_FLT = 28, 489 MD_PBS = 29, 490 MD_BFO = 30, 491 ST_AUD = 49, 492 ST_FLG = 53, 493 FL_SEL = 132, 494 FL_BW = 133, 495 FL_USO = 134, 496 FL_LSO = 135, 497 MEM_SQ = 156 498 }; 499 500 /* 501 11) EEPROM (Memory page 2) 502 503 Address Ident Length Description 504 0 0x000 4 bytes Frequency memory data :- 505 0 0x000 mem_fr 3 bytes Memory 00 : 24-bit frequency 506 3 0x003 mem_md 1 byte bits 0 - 3 mode 507 bits 4 - 6 filter 508 bit 7 scan lockout 509 4 0x004 396 bytes Ditto for memories 01 to 99 510 400 0x190 mem_pb 100 bytes PBS values for frequency memories 0 to 99 511 500 0x1F4 sm_cal 8 bytes S-meter calibration values :- 512 500 0x1F4 1 byte RSS offset for S1 level 513 501 0x1F5 1 byte RSS steps up to S3 level 514 502 0x1F6 1 byte RSS steps up to S5 level 515 503 0x1F7 1 byte RSS steps up to S7 level 516 504 0x1F8 1 byte RSS steps up to S9 level 517 505 0x1F9 1 byte RSS steps up to S9+10 level 518 506 0x1FA 1 byte RSS steps up to S9+30 level 519 507 0x1FB 1 byte RSS steps up to S9+50 level 520 508 0x1FC if_cal 2 bytes RSS offsets for -20dB 521 and -8dB filter alignment 522 510 0x1FE if_def 1 byte Default filter numbers for 523 narrow and wide (2 BCD digits) 524 511 0x1FF option <1> 1 byte Option information :- 525 bit 0 Noise blanker 526 bit 1 Notch filter 527 bit 2 10 dB step attenuator (DX version) 528 */ 529 #define MAX_MEM_FREQ_PAGE2 (99) 530 #define MAX_MEM_PBS_PAGE2 (99) 531 532 enum EEPROM1_mem_e 533 { 534 MEM_FR = 0, 535 MEM_MD = 3, 536 MEM_PB = 400, 537 SM_CAL = 500, 538 IF_CAL = 508, 539 IF_DEF = 510, 540 OPTION = 511 541 }; 542 543 /* 544 12) EEPROM (Memory page 3) . 545 546 Address Ident Length Description 547 0 0x000 4 bytes Frequency memory data :- 548 0 0x000 mex_fr 3 bytes Memory 100 : 24-bit frequency 549 3 0x003 mex_md 1 byte bits 0 - 3 mode 550 bits 4 - 6 filter 551 bit 7 scan lockout 552 4 0x004 1196 bytes Ditto for memories 101 to 399 553 1200 0x4B0 8 bytes Timer memory data :- 554 1200 0x4B0 mtm_mn 1 byte Timer memory 0 : minutes (2 BCD digits) 555 1201 0x4B1 mtm_hr 1 byte hours (2 BCD digits) 556 1202 0x4B2 mtm_dt 1 byte date (2 BCD digits) 557 1203 0x4B3 mtm_mt 1 byte month (2 BCD digits) 558 1204 0x4B4 mtm_ch 2 bytes rx channel (hundreds and 0-99) 559 1206 0x4B6 mtm_rn 1 byte run time 560 1207 0x4B7 mtm_ac 1 byte active (0 = not active) 561 1208 0x4B8 72 bytes Ditto for timer memories 1 to 9 562 1280 0x500 16 bytes Frequency memory data :- 563 1280 0x500 mex_sq 1 byte Memory 0 : Squelch / BFO (not used for 564 mems 0 to 99) 565 (BFO for Data and CW modes) 566 1281 0x501 mex_pb 1 byte PBS value (not used for mems 0 to 99) 567 1282 0x502 mex_id 14 bytes Text Ident 568 1296 0x510 2800 bytes Ditto for memories 1 to 175 569 */ 570 #define MAX_MEM_FREQ_PAGE3 (399) 571 #define MAX_MEM_SQL_PAGE3 (175) 572 #define MAX_MEM_PBS_PAGE3 (175) 573 #define MAX_MEM_ID_PAGE3 (175) 574 575 enum EEPROM2_mem_e 576 { 577 MEX_FR = 0, 578 MEX_MD = 3, 579 MEM_MN = 1200, 580 MTM_HR = 1201, 581 MTM_DT = 1202, 582 MTM_MT = 1203, 583 MTM_CH = 1204, 584 MTM_RN = 1206, 585 MTM_AC = 1207, 586 MEX_SQ = 1280, 587 MEX_PB = 1281, 588 MEX_ID = 1282 589 }; 590 591 /* 592 13) EEPROM (Memory page 4) <1> 593 594 Address Ident Length Description 595 0 0x000 16 bytes Frequency memory data :- 596 0 0x000 mey_sq 1 byte Memory 176 : Squelch / BFO 597 (BFO for Data and CW modes) 598 1 0x001 mey_pb 1 byte PBS value 599 2 0x002 mey_id 14 bytes Text Ident 600 16 0x010 3568 bytes Ditto for memories 177 to 399 601 3584 0xE00 mex_hx 400 bytes Frequency fast find index 602 (1 byte for each memory 0 to 399) 603 Index value is bits 9 to 16 of 24-bit 604 frequency stored in each memory. Empty 605 memories (frequency zero) should have 606 a random index byte. 607 3984 0xF90 112 bytes spare 608 */ 609 610 enum EEPROM3_mem_e 611 { 612 MEY_SQ = 0, 613 MEY_PB = 1, 614 MEY_ID = 2, 615 MEX_HX = 3584 616 }; 617 618 /* 619 14) Working memory (Memory page 0) 620 621 Areas not specifically addressed are used as workspace by the internal 622 processor. - Keep out (by order). 623 624 Address Ident Length Description 625 16 0x010 snphs 1 byte Sync detector phase offset cal value 626 17 0x011 slptim 1 byte Sleep time (minutes) 627 18 0x012 scnst 1 byte Scan start channel 628 19 0x013 scnsp 1 byte Scan stop channel 629 20 0x014 scndly 1 byte Scan delay time value x 0.125 seconds 630 21 0x015 chnstp 2 bytes 16-bit channel step size, 631 value is 376.6352 / kHz 632 23 0x017 sqlsav 1 byte Squelch save value (non-fm mode) 633 24 0x018 ifgain 1 byte IF gain value (zero is max gain) 634 26 0x01A frequ 3 bytes 24-bit tuned frequency, 635 value is 376635.2228 / MHz. 636 29 0x01D mode 1 byte Current mode :- 1 = AM 4 = Data 637 2 = Sync 5 = CW 638 3 = NFM 6 = LSB 639 7 = USB 640 30 0x01E 10 bytes Audio control registers :- 641 30 0x01E af_vol 1 byte Main channel volume (6-bits, values 15 to 63) 642 31 0x01F af_vll 1 byte Left channel balance 643 (5-bits, half of volume value above) 644 32 0x020 af_vlr 1 byte Right channel balance (as above) 645 33 0x021 af_bas <1> 1 byte Main channel bass 646 (bits 0-4, values 6 to 25, 15 is flat) 647 bit 5 nchtrk Notch auto track enable 648 bit 6 idauto Ident auto search enable 649 bit 7 idprev Ident auto preview enable 650 34 0x022 af_trb <3> 1 byte Main channel treble 651 (bits 0-3, values 2 to 10, 6 is flat) 652 bit 4 nb_opt Noise blanker menus enabled 653 bit 5 nt_opt Notch Filter menus enabled 654 bit 6 step10 10 dB RF attenuator fitted 655 35 0x023 af_axl 1 byte Left aux channel level 656 (bits 0-5, values 27 to 63) 657 36 0x024 af_axr <3> 1 byte Right aux channel level 658 (bits 0-5, values 27 to 63) 659 bit 7 nchsr Notch search running 660 37 0x025 af_axs <3> 1 byte Aux channel source (bits 0-3) 661 bit 4 nchen Notch filter active 662 bit 5 nchsig Notch filter signal detected 663 bit 6 axmut Aux output mute 664 bit 7 nchato Notch auto tune active 665 38 0x026 af_opt <3> 1 byte Option output source (bits 0-3) 666 bit 4 idover Ident on LCD over frequency 667 bit 5 idsrdn Ident search downwards 668 bit 7 idsrch Ident search in progress 669 39 0x027 af_src 1 byte Main channel source 670 bit 6 afmut Main output mute 671 40 0x028 rxcon 3 bytes Receiver control register mapping :- 672 byte 1 bit 0 rx_fs3 Filter select : FS3 673 byte 1 bit 1 rx_fs2 Filter select : FS2 674 byte 1 bit 2 rx_fs1 Filter select : FS1 675 byte 1 bit 3 rx_fs4 Filter select : FS4 676 byte 1 bit 4 rx_pre Preamplifier enable 677 byte 1 bit 5 rx_atr Atten : 0 = 20dB / 1 = 40dB 678 byte 1 bit 6 rx_rff Input filter : 0 = HF / 1 = LF 679 byte 1 bit 7 rx_atn Attenuator enable 680 byte 2 bit 0 rx_as1 AGC speed : 00 = Slow 681 byte 2 bit 1 rx_as2 10 = Med 682 11 = Fast 683 byte 2 bit 2 rx_agi AGC inhibit 684 byte 2 bit 3 rx_en LO and HET enable 685 byte 2 bit 4 rx_aux Aux relay enable 686 byte 2 bit 5 rx_fs5 Filter select : FS5 687 byte 2 bit 6 rx_fs6 Filter select : FS6 688 byte 2 bit 7 rx_ibw IF b/w : 0 = 4kHz / 1 = 10kHz 689 byte 3 bit 0 rx_chg Fast charge enable 690 byte 3 bit 1 rx_pwr PSU enable 691 byte 3 bit 2 rx_svi Sync VCO inhibit 692 byte 3 bit 3 rx_agm AGC mode : 0 = peak / 1 = mean 693 byte 3 bit 4 rx_lr1 LO range : 00 = 17 - 30 MHz 694 byte 3 bit 5 rx_lr2 10 = 10 - 17 MHz 695 01 = 4 - 10 MHz 696 11 = 0 - 4 MHz 697 byte 3 bit 6 rx_sbw Sync b/w : 0 = Wide / 1 = Narrow 698 byte 3 bit 7 rx_car Car sel : 0 = AM / 1 = DDS 699 43 0x02B bits 3 bytes General flags :- 700 byte 1 bit 6 lock1 Level 1 lockout 701 byte 1 bit 7 lock2 Level 2 lockout 702 byte 2 bit 0 upfred Update frequency display 703 byte 2 bit 1 upmend Update menus 704 byte 2 bit 2 tune4x Tune 4 times faster (AM & NFM) 705 byte 2 bit 3 quickly Quick tuning (fast AGC, Sync) 706 byte 2 bit 4 fast Fast tuning mode 707 byte 2 bit 5 sncpt1 Auto sync - frequency lock 708 byte 2 bit 6 sncpt2 Auto sync - phase lock 709 byte 2 bit 7 sncal Sync detector calibrating 710 byte 3 bit 0 sqlch Squelch active (i.e. low signal) 711 byte 3 bit 1 mutsql Mute on squelch (current setting) 712 byte 3 bit 2 bscnmd Scan mode for VFO B 713 byte 3 bit 3 dualw Dual watch active 714 byte 3 bit 4 scan Scan active 715 byte 3 bit 5 memlk Current memory scan lockout 716 byte 3 bit 6 pbsclr Enable PBS CLR from IR remote 717 <2> byte 3 bit 7 memodn MEM button scans downwards 718 46 0x02E pdflgs 1 byte Flags saved at power-down :- 719 bit 0 power Power on 720 bit 1 flock Tuning locked 721 bit 2 batop Battery operation (for fast chg) 722 <1> bit 3 nben Noise blanker active 723 <1> bit 4 nblong Noise blanker long pulse 724 47 0x02F stflgs 1 byte Flags saved in setup memories :- 725 bit 0 mutsav Mute on squelch (non-fm mode) 726 bit 1 mutaux Mute aux output on squelch 727 bit 2 axren Aux relay on timer 728 bit 3 axrsql Aux relay on squelch 729 bit 4 snauto Auto sync mode 730 bit 5 snarr Sync detector narrow bandwidth 731 bit 6 scanmd Scan runs irrespective of squelch 732 bit 7 autorf RF gain auto controlled 733 48 0x030 rfgain 1 byte Current RF gain setting (0 to 5) (0=max gain) 734 49 0x031 rfagc 1 byte Current RF AGC setting (added to above) 735 50 0x032 agcspd 1 byte Current AGC speed : 0 = Fast 2 = Slow 736 1 = Medium 3 = Off 737 51 0x033 sqlval 1 byte Squelch value (current setting) 738 52 0x034 filter 1 byte Current filter number (1 to 6) 739 53 0x035 pbsval 1 byte PBS offset (x33.19Hz) 740 54 0x036 bfoval 1 byte BFO offset (x33.19Hz) 741 55 0x037 fltofs 1 byte Filter centre frequency offset (x33.19Hz) 742 56 0x038 fltbw 1 byte Filter bandwidth (2 BCD digits : x.x kHz) 743 57 0x039 ircode: 2 bytes Current / last IR command code 744 59 0x03B spnpos 1 byte Misc spin-wheel movement } 0 = no movement 745 60 0x03C volpos 1 byte Volume control movement } +ve = clockwise 746 61 0x03D tunpos 1 byte Tuning control movement } -ve = anti-clockwise 747 62 0x03E lstbut 1 byte Last button pressed 748 63 0x03F smval 2 bytes Last S-meter reading (bars + segments) 749 65 0x041 mestmr 1 byte Message time-out timer 750 66 0x042 rfgtmr 1 byte RF gain delay timer 751 67 0x043 updtmr 1 byte Sustained RAM update timer 752 68 0x044 agctmr 1 byte AGC speed restore delay timer 753 69 0x045 snctmr 1 byte Auto sync refresh timer 754 70 0x046 scntmr 1 byte Scan delay timer 755 71 0x047 irdly 1 byte IR remote auto repeat delay counter 756 72 0x048 runtmr 1 byte Sleep mode timer 757 73 0x049 snfrq 1 byte Sync detector frequency offset cal value 758 74 0x04A frange 1 byte Input / LO range 759 75 0x04B menu1 <3> 1 byte Current left menu (type A and B menu 760 numbers are different) 761 76 0x04C menu2 <3> 1 byte Current right menu (type A and B menu 762 numbers are different) 763 77 0x04D memno 1 byte Current memory number 764 78 0x04E setno 1 byte Setup / config selection - load / save 765 85 0x055 mempg <1> 1 byte Memory page (hundreds - value 0 to 3) 766 86 0x056 nbthr <1> 1 byte Noise blanker threshold (values 0 to 15) 767 87 0x057 hshfr <1> 1 byte Current tuned frequ index value 768 (during ident search) 769 88 0x058 nchtmr <1> 1 byte Notch filter auto tune / search timer 770 90 0x059 wbuff 26 bytes Work buffer 771 115 0x073 keymd 1 byte IR remote +/- keys function 772 116 0x074 keybuf 20 bytes IR remote key input buffer 773 136 0x088 frofs: 4 bytes 32-bit local osc offset 774 140 0x08C carofs 4 bytes 32-bit carrier osc offset 775 144 0x090 smofs 1 byte S-meter starting offset 776 145 0x091 smscl 7 bytes S-meter segment values 777 152 0x098 ifcal 2 bytes RSS offsets for -20 dB and 778 -5 dB filter alignment 779 154 0x09A ifdef 1 byte Default filter numbers for narrow and wide 780 (2 digits) 781 155 0x09B vfo_b 22 bytes VFO B storage area :- 782 155 0x09B 1 byte B : Scan delay time 783 156 0x09C 2 bytes B : Channel step size 784 158 0x09E 1 byte B : Squelch save value (non-fm mode) 785 159 0x09F 1 byte B : IF gain value 786 160 0x0A0 1 byte not used 787 161 0x0A1 3 bytes B : Tuned frequency 788 164 0x0A4 1 byte B : Mode 789 165 0x0A5 1 byte B : Volume 790 166 0x0A6 1 byte B : Left channel balance 791 167 0x0A7 1 byte B : Right channel balance 792 168 0x0A8 1 byte B : Bass response 793 169 0x0A9 1 byte B : Treble response 794 170 0x0AA 1 byte B : RF gain 795 171 0x0AB 1 byte B : RF AGC 796 172 0x0AC 1 byte B : AGC speed 797 173 0x0AD 1 byte B : Squelch value 798 174 0x0AE 1 byte B : Filter number 799 175 0x0AF 1 byte B : PBS offset 800 176 0x0B0 1 byte B : BFO offset 801 218 0x0DA savmnu <1> 1 byte Saved menu 1 number during ident display 802 219 0x0DB srchm <1> 2 bytes Ident search memory (page and number) 803 222 0x0DD idtmr <1> 1 byte Auto ident search start timer 804 223 0x0DE nchfr <1> 2 bytes 16-bit notch filter frequency, 805 value is 6553.6 / kHz 806 */ 807 808 #define HZ_PBS_STEP \ 809 ((44545000.0 * 25.0)/(16777216.0 * 2.0)) /* 33.1886 Hz/Step */ 810 #define NOTCH_STEP_HZ (6.5536) /* 6.5536 Hz/Step */ 811 #define VOL_MIN (15) 812 #define VOL_MAX (63) 813 #define BASS_MIN (6) 814 #define BASS_MAX (25) 815 #define TREB_MIN (2) 816 #define TREB_MAX (10) 817 #define AUX_MIN (27) 818 #define AUX_MAX (63) 819 820 enum MODE_e 821 { 822 MODE_NONE = 0, 823 AM = 1, 824 SAM = 2, 825 FM = 3, 826 DATA = 4, 827 CW = 5, 828 LSB = 6, 829 USB = 7 830 }; 831 832 enum AGC_decay_e 833 { 834 DECAY_SLOW = 0, 835 DECAY_MED = 2, 836 DECAY_FAST = 3 837 }; 838 839 enum LO_range_e 840 { 841 LO_17_30 = 0, 842 LO_4_10 = 1, 843 LO_10_17 = 2, 844 LO_0_4 = 3 845 }; 846 847 enum AGC_spd_e 848 { 849 AGC_NONE = -1, 850 AGC_FAST = 0, 851 AGC_MED = 1, 852 AGC_SLOW = 2, 853 AGC_OFF = 3 854 }; 855 856 enum WORKING_mem_e 857 { 858 SNPHS = 16, 859 SLPTIM = 17, 860 SCNST = 18, 861 SCNSP = 19, 862 SCNDLY = 20, 863 CHNSTP = 21, 864 SQLSAV = 23, 865 IFGAIN = 24, 866 FREQU = 26, 867 MODE = 29, 868 AF_VOL = 30, 869 AF_VLL = 31, 870 AF_VLR = 32, 871 AF_BAS = 33, 872 AF_TRB = 34, 873 AF_AXL = 35, 874 AF_AXR = 36, 875 AF_AXS = 37, 876 AF_OPT = 38, 877 AF_SRC = 39, 878 RXCON = 40, 879 BITS = 43, 880 PDFLGS = 46, 881 STFLGS = 47, 882 RFGAIN = 48, 883 RFAGC = 49, 884 AGCSPD = 50, 885 SQLVAL = 51, 886 FILTER = 52, 887 PBSVAL = 53, 888 BFOVAL = 54, 889 FLTOFS = 55, 890 FLTBW = 56, 891 IRCODE = 57, 892 SPNPOS = 59, 893 VOLPOS = 60, 894 TUNPOS = 61, 895 LSTBUT = 62, 896 SMVAL = 63, 897 MESTMR = 65, 898 RFGTMR = 66, 899 UPDTMR = 67, 900 AGCTMR = 68, 901 SNCTMR = 69, 902 SCNTMR = 70, 903 IRDLY = 71, 904 RUNTMR = 72, 905 SNFRQ = 73, 906 FRANGE = 74, 907 MENU1 = 75, 908 MENU2 = 76, 909 MEMNO = 77, 910 SETNO = 78, 911 MEMPG = 85, 912 NBTHR = 86, 913 HSHFR = 87, 914 NCHTMR = 88, 915 WBUFF = 90, 916 KEYMD = 115, 917 KEYBUF = 116, 918 FROFS = 136, 919 CAROFS = 140, 920 SMOFS = 144, 921 SMSCL = 145, 922 IFCAL = 152, 923 IFDEF = 154, 924 VFO_B = 155, 925 SCNDLY_B = 155, 926 CHNSTP_B = 156, 927 SQLSAV_B = 158, 928 IFGAIN_B = 159, 929 FREQU_B = 161, 930 MODE_B = 164, 931 AF_VOL_B = 165, 932 AF_VLL_B = 166, 933 AF_VLR_B = 167, 934 AF_BAS_B = 168, 935 AF_TRB_B = 169, 936 RFGAIN_B = 170, 937 RFAGC_B = 171, 938 AGCSPD_B = 172, 939 SQLVAL_B = 173, 940 FILTER_B = 174, 941 PBSVAL_B = 175, 942 BFOVAL_B = 176, 943 SAVMNU = 218, 944 SRCHM = 219, 945 IDTMR = 222, 946 NCHFR = 223 947 }; 948 949 enum ROM_mem_e 950 { 951 IDENT = 0 952 }; 953 954 #define HZ_PER_STEP ( 44545000.0 / 16777216.0 ) /* 2.655 Hz/Step */ 955 #define STEPS_PER_HZ ( 16777216.0 / 44545000.0 ) /* 0.3766 Steps/Hz */ 956 #define MAX_FREQ (32010000.0) 957 #define MIN_FREQ (10000.0) 958 959 /* 960 RS232 signal meter reading - additional comments 961 962 Several commercial organisations are using the AR7030 for signal monitoring 963 purposes and wish to accurately log signal meter level. The information is 964 given in the RS232 PROTOCOL LISTING but the subject is fairly complex. A 965 summary of the required process is given here, the text has been generated by 966 John Thorpe in response to a commercial request for more detailed guidance 967 (November 2001). 968 969 Reading the input signal strength from the AR7030 is not too difficult, but 970 some maths is needed to convert the level into dBm. 971 972 Each set is calibrated after manufacture and a set of S-meter calibration 973 values stored in EEPROM in the receiver. This means that the signal strength 974 readings should be quite good and consistent. I think that you should get less 975 than 2dB change with frequency and maybe 3dB with temperature. Initial 976 calibration error should be less than +/- 2dB. 977 978 I think the sets that you use have been modified for DRM use have some 979 changes in the IF stage. This will require that the sets are re-calibrated if 980 you are to get accurate results. The SM7030 service kit has a calibration 981 program (for PC) and is available from AOR. 982 983 The signal strength is read from the AGC voltage within the 7030 so AGC 984 should be switched on and RF Gain set to maximum. To read AGC voltage send 985 opcode 02EH (execute routine 14) and the receiver will return a single byte 986 value between 0 and 255 which is the measured AGC voltage. 987 988 The calibration table is stored in EEPROM, so the control software should 989 read this when connection to the receiver is established and store the data 990 in an array for computing. 991 992 Calibration data is 8 bytes long and is stored in Page2 at locations 993 500 (0x01F4) to 507 (0x01FB). Use the PaGE opcode (0x52) then SRH, ADR, ADH 994 to setup the address, then 8 RDD opcodes to read the data, as below :- 995 996 Opcode Hex Operation 997 998 PGE 2 0x52 Set page 2 999 SRH 15 0x3F H register = 15 1000 ADR 4 0x44 Set address 0x0F4 1001 ADH 1 0x11 Set address 0x1F4 1002 RDD +1 0x71 Read byte 1 of cal data 1003 RDD +1 0x71 Read byte 2 of cal data 1004 . . . 1005 RDD +1 0x71 Read byte 8 of cal data 1006 1007 PGE 0 0x50 Return to page 0 for subsequent control operations 1008 1009 The first byte of calibration data holds the value of the AGC voltage for a 1010 signal level of -113dBm (S1). Successive bytes hold the incremental values 1011 for 10dB increases in signal level :- 1012 1013 Cal data Typical Value RF signal level 1014 1015 byte 1 64 -113dBm 1016 byte 2 10 -103dBm 1017 byte 3 10 -93dBm 1018 byte 4 12 -83dBm 1019 byte 5 12 -73dBm 1020 byte 6 15 -63dBm 1021 byte 7 30 -43dBm (note 20dB step) 1022 byte 8 20 -23dBm (note 20dB step) 1023 */ 1024 #define CAL_TAB_LENGTH (8) 1025 #define STEP_SIZE_LOW (10) 1026 #define STEP_SIZE_HIGH (20) 1027 1028 /* 1029 To calculate the signal level, table values should be subtracted from the AGC 1030 voltage in turn until a negative value would result. This gives the rough 1031 level from the table position. The accuracy can be improved by proportioning 1032 the remainder into the next table step. See the following example :- 1033 1034 A read signal strength operation returns a value of 100 1035 Subtract cal byte 1 (64) leaves 36 level > -113dBm 1036 Subtract cal byte 2 (10) leaves 26 level > -103dBm 1037 Subtract cal byte 3 (10) leaves 16 level > -93dBm 1038 Subtract cal byte 4 (12) leaves 4 level > -83dBm 1039 Test cal byte 5 (12) - no subtraction 1040 Fine adjustment value = (remainder) / (cal byte 5) * (level step) 1041 = 4 / 12 * 10 = 3dB 1042 Signal level = -83dBm + 3dB = -80dB 1043 1044 The receiver can operate the RF attenuator automatically if the signal level 1045 is likely to overload the RF stages. Reading the RFAGC byte (page 0, location 1046 49) gives the attenuation in 10dB steps. This value should be read and added 1047 to the value calculated above. 1048 1049 Further discussion has taken place on the subject of PC control with the 1050 designer, the comments may be of assistance to other operators... 1051 1052 As far as I can tell all of the commands and operations work exactly as 1053 documented so when the client talks of "the set frequency command doesn't 1054 work" they are obviously doing something wrong. 1055 1056 Similarly, I am unable to duplicate the effects that they notice with 1057 changing audio settings after changing modes. There are some issues with the 1058 parameters that they are changing which I will address later, but first they 1059 must sort out the basic communication so that the receiver control is as 1060 expected. Further issues cannot really be sorted until this is working 1061 properly. 1062 1063 Programming issues... 1064 1065 Since I have no Knowledge of what programming system the client is using 1066 these are only general comments. The receiver control is in 8-bit binary code 1067 so any communication must maintain all 8 bits (and not truncate bit 7 as some 1068 printer outputs do). 1069 1070 It is also essential that no extra characters are added to the output stream 1071 so check that the software is not adding carriage returns, line feeds, nulls 1072 or end-of-file markers to the output. If this might be a problem, monitor the 1073 computer to receiver communication with a serial line monitor or another 1074 computer running a simple RS-232 reading program. 1075 1076 There is some sample BASIC code in the "AR-7030 Computer remote control 1077 protocol" document which gives subroutines that cover the commonly used 1078 receiver settings. Use this as a starting point for your own routines. The 1079 published routines have been thoroughly tested and work without problems. 1080 1081 http://www.aoruk.com/pdf/comp.pdf 1082 http://www.aoruk.com/7030bulletin.htm#7030_rs232_s-meter 1083 1084 With all "buffered" RS-232 connections it is possible for the computer and 1085 receiver to get out of step when using two-way communication. For this reason 1086 I included some "flush input buffer" routines in the sample code. Using these 1087 ensures that missed characters or extra characters inserted due to noise or 1088 disconnection do not disrupt communication between the computer and receiver, 1089 and a recovery after communications failure can be automatic. 1090 1091 Because the receiver's remote control is by direct access to memory and 1092 processor it is a very flexible system but is also able to disrupt receiver 1093 operation if incorrectly used. Only a few bytes of information stored in the 1094 receiver's memory affect S-meter calibration and AOR (UK) hold records of 1095 this data for each receiver made so that in the event of corruption it can be 1096 re-programmed. 1097 1098 See the note that follows regarding AGC calibration. 1099 1100 All other working memory contents can be set to sensible values by a "Set 1101 defaults" operation from the front panel. Most, but not all, of the working 1102 memory is re-established by executing a remote "Reset" command (0x20) which 1103 can be done as a last resort after control failure. 1104 1105 Specific parameter settings... 1106 1107 The client describes the correct operations for setting mode and frequency 1108 but if, as he states, the set frequency command (021h) does not work then 1109 this needs to be investigated. This may lead to discovering the cause of 1110 other problems suffered by the client. 1111 1112 Note that changing the frequency in this way re-tunes the receiver but does 1113 not update the display on the front panel. A "Display frequency" command is 1114 included for this purpose. 1115 1116 To set the receiver main volume, three locations need to be written - 1117 Page 0, addr 0x1e, 0x1f & 0x20. Details are in the protocol document, note the 1118 minimum value (for zero volume) is 15. The aux channel level change is as 1119 described by the client and after writing new values into the RAM will need 1120 either a "Set audio" command or a "Set all" command to make the change. I can 1121 find no reason for, nor duplicate, the effect of changing mode altering the 1122 aux level so this effect also needs investigating - maybe the clients "write 1123 to memory" is writing too many locations ? 1124 1125 To initialise several receiver parameters I would recommend locking the 1126 receiver, writing all of the required memory data, sending a "Set all" 1127 command and then unlocking if required. There is no need to send individual 1128 "Set" commands after each parameter. 1129 1130 Unless very special requirements are needed (mainly test, setup and alignment 1131 ) the 3 rxcon locations should not be written. When a "Set all" command is 1132 sent these will be programmed by the receiver firmware to appropriate values 1133 for the mode, frequency and filters selected. 1134 1135 Only the parameters that need changing need to be written, all other values 1136 will be maintained. The locations that the client needs to program for the 1137 parameters he lists are as follows:- 1138 1139 (all Page 0) 1140 frequency frequ 0x1a 0x1b 0x1c 1141 mode mode 0x1d 1142 volume af_vol 0x1e 0x1f 0x20 (values=0x0f 0x07 0x07 for min volume) 1143 aux level af_axl 0x23 0x24 1144 agc speed agcspd 0x32 1145 squelch sqlval 0x33 1146 filter filter 0x34 1147 IF gain ifgain 0x18 1148 RF gain rfgain 0x30 (value=0x01 for no pre-amp) 1149 message wbuff 0x59 (max 26 bytes) 1150 1151 If the required parameter values are unknown, I recommend setting the 1152 receiver as required through the front panel controls and then reading the 1153 value of the memory locations affected using the "read data" operation. 1154 1155 15) Sample routines (in MS QBASIC) 1156 1157 REM Sample subroutines for communication with the AR-7030 A-type 1158 REM These subroutines use the following variables :- 1159 REM rx.freq# frequency in kHz (double precision) 1160 REM rx.mode mode number (1 to 7) 1161 REM rx.filt filter number (1 to 6) 1162 REM rx.mem memory number (0 to 99) 1163 REM rx.pbs passband shift value (-4.2 to +4.2 in kHz) 1164 REM rx.sql squelch value (0 to 255) 1165 REM ident$ -model number, revision and type 1166 1167 REM Subroutine to open comms link to receiver 1168 open.link: 1169 open "com1:1200,n,8,1,cd0,cs0,ds0,rs" for random as #1 len = 1 1170 field #1, 1 as input.byte$ 1171 return 1172 1173 REM Subroutine to flush QBASIC serial input buffer 1174 flush.buffer: 1175 print #1,"//"; 1176 do 1177 time.mark# = timer 1178 do while timer - time.mark# < 0.2 1179 loop 1180 if eof(1) then exit do 1181 get #1 1182 loop 1183 return 1184 1185 REM Subroutines to lock and unlock receiver controls 1186 lock.rx: 1187 print #1,chr$(&H81); ' Set lockout level 1 1188 return 1189 1190 unlock.rx: 1191 print #1,chr$(&H80); ' Lockout level 0 (not locked) 1192 return 1193 1194 REM Subroutine to read byte from comms link 1195 read.byte: 1196 read.value = -1 ' Value assigned for read error 1197 time.mark# = timer 1198 print #1,chr$(&H71); ' Read byte command 1199 do while timer - time.mark# < 0.3 1200 if eof(1) = 0 then 1201 get #1 1202 read.value = asc(input.byte$) 1203 exit do 1204 end if 1205 loop 1206 return 1207 1208 REM Subroutine to set receiver frequency and mode 1209 tune.rx: 1210 gosub lock.rx 1211 print #1,chr$(&H50); ' Select working mem (page 0) 1212 print #1,chr$(&H31);chr$(&H4A); ' Frequency address = 01AH 1213 gosub send.freq ' Write frequency 1214 print #1,chr$(&H60+rx.mode); ' Write mode 1215 print #1,chr$(&H24); ' Tune receiver 1216 gosub unlock.rx 1217 return 1218 1219 REM Subroutine to store data into receiver's frequency memory 1220 set.memory: 1221 mem.loc = rx.mem+156 ' Squelch memory origin 1222 mem.h = int(mem.loc/16) 1223 mem.l = mem.loc mod 16 1224 print #1,chr$(&H51); ' Select squelch memory (page 1) 1225 print #1,chr$(&H30+mem.h); 1226 print #1,chr$(&H40+mem.l); ' Set memory address 1227 print #1,chr$(&H30+int(rx.sql/16)) 1228 print #1,chr$(&H60+rx.sql mod 16) ' Write squelch value 1229 mem.loc = rx.mem*4 ' Frequency memory origin 1230 mem.t = int(mem.loc/256) 1231 mem.loc = mem.loc mod 256 1232 mem.h = int(mem.loc/16) 1233 mem.l = mem.loc mod 16 1234 print #1,chr$(&H52); ' Select frequency memory (page 2) 1235 print #1,chr$(&H30+mem.h); 1236 print #1,chr$(&H40+mem.l); ' Set memory address 1237 print #1,chr$(&H10+mem.t); 1238 gosub send.freq ' Write frequency 1239 print #1,chr$(&H30+rx.filt); 1240 print #1,chr$(&H60+rx.mode); ' Write filter and mode 1241 mem.loc = rx.mem+400-256 ' PBS memory origin 1242 mem.h = int(mem.loc/16) 1243 mem.l = mem.loc mod 16 1244 pbs.val = 255 and int(rx.pbs/0.033189+0.5) 1245 print #1,chr$(&H30+mem.h); 1246 print #1,chr$(&H40+mem.l); ' Set memory address 1247 print #1,chr$(&H11); 1248 print #1,chr$(&H30+int(pbs.val/16)) 1249 print #1,chr$(&H60+pbs.val mod 16) ' Write passband value 1250 return 1251 1252 REM Subroutine to read data from receiver's frequency memory 1253 read.memory: 1254 mem.loc = rx.mem+156 ' Squelch memory origin 1255 mem.h = int(mem.loc/16) 1256 mem.l = mem.loc mod 16 1257 print #1,chr$(&H51); ' Select squelch memory (page 1) 1258 print #1,chr$(&H30+mem.h); 1259 print #1,chr$(&H40+mem.l); ' Set memory address 1260 gosub read.byte ' Read squelch value 1261 rx.sql = read.value 1262 mem.loc = rx.mem*4 ' Frequency memory origin 1263 mem.t = int(mem.loc/256) 1264 mem.loc = mem.loc mod 256 1265 mem.h = int(mem.loc/16) 1266 mem.l = mem.loc mod 16 1267 print #1,chr$(&H52); ' Select frequency memory (page 2) 1268 print #1,chr$(&H30+mem.h); 1269 print #1,chr$(&H40+mem.l); ' Set memory address 1270 print #1,chr$(&H10+mem.t); 1271 gosub read.freq ' Read frequency 1272 gosub read.byte ' Read filter and mode 1273 if read.value < 0 then return 1274 rx.filt = int(read.value/16) 1275 rx.mode = read.value mod 16 1276 mem.loc = rx.mem+400-256 ' PBS memory origin 1277 mem.h = int(mem.loc/16) 1278 mem.l = mem.loc mod 16 1279 print #1,chr$(&H30+mem.h); 1280 print #1,chr$(&H40+mem.l); ' Set memory address 1281 print #1,chr$(&H11); 1282 gosub read.byte ' Read passband value 1283 if read.value < 0 then return 1284 if read.value > 127 then read.value = 256-read.value 1285 rx.pbs = read.value*0.033189 1286 return 1287 1288 REM Subroutine to read receiver ident string 1289 read.ident: 1290 print #1,chr$(&H5F); ' Select ident memory (page 15) 1291 print #1,chr$(&H40); ' Set address 0 1292 ident$="" 1293 for read.loop = 1 to 8 1294 gosub read.byte ' Read 8-byte ident 1295 if read.value < 0 then exit for 1296 ident$ = ident$+chr$(read.value) 1297 next read.loop 1298 return 1299 1300 REM Subroutine to send frequency (Called only from other routines) 1301 send.freq: 1302 fr.val# = int(rx.freq#*376.635223+0.5) ' Convert kHz to steps 1303 ' Exact multiplicand is 1304 ' (2^24)/44545 1305 print #1,chr$(&H30+int(fr.val#/1048576)); 1306 fr.val# = fr.val# mod 1048576 ' Write frequency as 6 hex digits 1307 print #1,chr$(&H60+int(fr.val#/65536)); 1308 fr.val# = fr.val# mod 65536 1309 print #1,chr$(&H30+int(fr.val#/4096)); 1310 fr.val# = fr.val# mod 4096 1311 print #1,chr$(&H60+int(fr.val#/256)); 1312 fr.val# = fr.val# mod 256 1313 print #1,chr$(&H30+int(fr.val#/16)); 1314 print #1,chr$(&H60+(fr.val# mod 16)); 1315 return 1316 1317 REM Subroutine to read frequency (Called only from other routines) 1318 read.freq: 1319 fr.val# = 0 1320 for read.loop = 1 to 3 1321 gosub read.byte ' Read frequency as 3 bytes 1322 if read.value < 0 then exit for 1323 fr.val# = fr.val#*256+read.value 1324 next read.loop 1325 rx.freq# = fr.val#/376.635223 ' Convert steps to kHz 1326 return 1327 */ 1328 1329 /* 1330 * (from http://www.aoruk.com/archive/pdf/ir.pdf) 1331 * 1332 * AOR AR7030 receiver infrared protocol listing 1333 * 1334 * There have been two types of IR7030 infrared hand controller employed 1335 * by the AR7030. Late in 2005 a VERSION 2 handset (IR7030-2) was adopted 1336 * in production. The protocol is slightly different, so a matching CPU 1337 * must be employed (firmware 1xA or 1xB uses the original IR7030, 1338 * firmware 2xA or 2xB uses the later IR7030-2). 1339 * 1340 * IR7030 IR7030-2 1341 * NEC protocol 16 bit NEC protocol 16 bit 1342 * 1343 * Address 026 HEX Address 04D HEX 1344 * I.R key Hex value I.R key Hex value 1345 * 1 0C 1 11 1346 * 2 11 2 13 1347 * 3 12 3 1C 1348 * 4 10 4 15 1349 * 5 19 5 16 1350 * 6 1A 6 14 1351 * 7 18 7 19 1352 * 8 1D 8 17 1353 * 9 1E 9 1B 1354 * 0 15 0 1D 1355 * . DECIMAL 16 . DECIMAL 12 1356 * CLEAR 13 CLEAR 07 1357 * BACKSPACE 1C BACKSPACE 1F 1358 * kHz 17 kHz 1A 1359 * MHz 1F MHz 1E 1360 * CW/NFM 8 CW/NFM 0F 1361 * LSB/USB 0D LSB/USB 10 1362 * AM/SYNC 0E AM/SYNC 18 1363 * + MODIFY 2 + MODIFY 01 1364 * - MODIFY 6 - MODIFY 0B 1365 * TUNE UP 3 TUNE UP 04 1366 * TUNE DOWN 7 TUNE DOWN 05 1367 * VOLUME UP 0B VOLUME UP 02 1368 * VOLUME DOWN 0F VOLUME DOWN 03 1369 * PASSBAND MODIFY 0 PASSBAND MODIFY 09 1370 * FILTER MODIFY 1 FILTER MODIFY 08 1371 * BASS MODIFY 5 BASS MODIFY 0A 1372 * TREBLE MODIFY 14 TREBLE MODIFY 0C 1373 * VFO SELECT A/B 0A VFO SELECT A/B 0E 1374 * MEMORY STORE 4 MEMORY STORE 0D 1375 * MEMORY PREVIEW 9 MEMORY PREVIEW 00 1376 * MEMORY RECALL 1B MEMORY RECALL 06 1377 * 1378 * www.aoruk.com - 25.07.2006 1379 */ 1380 1381 /* 1382 * These are the translated key codes shown in the last IR code 1383 * address 58 in page 0. 1384 */ 1385 enum IR_CODE_e 1386 { 1387 IR_ONE = 0x12, 1388 IR_TWO = 0x14, 1389 IR_THREE = 0x1d, 1390 IR_FOUR = 0x16, 1391 IR_FIVE = 0x17, 1392 IR_SIX = 0x15, 1393 IR_SEVEN = 0x1a, 1394 IR_EIGHT = 0x18, 1395 IR_NINE = 0x1c, 1396 IR_ZERO = 0x1e, 1397 IR_DOT = 0x13, 1398 IR_CLR = 0x08, 1399 IR_BS = 0x20, 1400 IR_KHZ = 0x1b, 1401 IR_MHZ = 0x1f, 1402 IR_CWFM = 0x10, 1403 IR_LSBUSB = 0x11, 1404 IR_AMSYNC = 0x19, 1405 IR_PLUS = 0x02, 1406 IR_MINUS = 0x0c, 1407 IR_TUN_UP = 0x05, 1408 IR_TUN_DWN = 0x06, 1409 IR_VOL_UP = 0x03, 1410 IR_VOL_DWN = 0x04, 1411 IR_PBS = 0x0a, 1412 IR_TREBLE = 0x0d, 1413 IR_BASS = 0x0b, 1414 IR_VFO = 0x0f, 1415 IR_MEM_STO = 0x0e, 1416 IR_MEM_PRE = 0x01, 1417 IR_MEM_RCL = 0x07, 1418 IR_NONE = -1 1419 }; 1420 1421 /* backend conf */ 1422 #define TOK_CFG_MAGICCONF TOKEN_BACKEND(1) 1423 1424 1425 /* ext_level's and ext_parm's tokens */ 1426 #define TOK_EL_MAGICLEVEL TOKEN_BACKEND(1) 1427 #define TOK_EL_MAGICFUNC TOKEN_BACKEND(2) 1428 #define TOK_EL_MAGICOP TOKEN_BACKEND(3) 1429 #define TOK_EP_MAGICPARM TOKEN_BACKEND(4) 1430 1431 1432 /* Utility function prototypes */ 1433 1434 #if 0 1435 int NOP( RIG *rig, unsigned char x ); 1436 int SRH( RIG *rig, unsigned char x ); 1437 int PGE( RIG *rig, enum PAGE_e page ); 1438 int ADR( RIG *rig, unsigned char x ); 1439 int ADH( RIG *rig, unsigned char x ); 1440 int WRD( RIG *rig, unsigned char out ); 1441 int MSK( RIG *rig, unsigned char mask ); 1442 int EXE( RIG *rig, enum ROUTINE_e routine ); 1443 int RDD( RIG *rig, unsigned char len ); 1444 int LOC( RIG *rig, enum LOCK_LVL_e level ); 1445 int BUT( RIG *rig, enum BUTTON_e button ); 1446 #endif // 0 1447 1448 int execRoutine( RIG * rig, enum ROUTINE_e rtn ); 1449 1450 int writeByte( RIG *rig, enum PAGE_e page, unsigned int addr, unsigned char x ); 1451 int writeShort( RIG *rig, enum PAGE_e page, unsigned int addr, unsigned short x ); 1452 int write3Bytes( RIG *rig, enum PAGE_e page, unsigned int addr, unsigned int x ); 1453 int writeInt( RIG *rig, enum PAGE_e page, unsigned int addr, unsigned int x ); 1454 1455 int readByte( RIG *rig, enum PAGE_e page, unsigned int addr, unsigned char *x ); 1456 int readShort( RIG *rig, enum PAGE_e page, unsigned int addr, unsigned short *x ); 1457 int read3Bytes( RIG *rig, enum PAGE_e page, unsigned int addr, unsigned int *x ); 1458 int readInt( RIG *rig, enum PAGE_e page, unsigned int addr, unsigned int *x ); 1459 1460 int readSignal( RIG * rig, unsigned char *x ); 1461 int flushBuffer( RIG * rig ); 1462 int lockRx( RIG * rig, enum LOCK_LVL_e level ); 1463 1464 int bcd2Int( const unsigned char bcd ); 1465 unsigned char int2BCD( const unsigned int val ); 1466 1467 int getCalLevel( RIG * rig, unsigned char rawAgc, int *dbm ); 1468 int getFilterBW( RIG *rig, enum FILTER_e filter ); 1469 freq_t ddsToHz( const unsigned int steps ); 1470 unsigned int hzToDDS( const freq_t freq ); 1471 float pbsToHz( const unsigned char steps ); 1472 unsigned char hzToPBS( const float freq ); 1473 rmode_t modeToHamlib( const unsigned char mode ); 1474 unsigned char modeToNative( const rmode_t mode ); 1475 enum agc_level_e agcToHamlib( const unsigned char agc ); 1476 unsigned char agcToNative( const enum agc_level_e agc ); 1477 int pageSize( const enum PAGE_e page ); 1478 int sendIRCode( RIG *rig, enum IR_CODE_e code ); 1479 1480 #endif /* _AR7030P_H */ 1481