Home
last modified time | relevance | path

Searched refs:DELAY_EDGE_x0 (Results 1 – 2 of 2) sorted by relevance

/dports/cad/iverilog/verilog-11.0/vvp/
H A Ddelay.h30 DELAY_EDGE_x0, DELAY_EDGE_xz, DELAY_EDGE_zx, enumerator
H A Ddelay.cc551 { DELAY_EDGE_x0, DELAY_EDGE_x1, DELAY_EDGE_xz, DELAY_EDGE_x0 } in delay_from_edge()
912 tmp[DELAY_EDGE_x0] = tmp[DELAY_EDGE_z0] > tmp[DELAY_EDGE_10] ? in modpath_src_put_delays()