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Searched refs:DFLTDVFNAM (Results 1 – 4 of 4) sorted by relevance

/dports/cad/gplcver/gplcver-2.12a.src/src/
H A Dv_dbg2.c3213 if (strcmp(__dv_fnam, DFLTDVFNAM) != 0) in __reset_to_time0()
3216 __dv_fnam = __pv_stralloc(DFLTDVFNAM); in __reset_to_time0()
H A Dv_sim.c713 if (strcmp(__dv_fnam, DFLTDVFNAM) == 0) in exec_slotend_dv()
727 __dv_fnam, DFLTDVFNAM); in exec_slotend_dv()
728 strcpy(__dv_fnam, DFLTDVFNAM); in exec_slotend_dv()
H A Dv.h826 #define DFLTDVFNAM "verilog.dump" macro
H A Dcver.c1935 __dv_fnam = __pv_stralloc(DFLTDVFNAM); in init_ds()