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Searched refs:DMA2_Channel4_BASE (Results 1 – 19 of 19) sorted by relevance

/dports/devel/openocd/openocd-0.11.0/tcl/chip/st/stm32/
H A Dstm32_regs.tcl70 set DMA2_Channel4_BASE [expr $AHBPERIPH_BASE + 0x0444]
/dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/eurorack/stmlib/third_party/STM/CMSIS/CM3_f37x/
H A Dstm32f37x.h905 #define DMA2_Channel4_BASE (AHB1PERIPH_BASE + 0x0444) macro
979 #define DMA2_Channel4 ((DMA_Channel_TypeDef *) DMA2_Channel4_BASE)
/dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/eurorack/stmlib/third_party/STM/CMSIS/CM3_f0xx/
H A Dstm32f0xx.h1067 #define DMA2_Channel4_BASE (DMA2_BASE + 0x00000044) macro
1140 #define DMA2_Channel4 ((DMA_Channel_TypeDef *) DMA2_Channel4_BASE)
/dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/parasites/stmlib/third_party/STM/CMSIS/CM3_f37x/
H A Dstm32f37x.h905 #define DMA2_Channel4_BASE (AHB1PERIPH_BASE + 0x0444) macro
979 #define DMA2_Channel4 ((DMA_Channel_TypeDef *) DMA2_Channel4_BASE)
/dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/parasites/stmlib/third_party/STM/CMSIS/CM3_f10x/
H A Dstm32f10x.h1134 #define DMA2_Channel4_BASE (AHBPERIPH_BASE + 0x0444) macro
1215 #define DMA2_Channel4 ((DMA_Channel_TypeDef *) DMA2_Channel4_BASE)
/dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/eurorack/stmlib/third_party/STM/CMSIS/CM3_f10x/
H A Dstm32f10x.h1134 #define DMA2_Channel4_BASE (AHBPERIPH_BASE + 0x0444) macro
1215 #define DMA2_Channel4 ((DMA_Channel_TypeDef *) DMA2_Channel4_BASE)
/dports/security/py-pyvex/binaries-9.0.5405/tests_src/i2c_master_read-nucleol152re/mbed/TARGET_NUCLEO_L152RE/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/device/
H A Dstm32l152xe.h747 #define DMA2_Channel4_BASE (DMA2_BASE + 0x00000044U) macro
834 #define DMA2_Channel4 ((DMA_Channel_TypeDef *) DMA2_Channel4_BASE)
/dports/devel/py-cle/binaries-9.0.5405/tests_src/i2c_master_read-nucleol152re/mbed/TARGET_NUCLEO_L152RE/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/device/
H A Dstm32l152xe.h747 #define DMA2_Channel4_BASE (DMA2_BASE + 0x00000044U) macro
834 #define DMA2_Channel4 ((DMA_Channel_TypeDef *) DMA2_Channel4_BASE)
/dports/security/py-angr/binaries-9.0.5405/tests_src/i2c_master_read-nucleol152re/mbed/TARGET_NUCLEO_L152RE/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/device/
H A Dstm32l152xe.h747 #define DMA2_Channel4_BASE (DMA2_BASE + 0x00000044U) macro
834 #define DMA2_Channel4 ((DMA_Channel_TypeDef *) DMA2_Channel4_BASE)
/dports/security/py-ailment/binaries-9.0.5405/tests_src/i2c_master_read-nucleol152re/mbed/TARGET_NUCLEO_L152RE/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/device/
H A Dstm32l152xe.h747 #define DMA2_Channel4_BASE (DMA2_BASE + 0x00000044U) macro
834 #define DMA2_Channel4 ((DMA_Channel_TypeDef *) DMA2_Channel4_BASE)
/dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/parasites/stmlib/third_party/STM/CMSIS/CM3_f30x/
H A Dstm32f30x.h1282 #define DMA2_Channel4_BASE (AHB1PERIPH_BASE + 0x00000444) macro
1391 #define DMA2_Channel4 ((DMA_Channel_TypeDef *) DMA2_Channel4_BASE)
/dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/eurorack/stmlib/third_party/STM/CMSIS/CM3_g4xx/
H A Dstm32g431xx.h1017 #define DMA2_Channel4_BASE (DMA2_BASE + 0x0044UL) macro
1155 #define DMA2_Channel4 ((DMA_Channel_TypeDef *) DMA2_Channel4_BASE)
H A Dstm32gbk1cb.h1005 #define DMA2_Channel4_BASE (DMA2_BASE + 0x0044UL) macro
1141 #define DMA2_Channel4 ((DMA_Channel_TypeDef *) DMA2_Channel4_BASE)
H A Dstm32g441xx.h1049 #define DMA2_Channel4_BASE (DMA2_BASE + 0x0044UL) macro
1189 #define DMA2_Channel4 ((DMA_Channel_TypeDef *) DMA2_Channel4_BASE)
H A Dstm32g471xx.h1058 #define DMA2_Channel4_BASE (DMA2_BASE + 0x0044UL) macro
1213 #define DMA2_Channel4 ((DMA_Channel_TypeDef *) DMA2_Channel4_BASE)
H A Dstm32g473xx.h1139 #define DMA2_Channel4_BASE (DMA2_BASE + 0x0044UL) macro
1314 #define DMA2_Channel4 ((DMA_Channel_TypeDef *) DMA2_Channel4_BASE)
H A Dstm32g483xx.h1171 #define DMA2_Channel4_BASE (DMA2_BASE + 0x0044UL) macro
1348 #define DMA2_Channel4 ((DMA_Channel_TypeDef *) DMA2_Channel4_BASE)
H A Dstm32g474xx.h1266 #define DMA2_Channel4_BASE (DMA2_BASE + 0x0044UL) macro
1449 #define DMA2_Channel4 ((DMA_Channel_TypeDef *) DMA2_Channel4_BASE)
H A Dstm32g484xx.h1298 #define DMA2_Channel4_BASE (DMA2_BASE + 0x0044UL) macro
1483 #define DMA2_Channel4 ((DMA_Channel_TypeDef *) DMA2_Channel4_BASE)