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Searched refs:DRAM_PHYM_CLK_ROOT (Results 1 – 25 of 124) sorted by relevance

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/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/arch/arm/mach-imx/mx7/
H A Dclock_slice.c61 {DRAM_PHYM_CLK_ROOT, CCM_DRAM_PHYM_CHANNEL,
527 if (clock_id == DRAM_PHYM_CLK_ROOT) { in clock_set_postdiv()
555 if (clock_id == DRAM_PHYM_CLK_ROOT) { in clock_get_postdiv()
734 if ((clock_id == DRAM_PHYM_CLK_ROOT) || (clock_id == DRAM_CLK_ROOT)) in clock_root_enabled()
/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/arch/arm/mach-imx/mx7/
H A Dclock_slice.c61 {DRAM_PHYM_CLK_ROOT, CCM_DRAM_PHYM_CHANNEL,
527 if (clock_id == DRAM_PHYM_CLK_ROOT) { in clock_set_postdiv()
555 if (clock_id == DRAM_PHYM_CLK_ROOT) { in clock_get_postdiv()
734 if ((clock_id == DRAM_PHYM_CLK_ROOT) || (clock_id == DRAM_CLK_ROOT)) in clock_root_enabled()
/dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/arch/arm/mach-imx/mx7/
H A Dclock_slice.c61 {DRAM_PHYM_CLK_ROOT, CCM_DRAM_PHYM_CHANNEL,
527 if (clock_id == DRAM_PHYM_CLK_ROOT) { in clock_set_postdiv()
555 if (clock_id == DRAM_PHYM_CLK_ROOT) { in clock_get_postdiv()
734 if ((clock_id == DRAM_PHYM_CLK_ROOT) || (clock_id == DRAM_CLK_ROOT)) in clock_root_enabled()
/dports/sysutils/u-boot-olinuxino-lime2-emmc/u-boot-2021.07/arch/arm/mach-imx/mx7/
H A Dclock_slice.c61 {DRAM_PHYM_CLK_ROOT, CCM_DRAM_PHYM_CHANNEL,
527 if (clock_id == DRAM_PHYM_CLK_ROOT) { in clock_set_postdiv()
555 if (clock_id == DRAM_PHYM_CLK_ROOT) { in clock_get_postdiv()
734 if ((clock_id == DRAM_PHYM_CLK_ROOT) || (clock_id == DRAM_CLK_ROOT)) in clock_root_enabled()
/dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/arch/arm/mach-imx/mx7/
H A Dclock_slice.c61 {DRAM_PHYM_CLK_ROOT, CCM_DRAM_PHYM_CHANNEL,
527 if (clock_id == DRAM_PHYM_CLK_ROOT) { in clock_set_postdiv()
555 if (clock_id == DRAM_PHYM_CLK_ROOT) { in clock_get_postdiv()
734 if ((clock_id == DRAM_PHYM_CLK_ROOT) || (clock_id == DRAM_CLK_ROOT)) in clock_root_enabled()
/dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/arch/arm/mach-imx/mx7/
H A Dclock_slice.c61 {DRAM_PHYM_CLK_ROOT, CCM_DRAM_PHYM_CHANNEL,
527 if (clock_id == DRAM_PHYM_CLK_ROOT) { in clock_set_postdiv()
555 if (clock_id == DRAM_PHYM_CLK_ROOT) { in clock_get_postdiv()
734 if ((clock_id == DRAM_PHYM_CLK_ROOT) || (clock_id == DRAM_CLK_ROOT)) in clock_root_enabled()
/dports/sysutils/u-boot-chip/u-boot-2021.07/arch/arm/mach-imx/mx7/
H A Dclock_slice.c61 {DRAM_PHYM_CLK_ROOT, CCM_DRAM_PHYM_CHANNEL,
527 if (clock_id == DRAM_PHYM_CLK_ROOT) { in clock_set_postdiv()
555 if (clock_id == DRAM_PHYM_CLK_ROOT) { in clock_get_postdiv()
734 if ((clock_id == DRAM_PHYM_CLK_ROOT) || (clock_id == DRAM_CLK_ROOT)) in clock_root_enabled()
/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot/arch/arm/mach-imx/mx7/
H A Dclock_slice.c61 {DRAM_PHYM_CLK_ROOT, CCM_DRAM_PHYM_CHANNEL,
527 if (clock_id == DRAM_PHYM_CLK_ROOT) { in clock_set_postdiv()
555 if (clock_id == DRAM_PHYM_CLK_ROOT) { in clock_get_postdiv()
734 if ((clock_id == DRAM_PHYM_CLK_ROOT) || (clock_id == DRAM_CLK_ROOT)) in clock_root_enabled()
/dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/arch/arm/mach-imx/mx7/
H A Dclock_slice.c61 {DRAM_PHYM_CLK_ROOT, CCM_DRAM_PHYM_CHANNEL,
527 if (clock_id == DRAM_PHYM_CLK_ROOT) { in clock_set_postdiv()
555 if (clock_id == DRAM_PHYM_CLK_ROOT) { in clock_get_postdiv()
734 if ((clock_id == DRAM_PHYM_CLK_ROOT) || (clock_id == DRAM_CLK_ROOT)) in clock_root_enabled()
/dports/sysutils/u-boot-sopine/u-boot-2021.07/arch/arm/mach-imx/mx7/
H A Dclock_slice.c61 {DRAM_PHYM_CLK_ROOT, CCM_DRAM_PHYM_CHANNEL,
527 if (clock_id == DRAM_PHYM_CLK_ROOT) { in clock_set_postdiv()
555 if (clock_id == DRAM_PHYM_CLK_ROOT) { in clock_get_postdiv()
734 if ((clock_id == DRAM_PHYM_CLK_ROOT) || (clock_id == DRAM_CLK_ROOT)) in clock_root_enabled()
/dports/sysutils/u-boot-sinovoip-bpi-m3/u-boot-2021.07/arch/arm/mach-imx/mx7/
H A Dclock_slice.c61 {DRAM_PHYM_CLK_ROOT, CCM_DRAM_PHYM_CHANNEL,
527 if (clock_id == DRAM_PHYM_CLK_ROOT) { in clock_set_postdiv()
555 if (clock_id == DRAM_PHYM_CLK_ROOT) { in clock_get_postdiv()
734 if ((clock_id == DRAM_PHYM_CLK_ROOT) || (clock_id == DRAM_CLK_ROOT)) in clock_root_enabled()
/dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/arch/arm/mach-imx/mx7/
H A Dclock_slice.c61 {DRAM_PHYM_CLK_ROOT, CCM_DRAM_PHYM_CHANNEL,
527 if (clock_id == DRAM_PHYM_CLK_ROOT) { in clock_set_postdiv()
555 if (clock_id == DRAM_PHYM_CLK_ROOT) { in clock_get_postdiv()
734 if ((clock_id == DRAM_PHYM_CLK_ROOT) || (clock_id == DRAM_CLK_ROOT)) in clock_root_enabled()
/dports/sysutils/u-boot-a13-olinuxino/u-boot-2021.07/arch/arm/mach-imx/mx7/
H A Dclock_slice.c61 {DRAM_PHYM_CLK_ROOT, CCM_DRAM_PHYM_CHANNEL,
527 if (clock_id == DRAM_PHYM_CLK_ROOT) { in clock_set_postdiv()
555 if (clock_id == DRAM_PHYM_CLK_ROOT) { in clock_get_postdiv()
734 if ((clock_id == DRAM_PHYM_CLK_ROOT) || (clock_id == DRAM_CLK_ROOT)) in clock_root_enabled()
/dports/sysutils/u-boot-sopine-spi/u-boot-2021.07/arch/arm/mach-imx/mx7/
H A Dclock_slice.c61 {DRAM_PHYM_CLK_ROOT, CCM_DRAM_PHYM_CHANNEL,
527 if (clock_id == DRAM_PHYM_CLK_ROOT) { in clock_set_postdiv()
555 if (clock_id == DRAM_PHYM_CLK_ROOT) { in clock_get_postdiv()
734 if ((clock_id == DRAM_PHYM_CLK_ROOT) || (clock_id == DRAM_CLK_ROOT)) in clock_root_enabled()
/dports/sysutils/u-boot-qemu-arm64/u-boot-2021.07/arch/arm/mach-imx/mx7/
H A Dclock_slice.c61 {DRAM_PHYM_CLK_ROOT, CCM_DRAM_PHYM_CHANNEL,
527 if (clock_id == DRAM_PHYM_CLK_ROOT) { in clock_set_postdiv()
555 if (clock_id == DRAM_PHYM_CLK_ROOT) { in clock_get_postdiv()
734 if ((clock_id == DRAM_PHYM_CLK_ROOT) || (clock_id == DRAM_CLK_ROOT)) in clock_root_enabled()
/dports/sysutils/u-boot-rpi-0-w/u-boot-2021.07/arch/arm/mach-imx/mx7/
H A Dclock_slice.c61 {DRAM_PHYM_CLK_ROOT, CCM_DRAM_PHYM_CHANNEL,
527 if (clock_id == DRAM_PHYM_CLK_ROOT) { in clock_set_postdiv()
555 if (clock_id == DRAM_PHYM_CLK_ROOT) { in clock_get_postdiv()
734 if ((clock_id == DRAM_PHYM_CLK_ROOT) || (clock_id == DRAM_CLK_ROOT)) in clock_root_enabled()
/dports/sysutils/u-boot-nanopi-r4s/u-boot-2021.07/arch/arm/mach-imx/mx7/
H A Dclock_slice.c61 {DRAM_PHYM_CLK_ROOT, CCM_DRAM_PHYM_CHANNEL,
527 if (clock_id == DRAM_PHYM_CLK_ROOT) { in clock_set_postdiv()
555 if (clock_id == DRAM_PHYM_CLK_ROOT) { in clock_get_postdiv()
734 if ((clock_id == DRAM_PHYM_CLK_ROOT) || (clock_id == DRAM_CLK_ROOT)) in clock_root_enabled()
/dports/sysutils/u-boot-nanopi-neo/u-boot-2021.07/arch/arm/mach-imx/mx7/
H A Dclock_slice.c61 {DRAM_PHYM_CLK_ROOT, CCM_DRAM_PHYM_CHANNEL,
527 if (clock_id == DRAM_PHYM_CLK_ROOT) { in clock_set_postdiv()
555 if (clock_id == DRAM_PHYM_CLK_ROOT) { in clock_get_postdiv()
734 if ((clock_id == DRAM_PHYM_CLK_ROOT) || (clock_id == DRAM_CLK_ROOT)) in clock_root_enabled()
/dports/sysutils/u-boot-nanopi-neo-air/u-boot-2021.07/arch/arm/mach-imx/mx7/
H A Dclock_slice.c61 {DRAM_PHYM_CLK_ROOT, CCM_DRAM_PHYM_CHANNEL,
527 if (clock_id == DRAM_PHYM_CLK_ROOT) { in clock_set_postdiv()
555 if (clock_id == DRAM_PHYM_CLK_ROOT) { in clock_get_postdiv()
734 if ((clock_id == DRAM_PHYM_CLK_ROOT) || (clock_id == DRAM_CLK_ROOT)) in clock_root_enabled()
/dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot/arch/arm/mach-imx/mx7/
H A Dclock_slice.c61 {DRAM_PHYM_CLK_ROOT, CCM_DRAM_PHYM_CHANNEL,
527 if (clock_id == DRAM_PHYM_CLK_ROOT) { in clock_set_postdiv()
555 if (clock_id == DRAM_PHYM_CLK_ROOT) { in clock_get_postdiv()
734 if ((clock_id == DRAM_PHYM_CLK_ROOT) || (clock_id == DRAM_CLK_ROOT)) in clock_root_enabled()
/dports/sysutils/u-boot-cubieboard/u-boot-2021.07/arch/arm/mach-imx/mx7/
H A Dclock_slice.c61 {DRAM_PHYM_CLK_ROOT, CCM_DRAM_PHYM_CHANNEL,
527 if (clock_id == DRAM_PHYM_CLK_ROOT) { in clock_set_postdiv()
555 if (clock_id == DRAM_PHYM_CLK_ROOT) { in clock_get_postdiv()
734 if ((clock_id == DRAM_PHYM_CLK_ROOT) || (clock_id == DRAM_CLK_ROOT)) in clock_root_enabled()
/dports/sysutils/u-boot-clearfog/u-boot-2021.07/arch/arm/mach-imx/mx7/
H A Dclock_slice.c61 {DRAM_PHYM_CLK_ROOT, CCM_DRAM_PHYM_CHANNEL,
527 if (clock_id == DRAM_PHYM_CLK_ROOT) { in clock_set_postdiv()
555 if (clock_id == DRAM_PHYM_CLK_ROOT) { in clock_get_postdiv()
734 if ((clock_id == DRAM_PHYM_CLK_ROOT) || (clock_id == DRAM_CLK_ROOT)) in clock_root_enabled()
/dports/sysutils/u-boot-cubieboard2/u-boot-2021.07/arch/arm/mach-imx/mx7/
H A Dclock_slice.c61 {DRAM_PHYM_CLK_ROOT, CCM_DRAM_PHYM_CHANNEL,
527 if (clock_id == DRAM_PHYM_CLK_ROOT) { in clock_set_postdiv()
555 if (clock_id == DRAM_PHYM_CLK_ROOT) { in clock_get_postdiv()
734 if ((clock_id == DRAM_PHYM_CLK_ROOT) || (clock_id == DRAM_CLK_ROOT)) in clock_root_enabled()
/dports/sysutils/u-boot-orangepi-zero/u-boot-2021.07/arch/arm/mach-imx/mx7/
H A Dclock_slice.c61 {DRAM_PHYM_CLK_ROOT, CCM_DRAM_PHYM_CHANNEL,
527 if (clock_id == DRAM_PHYM_CLK_ROOT) { in clock_set_postdiv()
555 if (clock_id == DRAM_PHYM_CLK_ROOT) { in clock_get_postdiv()
734 if ((clock_id == DRAM_PHYM_CLK_ROOT) || (clock_id == DRAM_CLK_ROOT)) in clock_root_enabled()
/dports/sysutils/u-boot-pandaboard/u-boot-2021.07/arch/arm/mach-imx/mx7/
H A Dclock_slice.c61 {DRAM_PHYM_CLK_ROOT, CCM_DRAM_PHYM_CHANNEL,
527 if (clock_id == DRAM_PHYM_CLK_ROOT) { in clock_set_postdiv()
555 if (clock_id == DRAM_PHYM_CLK_ROOT) { in clock_get_postdiv()
734 if ((clock_id == DRAM_PHYM_CLK_ROOT) || (clock_id == DRAM_CLK_ROOT)) in clock_root_enabled()

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