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Searched refs:DRC1 (Results 1 – 25 of 38) sorted by relevance

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/dports/devel/tigcc/tigcc-0.96.b8_10/gnu/binutils-2.16.1/opcodes/
H A Dalpha-opc.c129 #define DRC1 (RCA + 1) macro
134 #define DRC2 (DRC1 + 1)
470 #define ARG_OPR { RA, RB, DRC1 }
471 #define ARG_OPRL { RA, LIT, DRC1 }
472 #define ARG_OPRZ1 { ZA, RB, DRC1 }
/dports/lang/gnatdroid-binutils-x86/binutils-2.27/opcodes/
H A Dalpha-opc.c247 #define DRC1 (RCA + 1) macro
252 #define DRC2 (DRC1 + 1)
415 #define ARG_OPR { RA, RB, DRC1 }
416 #define ARG_OPRL { RA, LIT, DRC1 }
417 #define ARG_OPRZ1 { ZA, RB, DRC1 }
/dports/devel/zpu-gcc/zpu-toolchain-1.0/toolchain/binutils/opcodes/
H A Dalpha-opc.c128 #define DRC1 (RCA + 1) macro
133 #define DRC2 (DRC1 + 1)
469 #define ARG_OPR { RA, RB, DRC1 }
470 #define ARG_OPRL { RA, LIT, DRC1 }
471 #define ARG_OPRZ1 { ZA, RB, DRC1 }
/dports/devel/arm-elf-binutils/binutils-2.37/opcodes/
H A Dalpha-opc.c247 #define DRC1 (RCA + 1) macro
252 #define DRC2 (DRC1 + 1)
415 #define ARG_OPR { RA, RB, DRC1 }
416 #define ARG_OPRL { RA, LIT, DRC1 }
417 #define ARG_OPRZ1 { ZA, RB, DRC1 }
/dports/devel/avr-gdb/gdb-7.3.1/opcodes/
H A Dalpha-opc.c248 #define DRC1 (RCA + 1) macro
253 #define DRC2 (DRC1 + 1)
416 #define ARG_OPR { RA, RB, DRC1 }
417 #define ARG_OPRL { RA, LIT, DRC1 }
418 #define ARG_OPRZ1 { ZA, RB, DRC1 }
/dports/lang/gnatdroid-binutils/binutils-2.27/opcodes/
H A Dalpha-opc.c247 #define DRC1 (RCA + 1) macro
252 #define DRC2 (DRC1 + 1)
415 #define ARG_OPR { RA, RB, DRC1 }
416 #define ARG_OPRL { RA, LIT, DRC1 }
417 #define ARG_OPRZ1 { ZA, RB, DRC1 }
/dports/devel/gdb/gdb-11.1/opcodes/
H A Dalpha-opc.c247 #define DRC1 (RCA + 1) macro
252 #define DRC2 (DRC1 + 1)
415 #define ARG_OPR { RA, RB, DRC1 }
416 #define ARG_OPRL { RA, LIT, DRC1 }
417 #define ARG_OPRZ1 { ZA, RB, DRC1 }
/dports/devel/gdb761/gdb-7.6.1/opcodes/
H A Dalpha-opc.c248 #define DRC1 (RCA + 1) macro
253 #define DRC2 (DRC1 + 1)
416 #define ARG_OPR { RA, RB, DRC1 }
417 #define ARG_OPRL { RA, LIT, DRC1 }
418 #define ARG_OPRZ1 { ZA, RB, DRC1 }
/dports/devel/gnulibiberty/binutils-2.37/opcodes/
H A Dalpha-opc.c247 #define DRC1 (RCA + 1) macro
252 #define DRC2 (DRC1 + 1)
415 #define ARG_OPR { RA, RB, DRC1 }
416 #define ARG_OPRL { RA, LIT, DRC1 }
417 #define ARG_OPRZ1 { ZA, RB, DRC1 }
/dports/devel/zpu-binutils/zpu-toolchain-1.0/toolchain/binutils/opcodes/
H A Dalpha-opc.c128 #define DRC1 (RCA + 1)
133 #define DRC2 (DRC1 + 1)
469 #define ARG_OPR { RA, RB, DRC1 }
470 #define ARG_OPRL { RA, LIT, DRC1 }
471 #define ARG_OPRZ1 { ZA, RB, DRC1 }
/dports/devel/djgpp-binutils/binutils-2.17/opcodes/
H A Dalpha-opc.c248 #define DRC1 (RCA + 1) macro
253 #define DRC2 (DRC1 + 1)
416 #define ARG_OPR { RA, RB, DRC1 }
417 #define ARG_OPRL { RA, LIT, DRC1 }
418 #define ARG_OPRZ1 { ZA, RB, DRC1 }
/dports/devel/binutils/binutils-2.37/opcodes/
H A Dalpha-opc.c247 #define DRC1 (RCA + 1) macro
252 #define DRC2 (DRC1 + 1)
415 #define ARG_OPR { RA, RB, DRC1 }
416 #define ARG_OPRL { RA, LIT, DRC1 }
417 #define ARG_OPRZ1 { ZA, RB, DRC1 }
/dports/emulators/qemu/qemu-6.2.0/disas/
H A Dalpha.c345 #define DRC1 (RCA + 1) macro
350 #define DRC2 (DRC1 + 1)
654 #define ARG_OPR { RA, RB, DRC1 }
655 #define ARG_OPRL { RA, LIT, DRC1 }
656 #define ARG_OPRZ1 { ZA, RB, DRC1 }
/dports/emulators/qemu42/qemu-4.2.1/disas/
H A Dalpha.c345 #define DRC1 (RCA + 1) macro
350 #define DRC2 (DRC1 + 1)
654 #define ARG_OPR { RA, RB, DRC1 }
655 #define ARG_OPRL { RA, LIT, DRC1 }
656 #define ARG_OPRZ1 { ZA, RB, DRC1 }
/dports/emulators/x49gp/x49gp/x49gp-code/qemu/qemu-git/
H A Dalpha-dis.c346 #define DRC1 (RCA + 1) macro
351 #define DRC2 (DRC1 + 1)
655 #define ARG_OPR { RA, RB, DRC1 }
656 #define ARG_OPRL { RA, LIT, DRC1 }
657 #define ARG_OPRZ1 { ZA, RB, DRC1 }
/dports/emulators/qemu60/qemu-6.0.0/disas/
H A Dalpha.c345 #define DRC1 (RCA + 1) macro
350 #define DRC2 (DRC1 + 1)
654 #define ARG_OPR { RA, RB, DRC1 }
655 #define ARG_OPRL { RA, LIT, DRC1 }
656 #define ARG_OPRZ1 { ZA, RB, DRC1 }
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/disas/
H A Dalpha.c345 #define DRC1 (RCA + 1) macro
350 #define DRC2 (DRC1 + 1)
654 #define ARG_OPR { RA, RB, DRC1 }
655 #define ARG_OPRL { RA, LIT, DRC1 }
656 #define ARG_OPRZ1 { ZA, RB, DRC1 }
/dports/emulators/qemu5/qemu-5.2.0/disas/
H A Dalpha.c345 #define DRC1 (RCA + 1) macro
350 #define DRC2 (DRC1 + 1)
654 #define ARG_OPR { RA, RB, DRC1 }
655 #define ARG_OPRL { RA, LIT, DRC1 }
656 #define ARG_OPRZ1 { ZA, RB, DRC1 }
/dports/emulators/qemu-utils/qemu-4.2.1/disas/
H A Dalpha.c345 #define DRC1 (RCA + 1) macro
350 #define DRC2 (DRC1 + 1)
654 #define ARG_OPR { RA, RB, DRC1 }
655 #define ARG_OPRL { RA, LIT, DRC1 }
656 #define ARG_OPRZ1 { ZA, RB, DRC1 }
/dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/disas/
H A Dalpha.c345 #define DRC1 (RCA + 1) macro
350 #define DRC2 (DRC1 + 1)
654 #define ARG_OPR { RA, RB, DRC1 }
655 #define ARG_OPRL { RA, LIT, DRC1 }
656 #define ARG_OPRZ1 { ZA, RB, DRC1 }
/dports/emulators/qemu-guest-agent/qemu-5.0.1/disas/
H A Dalpha.c345 #define DRC1 (RCA + 1) macro
350 #define DRC2 (DRC1 + 1)
654 #define ARG_OPR { RA, RB, DRC1 }
655 #define ARG_OPRL { RA, LIT, DRC1 }
656 #define ARG_OPRZ1 { ZA, RB, DRC1 }
/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/disas/
H A Dalpha.c345 #define DRC1 (RCA + 1) macro
350 #define DRC2 (DRC1 + 1)
654 #define ARG_OPR { RA, RB, DRC1 }
655 #define ARG_OPRL { RA, LIT, DRC1 }
656 #define ARG_OPRZ1 { ZA, RB, DRC1 }
/dports/devel/asl/asl-current/include/
H A Dregh16.inc251 DRC1 bit #15,CHCRB ; Device Address Register Change
/dports/multimedia/libv4l/linux-5.13-rc2/Documentation/powerpc/
H A Dpapr_hcalls.rst104 +--+ DRC1 | | DRC | Space |
/dports/multimedia/v4l-utils/linux-5.13-rc2/Documentation/powerpc/
H A Dpapr_hcalls.rst104 +--+ DRC1 | | DRC | Space |

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