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Searched refs:DRC_PC (Results 1 – 10 of 10) sorted by relevance

/dports/emulators/mess/mame-mame0226/src/devices/cpu/arm7/
H A Darm7tdrc.hxx182 UML_ADD(block, DRC_PC, DRC_PC, 2); in drctg00_0()
214 UML_ADD(block, DRC_PC, DRC_PC, 2); in drctg00_1()
260 UML_ADD(block, DRC_PC, DRC_PC, 2); in drctg01_0()
314 UML_ADD(block, DRC_PC, DRC_PC, 2); in drctg02_0()
360 UML_ADD(block, DRC_PC, DRC_PC, 2); in drctg04_00_00()
372 UML_ADD(block, DRC_PC, DRC_PC, 2); in drctg04_00_01()
419 UML_ADD(block, DRC_PC, DRC_PC, 2); in drctg04_00_02()
464 UML_ADD(block, DRC_PC, DRC_PC, 2); in drctg04_00_03()
510 UML_ADD(block, DRC_PC, DRC_PC, 2); in drctg04_00_04()
561 UML_ADD(block, DRC_PC, DRC_PC, 2); in drctg04_00_07()
[all …]
H A Darm7help.h55 UML_ADD(block, DRC_PC, DRC_PC, 2);
97 UML_ADD(block, DRC_PC, DRC_PC, 2);
127 #define DRC_PC uml::mem(&R15) macro
141 UML_ADD(block, DRC_PC, DRC_PC, 4);
H A Darm7drc.hxx1360 UML_TEST(block, DRC_PC, 1); in drcarm7ops_0123()
1363 UML_AND(block, DRC_PC, DRC_PC, ~1); in drcarm7ops_0123()
1371 UML_ADD(block, DRC_PC, DRC_PC, 4); in drcarm7ops_0123()
1383 UML_ADD(block, DRC_PC, DRC_PC, 4); in drcarm7ops_0123()
1402 UML_ADD(block, DRC_PC, DRC_PC, 4); in drcarm7ops_0123()
1415 UML_ADD(block, DRC_PC, DRC_PC, 4); in drcarm7ops_0123()
1434 UML_ADD(block, DRC_PC, DRC_PC, 4); in drcarm7ops_0123()
1468 UML_ADD(block, DRC_PC, DRC_PC, 4); in drcarm7ops_0123()
1682 UML_AND(block, uml::I0, DRC_PC, ~1); in generate_opcode()
1686 UML_AND(block, uml::I0, DRC_PC, ~3); in generate_opcode()
[all …]
/dports/emulators/mame/mame-mame0226/src/devices/cpu/arm7/
H A Darm7tdrc.hxx182 UML_ADD(block, DRC_PC, DRC_PC, 2); in drctg00_0()
214 UML_ADD(block, DRC_PC, DRC_PC, 2); in drctg00_1()
260 UML_ADD(block, DRC_PC, DRC_PC, 2); in drctg01_0()
314 UML_ADD(block, DRC_PC, DRC_PC, 2); in drctg02_0()
360 UML_ADD(block, DRC_PC, DRC_PC, 2); in drctg04_00_00()
372 UML_ADD(block, DRC_PC, DRC_PC, 2); in drctg04_00_01()
419 UML_ADD(block, DRC_PC, DRC_PC, 2); in drctg04_00_02()
464 UML_ADD(block, DRC_PC, DRC_PC, 2); in drctg04_00_03()
510 UML_ADD(block, DRC_PC, DRC_PC, 2); in drctg04_00_04()
561 UML_ADD(block, DRC_PC, DRC_PC, 2); in drctg04_00_07()
[all …]
H A Darm7help.h55 UML_ADD(block, DRC_PC, DRC_PC, 2);
97 UML_ADD(block, DRC_PC, DRC_PC, 2);
127 #define DRC_PC uml::mem(&R15) macro
141 UML_ADD(block, DRC_PC, DRC_PC, 4);
H A Darm7drc.hxx1360 UML_TEST(block, DRC_PC, 1); in drcarm7ops_0123()
1363 UML_AND(block, DRC_PC, DRC_PC, ~1); in drcarm7ops_0123()
1371 UML_ADD(block, DRC_PC, DRC_PC, 4); in drcarm7ops_0123()
1383 UML_ADD(block, DRC_PC, DRC_PC, 4); in drcarm7ops_0123()
1402 UML_ADD(block, DRC_PC, DRC_PC, 4); in drcarm7ops_0123()
1415 UML_ADD(block, DRC_PC, DRC_PC, 4); in drcarm7ops_0123()
1434 UML_ADD(block, DRC_PC, DRC_PC, 4); in drcarm7ops_0123()
1468 UML_ADD(block, DRC_PC, DRC_PC, 4); in drcarm7ops_0123()
1682 UML_AND(block, uml::I0, DRC_PC, ~1); in generate_opcode()
1686 UML_AND(block, uml::I0, DRC_PC, ~3); in generate_opcode()
[all …]
/dports/emulators/mess/mame-mame0226/src/devices/cpu/e132xs/
H A De132xsdrc_ops.hxx31 UML_ADD(block, DRC_PC, DRC_PC, 4); in generate_decode_const()
41 UML_ADD(block, DRC_PC, DRC_PC, 2); in generate_decode_const()
58 UML_ADD(block, DRC_PC, DRC_PC, 4); in generate_decode_immediate_s()
65 UML_ADD(block, DRC_PC, DRC_PC, 2); in generate_decode_immediate_s()
72 UML_ADD(block, DRC_PC, DRC_PC, 2); in generate_decode_immediate_s()
107 UML_ADD(block, DRC_PC, DRC_PC, 2); in generate_decode_pcrel()
126 UML_ADD(block, DRC_PC, DRC_PC, 2); in generate_ignore_pcrel()
715 UML_ADD(block, DRC_PC, DRC_PC, 4); in generate_xm()
719 UML_ADD(block, DRC_PC, DRC_PC, 2); in generate_xm()
3265 UML_ADD(block, DRC_PC, DRC_PC, 4); in generate_ldxx1()
[all …]
H A De132xsdrc.cpp9 #define DRC_PC uml::mem(m_core->global_regs) macro
364 UML_AND(block, I1, DRC_PC, ~1); in static_generate_exception()
375 UML_MOV(block, DRC_PC, I0); in static_generate_exception()
765 UML_EXHc(block, uml::COND_S, *m_out_of_cycles, DRC_PC); in generate_update_cycles()
766 UML_EXHc(block, uml::COND_Z, *m_out_of_cycles, DRC_PC); in generate_update_cycles()
883 UML_HASHJMP(block, 0, DRC_PC, *m_nocode); in generate_branch()
921 UML_MOV(block, DRC_PC, desc->pc); in generate_sequence_instruction()
934 UML_ADD(block, DRC_PC, DRC_PC, 2); in generate_opcode()
1203 UML_HASHJMP(block, 0, DRC_PC, *m_nocode); in generate_opcode()
/dports/emulators/mame/mame-mame0226/src/devices/cpu/e132xs/
H A De132xsdrc_ops.hxx31 UML_ADD(block, DRC_PC, DRC_PC, 4); in generate_decode_const()
41 UML_ADD(block, DRC_PC, DRC_PC, 2); in generate_decode_const()
58 UML_ADD(block, DRC_PC, DRC_PC, 4); in generate_decode_immediate_s()
65 UML_ADD(block, DRC_PC, DRC_PC, 2); in generate_decode_immediate_s()
72 UML_ADD(block, DRC_PC, DRC_PC, 2); in generate_decode_immediate_s()
107 UML_ADD(block, DRC_PC, DRC_PC, 2); in generate_decode_pcrel()
126 UML_ADD(block, DRC_PC, DRC_PC, 2); in generate_ignore_pcrel()
715 UML_ADD(block, DRC_PC, DRC_PC, 4); in generate_xm()
719 UML_ADD(block, DRC_PC, DRC_PC, 2); in generate_xm()
3265 UML_ADD(block, DRC_PC, DRC_PC, 4); in generate_ldxx1()
[all …]
H A De132xsdrc.cpp9 #define DRC_PC uml::mem(m_core->global_regs) macro
364 UML_AND(block, I1, DRC_PC, ~1); in static_generate_exception()
375 UML_MOV(block, DRC_PC, I0); in static_generate_exception()
765 UML_EXHc(block, uml::COND_S, *m_out_of_cycles, DRC_PC); in generate_update_cycles()
766 UML_EXHc(block, uml::COND_Z, *m_out_of_cycles, DRC_PC); in generate_update_cycles()
883 UML_HASHJMP(block, 0, DRC_PC, *m_nocode); in generate_branch()
921 UML_MOV(block, DRC_PC, desc->pc); in generate_sequence_instruction()
934 UML_ADD(block, DRC_PC, DRC_PC, 2); in generate_opcode()
1203 UML_HASHJMP(block, 0, DRC_PC, *m_nocode); in generate_opcode()