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Searched refs:DRDU2_PHY_CTRL (Results 1 – 20 of 20) sorted by relevance

/dports/sysutils/atf-fvp/arm-trusted-firmware-2.5/plat/brcm/board/stingray/driver/
H A Dusb_phy.c248 u2_phy.phy_ctrl_reg = base + DRDU2_PHY_CTRL; in drdu2_u2_phy_power_on()
269 mmio_clrsetbits_32(base + DRDU2_PHY_CTRL, in drdu2_u2_phy_power_on()
288 mmio_clrbits_32(phy->drdu2reg + DRDU2_PHY_CTRL, in u3h_u2drd_phy_reset()
290 mmio_setbits_32(phy->drdu2reg + DRDU2_PHY_CTRL, in u3h_u2drd_phy_reset()
369 mmio_setbits_32(phy->drdu2reg + DRDU2_PHY_CTRL, in u3h_u2drd_phy_power_on()
H A Dsr_usb.h68 #define DRDU2_PHY_CTRL 0x6852000c macro
H A Dusb.c181 mmio_setbits_32(DRDU2_PHY_CTRL, DRDU2_U2SOFT_RST_N); in usb_enable_coherence()
/dports/sysutils/atf-sun50i_a64/arm-trusted-firmware-2.5/plat/brcm/board/stingray/driver/
H A Dusb_phy.c248 u2_phy.phy_ctrl_reg = base + DRDU2_PHY_CTRL; in drdu2_u2_phy_power_on()
269 mmio_clrsetbits_32(base + DRDU2_PHY_CTRL, in drdu2_u2_phy_power_on()
288 mmio_clrbits_32(phy->drdu2reg + DRDU2_PHY_CTRL, in u3h_u2drd_phy_reset()
290 mmio_setbits_32(phy->drdu2reg + DRDU2_PHY_CTRL, in u3h_u2drd_phy_reset()
369 mmio_setbits_32(phy->drdu2reg + DRDU2_PHY_CTRL, in u3h_u2drd_phy_power_on()
H A Dsr_usb.h68 #define DRDU2_PHY_CTRL 0x6852000c macro
H A Dusb.c181 mmio_setbits_32(DRDU2_PHY_CTRL, DRDU2_U2SOFT_RST_N); in usb_enable_coherence()
/dports/sysutils/atf-sun50i_h6/arm-trusted-firmware-2.5/plat/brcm/board/stingray/driver/
H A Dusb_phy.c248 u2_phy.phy_ctrl_reg = base + DRDU2_PHY_CTRL; in drdu2_u2_phy_power_on()
269 mmio_clrsetbits_32(base + DRDU2_PHY_CTRL, in drdu2_u2_phy_power_on()
288 mmio_clrbits_32(phy->drdu2reg + DRDU2_PHY_CTRL, in u3h_u2drd_phy_reset()
290 mmio_setbits_32(phy->drdu2reg + DRDU2_PHY_CTRL, in u3h_u2drd_phy_reset()
369 mmio_setbits_32(phy->drdu2reg + DRDU2_PHY_CTRL, in u3h_u2drd_phy_power_on()
H A Dsr_usb.h68 #define DRDU2_PHY_CTRL 0x6852000c macro
H A Dusb.c181 mmio_setbits_32(DRDU2_PHY_CTRL, DRDU2_U2SOFT_RST_N); in usb_enable_coherence()
/dports/sysutils/atf-rk3399/arm-trusted-firmware-2.5/plat/brcm/board/stingray/driver/
H A Dusb_phy.c248 u2_phy.phy_ctrl_reg = base + DRDU2_PHY_CTRL; in drdu2_u2_phy_power_on()
269 mmio_clrsetbits_32(base + DRDU2_PHY_CTRL, in drdu2_u2_phy_power_on()
288 mmio_clrbits_32(phy->drdu2reg + DRDU2_PHY_CTRL, in u3h_u2drd_phy_reset()
290 mmio_setbits_32(phy->drdu2reg + DRDU2_PHY_CTRL, in u3h_u2drd_phy_reset()
369 mmio_setbits_32(phy->drdu2reg + DRDU2_PHY_CTRL, in u3h_u2drd_phy_power_on()
H A Dsr_usb.h68 #define DRDU2_PHY_CTRL 0x6852000c macro
H A Dusb.c181 mmio_setbits_32(DRDU2_PHY_CTRL, DRDU2_U2SOFT_RST_N); in usb_enable_coherence()
/dports/sysutils/atf-rk3328/arm-trusted-firmware-2.5/plat/brcm/board/stingray/driver/
H A Dusb_phy.c248 u2_phy.phy_ctrl_reg = base + DRDU2_PHY_CTRL; in drdu2_u2_phy_power_on()
269 mmio_clrsetbits_32(base + DRDU2_PHY_CTRL, in drdu2_u2_phy_power_on()
288 mmio_clrbits_32(phy->drdu2reg + DRDU2_PHY_CTRL, in u3h_u2drd_phy_reset()
290 mmio_setbits_32(phy->drdu2reg + DRDU2_PHY_CTRL, in u3h_u2drd_phy_reset()
369 mmio_setbits_32(phy->drdu2reg + DRDU2_PHY_CTRL, in u3h_u2drd_phy_power_on()
H A Dsr_usb.h68 #define DRDU2_PHY_CTRL 0x6852000c macro
H A Dusb.c181 mmio_setbits_32(DRDU2_PHY_CTRL, DRDU2_U2SOFT_RST_N); in usb_enable_coherence()
/dports/sysutils/atf-sun50i_a64/arm-trusted-firmware-2.5/plat/brcm/board/stingray/include/
H A Dusb_phy.h29 #define DRDU2_PHY_CTRL 0x0CU macro
/dports/sysutils/atf-sun50i_h6/arm-trusted-firmware-2.5/plat/brcm/board/stingray/include/
H A Dusb_phy.h29 #define DRDU2_PHY_CTRL 0x0CU macro
/dports/sysutils/atf-rk3399/arm-trusted-firmware-2.5/plat/brcm/board/stingray/include/
H A Dusb_phy.h29 #define DRDU2_PHY_CTRL 0x0CU macro
/dports/sysutils/atf-rk3328/arm-trusted-firmware-2.5/plat/brcm/board/stingray/include/
H A Dusb_phy.h29 #define DRDU2_PHY_CTRL 0x0CU macro
/dports/sysutils/atf-fvp/arm-trusted-firmware-2.5/plat/brcm/board/stingray/include/
H A Dusb_phy.h29 #define DRDU2_PHY_CTRL 0x0CU macro