/dports/sysutils/atf-fvp/arm-trusted-firmware-2.5/plat/brcm/board/stingray/driver/ |
H A D | usb_phy.c | 248 u2_phy.phy_ctrl_reg = base + DRDU2_PHY_CTRL; in drdu2_u2_phy_power_on() 269 mmio_clrsetbits_32(base + DRDU2_PHY_CTRL, in drdu2_u2_phy_power_on() 288 mmio_clrbits_32(phy->drdu2reg + DRDU2_PHY_CTRL, in u3h_u2drd_phy_reset() 290 mmio_setbits_32(phy->drdu2reg + DRDU2_PHY_CTRL, in u3h_u2drd_phy_reset() 369 mmio_setbits_32(phy->drdu2reg + DRDU2_PHY_CTRL, in u3h_u2drd_phy_power_on()
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H A D | sr_usb.h | 68 #define DRDU2_PHY_CTRL 0x6852000c macro
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H A D | usb.c | 181 mmio_setbits_32(DRDU2_PHY_CTRL, DRDU2_U2SOFT_RST_N); in usb_enable_coherence()
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/dports/sysutils/atf-sun50i_a64/arm-trusted-firmware-2.5/plat/brcm/board/stingray/driver/ |
H A D | usb_phy.c | 248 u2_phy.phy_ctrl_reg = base + DRDU2_PHY_CTRL; in drdu2_u2_phy_power_on() 269 mmio_clrsetbits_32(base + DRDU2_PHY_CTRL, in drdu2_u2_phy_power_on() 288 mmio_clrbits_32(phy->drdu2reg + DRDU2_PHY_CTRL, in u3h_u2drd_phy_reset() 290 mmio_setbits_32(phy->drdu2reg + DRDU2_PHY_CTRL, in u3h_u2drd_phy_reset() 369 mmio_setbits_32(phy->drdu2reg + DRDU2_PHY_CTRL, in u3h_u2drd_phy_power_on()
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H A D | sr_usb.h | 68 #define DRDU2_PHY_CTRL 0x6852000c macro
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H A D | usb.c | 181 mmio_setbits_32(DRDU2_PHY_CTRL, DRDU2_U2SOFT_RST_N); in usb_enable_coherence()
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/dports/sysutils/atf-sun50i_h6/arm-trusted-firmware-2.5/plat/brcm/board/stingray/driver/ |
H A D | usb_phy.c | 248 u2_phy.phy_ctrl_reg = base + DRDU2_PHY_CTRL; in drdu2_u2_phy_power_on() 269 mmio_clrsetbits_32(base + DRDU2_PHY_CTRL, in drdu2_u2_phy_power_on() 288 mmio_clrbits_32(phy->drdu2reg + DRDU2_PHY_CTRL, in u3h_u2drd_phy_reset() 290 mmio_setbits_32(phy->drdu2reg + DRDU2_PHY_CTRL, in u3h_u2drd_phy_reset() 369 mmio_setbits_32(phy->drdu2reg + DRDU2_PHY_CTRL, in u3h_u2drd_phy_power_on()
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H A D | sr_usb.h | 68 #define DRDU2_PHY_CTRL 0x6852000c macro
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H A D | usb.c | 181 mmio_setbits_32(DRDU2_PHY_CTRL, DRDU2_U2SOFT_RST_N); in usb_enable_coherence()
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/dports/sysutils/atf-rk3399/arm-trusted-firmware-2.5/plat/brcm/board/stingray/driver/ |
H A D | usb_phy.c | 248 u2_phy.phy_ctrl_reg = base + DRDU2_PHY_CTRL; in drdu2_u2_phy_power_on() 269 mmio_clrsetbits_32(base + DRDU2_PHY_CTRL, in drdu2_u2_phy_power_on() 288 mmio_clrbits_32(phy->drdu2reg + DRDU2_PHY_CTRL, in u3h_u2drd_phy_reset() 290 mmio_setbits_32(phy->drdu2reg + DRDU2_PHY_CTRL, in u3h_u2drd_phy_reset() 369 mmio_setbits_32(phy->drdu2reg + DRDU2_PHY_CTRL, in u3h_u2drd_phy_power_on()
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H A D | sr_usb.h | 68 #define DRDU2_PHY_CTRL 0x6852000c macro
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H A D | usb.c | 181 mmio_setbits_32(DRDU2_PHY_CTRL, DRDU2_U2SOFT_RST_N); in usb_enable_coherence()
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/dports/sysutils/atf-rk3328/arm-trusted-firmware-2.5/plat/brcm/board/stingray/driver/ |
H A D | usb_phy.c | 248 u2_phy.phy_ctrl_reg = base + DRDU2_PHY_CTRL; in drdu2_u2_phy_power_on() 269 mmio_clrsetbits_32(base + DRDU2_PHY_CTRL, in drdu2_u2_phy_power_on() 288 mmio_clrbits_32(phy->drdu2reg + DRDU2_PHY_CTRL, in u3h_u2drd_phy_reset() 290 mmio_setbits_32(phy->drdu2reg + DRDU2_PHY_CTRL, in u3h_u2drd_phy_reset() 369 mmio_setbits_32(phy->drdu2reg + DRDU2_PHY_CTRL, in u3h_u2drd_phy_power_on()
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H A D | sr_usb.h | 68 #define DRDU2_PHY_CTRL 0x6852000c macro
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H A D | usb.c | 181 mmio_setbits_32(DRDU2_PHY_CTRL, DRDU2_U2SOFT_RST_N); in usb_enable_coherence()
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/dports/sysutils/atf-sun50i_a64/arm-trusted-firmware-2.5/plat/brcm/board/stingray/include/ |
H A D | usb_phy.h | 29 #define DRDU2_PHY_CTRL 0x0CU macro
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/dports/sysutils/atf-sun50i_h6/arm-trusted-firmware-2.5/plat/brcm/board/stingray/include/ |
H A D | usb_phy.h | 29 #define DRDU2_PHY_CTRL 0x0CU macro
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/dports/sysutils/atf-rk3399/arm-trusted-firmware-2.5/plat/brcm/board/stingray/include/ |
H A D | usb_phy.h | 29 #define DRDU2_PHY_CTRL 0x0CU macro
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/dports/sysutils/atf-rk3328/arm-trusted-firmware-2.5/plat/brcm/board/stingray/include/ |
H A D | usb_phy.h | 29 #define DRDU2_PHY_CTRL 0x0CU macro
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/dports/sysutils/atf-fvp/arm-trusted-firmware-2.5/plat/brcm/board/stingray/include/ |
H A D | usb_phy.h | 29 #define DRDU2_PHY_CTRL 0x0CU macro
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