/dports/emulators/qemu/qemu-6.2.0/target/cris/ |
H A D | helper.c | 36 #define D_LOG(...) qemu_log(__VA_ARGS__) macro 39 #define D_LOG(...) do { } while (0) macro 103 D_LOG("exception index=%d interrupt_req=%d\n", in crisv10_cpu_do_interrupt() 165 D_LOG("exception index=%d interrupt_req=%d\n", in cris_cpu_do_interrupt() 202 D_LOG("excp isr=%x PC=%x ds=%d SP=%x" in cris_cpu_do_interrupt() 234 D_LOG("%s isr=%x vec=%x ccs=%x pid=%d erp=%x\n", in cris_cpu_do_interrupt()
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H A D | mmu.c | 28 #define D_LOG(...) qemu_log(__VA_ARGS__) macro 31 #define D_LOG(...) do { } while (0) macro 186 D_LOG("TLB[%d][%d][%d] v=%x vpage=%x lo=%x hi=%x\n", in cris_mmu_translate_page() 313 D_LOG("flush pid=%x vaddr=%x\n", pid, vaddr); in cris_mmu_flush_pid()
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/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/target/cris/ |
H A D | helper.c | 36 #define D_LOG(...) qemu_log(__VA_ARGS__) macro 39 #define D_LOG(...) do { } while (0) macro 119 D_LOG("exception index=%d interrupt_req=%d\n", in crisv10_cpu_do_interrupt() 181 D_LOG("exception index=%d interrupt_req=%d\n", in cris_cpu_do_interrupt() 218 D_LOG("excp isr=%x PC=%x ds=%d SP=%x" in cris_cpu_do_interrupt() 250 D_LOG("%s isr=%x vec=%x ccs=%x pid=%d erp=%x\n", in cris_cpu_do_interrupt()
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H A D | mmu.c | 28 #define D_LOG(...) qemu_log(__VA_ARGS__) macro 31 #define D_LOG(...) do { } while (0) macro 186 D_LOG("TLB[%d][%d][%d] v=%x vpage=%x lo=%x hi=%x\n", in cris_mmu_translate_page() 313 D_LOG("flush pid=%x vaddr=%x\n", pid, vaddr); in cris_mmu_flush_pid()
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H A D | op_helper.c | 34 #define D_LOG(...) qemu_log(__VA_ARGS__) macro 37 #define D_LOG(...) do { } while (0) macro 108 D_LOG("tlb flush vaddr=%x v=%d pc=%x\n", in helper_movl_sreg_reg() 165 D_LOG("rfe: erp=%x pid=%x ccs=%x btarget=%x\n", in helper_rfe() 182 D_LOG("rfn: erp=%x pid=%x ccs=%x btarget=%x\n", in helper_rfn()
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/dports/emulators/qemu-utils/qemu-4.2.1/target/cris/ |
H A D | helper.c | 35 #define D_LOG(...) qemu_log(__VA_ARGS__) macro 38 #define D_LOG(...) do { } while (0) macro 132 D_LOG("exception index=%d interrupt_req=%d\n", in crisv10_cpu_do_interrupt() 194 D_LOG("exception index=%d interrupt_req=%d\n", in cris_cpu_do_interrupt() 231 D_LOG("excp isr=%x PC=%x ds=%d SP=%x" in cris_cpu_do_interrupt() 263 D_LOG("%s isr=%x vec=%x ccs=%x pid=%d erp=%x\n", in cris_cpu_do_interrupt()
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H A D | mmu.c | 28 #define D_LOG(...) qemu_log(__VA_ARGS__) macro 31 #define D_LOG(...) do { } while (0) macro 186 D_LOG("TLB[%d][%d][%d] v=%x vpage=%x lo=%x hi=%x\n", in cris_mmu_translate_page() 313 D_LOG("flush pid=%x vaddr=%x\n", pid, vaddr); in cris_mmu_flush_pid()
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H A D | op_helper.c | 34 #define D_LOG(...) qemu_log(__VA_ARGS__) macro 37 #define D_LOG(...) do { } while (0) macro 108 D_LOG("tlb flush vaddr=%x v=%d pc=%x\n", in helper_movl_sreg_reg() 165 D_LOG("rfe: erp=%x pid=%x ccs=%x btarget=%x\n", in helper_rfe() 182 D_LOG("rfn: erp=%x pid=%x ccs=%x btarget=%x\n", in helper_rfn()
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/dports/emulators/qemu5/qemu-5.2.0/target/cris/ |
H A D | helper.c | 35 #define D_LOG(...) qemu_log(__VA_ARGS__) macro 38 #define D_LOG(...) do { } while (0) macro 132 D_LOG("exception index=%d interrupt_req=%d\n", in crisv10_cpu_do_interrupt() 194 D_LOG("exception index=%d interrupt_req=%d\n", in cris_cpu_do_interrupt() 231 D_LOG("excp isr=%x PC=%x ds=%d SP=%x" in cris_cpu_do_interrupt() 263 D_LOG("%s isr=%x vec=%x ccs=%x pid=%d erp=%x\n", in cris_cpu_do_interrupt()
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H A D | mmu.c | 28 #define D_LOG(...) qemu_log(__VA_ARGS__) macro 31 #define D_LOG(...) do { } while (0) macro 186 D_LOG("TLB[%d][%d][%d] v=%x vpage=%x lo=%x hi=%x\n", in cris_mmu_translate_page() 313 D_LOG("flush pid=%x vaddr=%x\n", pid, vaddr); in cris_mmu_flush_pid()
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H A D | op_helper.c | 34 #define D_LOG(...) qemu_log(__VA_ARGS__) macro 37 #define D_LOG(...) do { } while (0) macro 108 D_LOG("tlb flush vaddr=%x v=%d pc=%x\n", in helper_movl_sreg_reg() 165 D_LOG("rfe: erp=%x pid=%x ccs=%x btarget=%x\n", in helper_rfe() 182 D_LOG("rfn: erp=%x pid=%x ccs=%x btarget=%x\n", in helper_rfn()
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/dports/emulators/qemu-guest-agent/qemu-5.0.1/target/cris/ |
H A D | helper.c | 35 #define D_LOG(...) qemu_log(__VA_ARGS__) macro 38 #define D_LOG(...) do { } while (0) macro 132 D_LOG("exception index=%d interrupt_req=%d\n", in crisv10_cpu_do_interrupt() 194 D_LOG("exception index=%d interrupt_req=%d\n", in cris_cpu_do_interrupt() 231 D_LOG("excp isr=%x PC=%x ds=%d SP=%x" in cris_cpu_do_interrupt() 263 D_LOG("%s isr=%x vec=%x ccs=%x pid=%d erp=%x\n", in cris_cpu_do_interrupt()
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H A D | mmu.c | 28 #define D_LOG(...) qemu_log(__VA_ARGS__) macro 31 #define D_LOG(...) do { } while (0) macro 186 D_LOG("TLB[%d][%d][%d] v=%x vpage=%x lo=%x hi=%x\n", in cris_mmu_translate_page() 313 D_LOG("flush pid=%x vaddr=%x\n", pid, vaddr); in cris_mmu_flush_pid()
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H A D | op_helper.c | 34 #define D_LOG(...) qemu_log(__VA_ARGS__) macro 37 #define D_LOG(...) do { } while (0) macro 108 D_LOG("tlb flush vaddr=%x v=%d pc=%x\n", in helper_movl_sreg_reg() 165 D_LOG("rfe: erp=%x pid=%x ccs=%x btarget=%x\n", in helper_rfe() 182 D_LOG("rfn: erp=%x pid=%x ccs=%x btarget=%x\n", in helper_rfn()
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/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/target/cris/ |
H A D | helper.c | 34 #define D_LOG(...) qemu_log(__VA_ARGS__) macro 37 #define D_LOG(...) do { } while (0) macro 131 D_LOG("exception index=%d interrupt_req=%d\n", in crisv10_cpu_do_interrupt() 193 D_LOG("exception index=%d interrupt_req=%d\n", in cris_cpu_do_interrupt() 230 D_LOG("excp isr=%x PC=%x ds=%d SP=%x" in cris_cpu_do_interrupt() 262 D_LOG("%s isr=%x vec=%x ccs=%x pid=%d erp=%x\n", in cris_cpu_do_interrupt()
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H A D | op_helper.c | 34 #define D_LOG(...) qemu_log(__VA_ARGS__) macro 37 #define D_LOG(...) do { } while (0) macro 51 D_LOG("%s pc=%x tpc=%x ra=%p\n", __func__, in tlb_fill() 143 D_LOG("tlb flush vaddr=%x v=%d pc=%x\n", in helper_movl_sreg_reg() 202 D_LOG("rfe: erp=%x pid=%x ccs=%x btarget=%x\n", in helper_rfe() 218 D_LOG("rfn: erp=%x pid=%x ccs=%x btarget=%x\n", in helper_rfn()
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H A D | mmu.c | 28 #define D_LOG(...) qemu_log(__VA_ARGS__) macro 31 #define D_LOG(...) do { } while (0) macro 189 D_LOG("TLB[%d][%d][%d] v=%x vpage=%x lo=%x hi=%x\n", in cris_mmu_translate_page() 317 D_LOG("flush pid=%x vaddr=%x\n", in cris_mmu_flush_pid()
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/dports/emulators/qemu42/qemu-4.2.1/target/cris/ |
H A D | helper.c | 35 #define D_LOG(...) qemu_log(__VA_ARGS__) macro 38 #define D_LOG(...) do { } while (0) macro 132 D_LOG("exception index=%d interrupt_req=%d\n", in crisv10_cpu_do_interrupt() 194 D_LOG("exception index=%d interrupt_req=%d\n", in cris_cpu_do_interrupt() 231 D_LOG("excp isr=%x PC=%x ds=%d SP=%x" in cris_cpu_do_interrupt() 263 D_LOG("%s isr=%x vec=%x ccs=%x pid=%d erp=%x\n", in cris_cpu_do_interrupt()
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H A D | mmu.c | 28 #define D_LOG(...) qemu_log(__VA_ARGS__) macro 31 #define D_LOG(...) do { } while (0) macro 186 D_LOG("TLB[%d][%d][%d] v=%x vpage=%x lo=%x hi=%x\n", in cris_mmu_translate_page() 313 D_LOG("flush pid=%x vaddr=%x\n", pid, vaddr); in cris_mmu_flush_pid()
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H A D | op_helper.c | 34 #define D_LOG(...) qemu_log(__VA_ARGS__) macro 37 #define D_LOG(...) do { } while (0) macro 108 D_LOG("tlb flush vaddr=%x v=%d pc=%x\n", in helper_movl_sreg_reg() 165 D_LOG("rfe: erp=%x pid=%x ccs=%x btarget=%x\n", in helper_rfe() 182 D_LOG("rfn: erp=%x pid=%x ccs=%x btarget=%x\n", in helper_rfn()
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/dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/target/cris/ |
H A D | helper.c | 35 #define D_LOG(...) qemu_log(__VA_ARGS__) macro 38 #define D_LOG(...) do { } while (0) macro 132 D_LOG("exception index=%d interrupt_req=%d\n", in crisv10_cpu_do_interrupt() 194 D_LOG("exception index=%d interrupt_req=%d\n", in cris_cpu_do_interrupt() 231 D_LOG("excp isr=%x PC=%x ds=%d SP=%x" in cris_cpu_do_interrupt() 263 D_LOG("%s isr=%x vec=%x ccs=%x pid=%d erp=%x\n", in cris_cpu_do_interrupt()
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H A D | mmu.c | 28 #define D_LOG(...) qemu_log(__VA_ARGS__) macro 31 #define D_LOG(...) do { } while (0) macro 186 D_LOG("TLB[%d][%d][%d] v=%x vpage=%x lo=%x hi=%x\n", in cris_mmu_translate_page() 313 D_LOG("flush pid=%x vaddr=%x\n", pid, vaddr); in cris_mmu_flush_pid()
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H A D | op_helper.c | 34 #define D_LOG(...) qemu_log(__VA_ARGS__) macro 37 #define D_LOG(...) do { } while (0) macro 108 D_LOG("tlb flush vaddr=%x v=%d pc=%x\n", in helper_movl_sreg_reg() 165 D_LOG("rfe: erp=%x pid=%x ccs=%x btarget=%x\n", in helper_rfe() 182 D_LOG("rfn: erp=%x pid=%x ccs=%x btarget=%x\n", in helper_rfn()
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/dports/emulators/qemu60/qemu-6.0.0/target/cris/ |
H A D | helper.c | 36 #define D_LOG(...) qemu_log(__VA_ARGS__) macro 39 #define D_LOG(...) do { } while (0) macro 133 D_LOG("exception index=%d interrupt_req=%d\n", in crisv10_cpu_do_interrupt() 195 D_LOG("exception index=%d interrupt_req=%d\n", in cris_cpu_do_interrupt() 232 D_LOG("excp isr=%x PC=%x ds=%d SP=%x" in cris_cpu_do_interrupt() 264 D_LOG("%s isr=%x vec=%x ccs=%x pid=%d erp=%x\n", in cris_cpu_do_interrupt()
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H A D | mmu.c | 28 #define D_LOG(...) qemu_log(__VA_ARGS__) macro 31 #define D_LOG(...) do { } while (0) macro 186 D_LOG("TLB[%d][%d][%d] v=%x vpage=%x lo=%x hi=%x\n", in cris_mmu_translate_page() 313 D_LOG("flush pid=%x vaddr=%x\n", pid, vaddr); in cris_mmu_flush_pid()
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