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Searched refs:DstDivReg (Results 1 – 12 of 12) sorted by relevance

/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/lib/Target/AMDGPU/
H A DAMDGPULegalizerInfo.h105 void legalizeUnsignedDIV_REM32Impl(MachineIRBuilder &B, Register DstDivReg,
109 void legalizeUnsignedDIV_REM64Impl(MachineIRBuilder &B, Register DstDivReg,
H A DAMDGPULegalizerInfo.cpp2903 if (DstDivReg) in legalizeUnsignedDIV_REM32Impl()
2909 if (DstDivReg) in legalizeUnsignedDIV_REM32Impl()
3059 if (DstDivReg) { in legalizeUnsignedDIV_REM64Impl()
3077 Register DstDivReg, DstRemReg; in legalizeUnsignedDIV_REM() local
3082 DstDivReg = MI.getOperand(0).getReg(); in legalizeUnsignedDIV_REM()
3090 DstDivReg = MI.getOperand(0).getReg(); in legalizeUnsignedDIV_REM()
3138 Register DstDivReg, DstRemReg, TmpDivReg, TmpRemReg; in legalizeSignedDIV_REM() local
3143 DstDivReg = MI.getOperand(0).getReg(); in legalizeSignedDIV_REM()
3153 DstDivReg = MI.getOperand(0).getReg(); in legalizeSignedDIV_REM()
3166 if (DstDivReg) { in legalizeSignedDIV_REM()
[all …]
/dports/graphics/llvm-mesa/llvm-13.0.1.src/lib/Target/AMDGPU/
H A DAMDGPULegalizerInfo.h105 void legalizeUnsignedDIV_REM32Impl(MachineIRBuilder &B, Register DstDivReg,
109 void legalizeUnsignedDIV_REM64Impl(MachineIRBuilder &B, Register DstDivReg,
H A DAMDGPULegalizerInfo.cpp2903 if (DstDivReg) in legalizeUnsignedDIV_REM32Impl()
2909 if (DstDivReg) in legalizeUnsignedDIV_REM32Impl()
3059 if (DstDivReg) { in legalizeUnsignedDIV_REM64Impl()
3077 Register DstDivReg, DstRemReg; in legalizeUnsignedDIV_REM() local
3082 DstDivReg = MI.getOperand(0).getReg(); in legalizeUnsignedDIV_REM()
3090 DstDivReg = MI.getOperand(0).getReg(); in legalizeUnsignedDIV_REM()
3138 Register DstDivReg, DstRemReg, TmpDivReg, TmpRemReg; in legalizeSignedDIV_REM() local
3143 DstDivReg = MI.getOperand(0).getReg(); in legalizeSignedDIV_REM()
3153 DstDivReg = MI.getOperand(0).getReg(); in legalizeSignedDIV_REM()
3166 if (DstDivReg) { in legalizeSignedDIV_REM()
[all …]
/dports/lang/rust/rustc-1.58.1-src/src/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPULegalizerInfo.h105 void legalizeUnsignedDIV_REM32Impl(MachineIRBuilder &B, Register DstDivReg,
109 void legalizeUnsignedDIV_REM64Impl(MachineIRBuilder &B, Register DstDivReg,
H A DAMDGPULegalizerInfo.cpp2903 if (DstDivReg) in legalizeUnsignedDIV_REM32Impl()
2909 if (DstDivReg) in legalizeUnsignedDIV_REM32Impl()
3059 if (DstDivReg) { in legalizeUnsignedDIV_REM64Impl()
3077 Register DstDivReg, DstRemReg; in legalizeUnsignedDIV_REM() local
3082 DstDivReg = MI.getOperand(0).getReg(); in legalizeUnsignedDIV_REM()
3090 DstDivReg = MI.getOperand(0).getReg(); in legalizeUnsignedDIV_REM()
3138 Register DstDivReg, DstRemReg, TmpDivReg, TmpRemReg; in legalizeSignedDIV_REM() local
3143 DstDivReg = MI.getOperand(0).getReg(); in legalizeSignedDIV_REM()
3153 DstDivReg = MI.getOperand(0).getReg(); in legalizeSignedDIV_REM()
3166 if (DstDivReg) { in legalizeSignedDIV_REM()
[all …]
/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/lib/Target/AMDGPU/
H A DAMDGPULegalizerInfo.h107 void legalizeUnsignedDIV_REM32Impl(MachineIRBuilder &B, Register DstDivReg,
111 void legalizeUnsignedDIV_REM64Impl(MachineIRBuilder &B, Register DstDivReg,
H A DAMDGPULegalizerInfo.cpp2972 if (DstDivReg) in legalizeUnsignedDIV_REM32Impl()
2978 if (DstDivReg) in legalizeUnsignedDIV_REM32Impl()
3128 if (DstDivReg) { in legalizeUnsignedDIV_REM64Impl()
3146 Register DstDivReg, DstRemReg; in legalizeUnsignedDIV_REM() local
3151 DstDivReg = MI.getOperand(0).getReg(); in legalizeUnsignedDIV_REM()
3159 DstDivReg = MI.getOperand(0).getReg(); in legalizeUnsignedDIV_REM()
3207 Register DstDivReg, DstRemReg, TmpDivReg, TmpRemReg; in legalizeSignedDIV_REM() local
3212 DstDivReg = MI.getOperand(0).getReg(); in legalizeSignedDIV_REM()
3222 DstDivReg = MI.getOperand(0).getReg(); in legalizeSignedDIV_REM()
3235 if (DstDivReg) { in legalizeSignedDIV_REM()
[all …]
/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/lib/Target/AMDGPU/
H A DAMDGPULegalizerInfo.h105 void legalizeUnsignedDIV_REM32Impl(MachineIRBuilder &B, Register DstDivReg,
109 void legalizeUnsignedDIV_REM64Impl(MachineIRBuilder &B, Register DstDivReg,
H A DAMDGPULegalizerInfo.cpp2903 if (DstDivReg) in legalizeUnsignedDIV_REM32Impl()
2909 if (DstDivReg) in legalizeUnsignedDIV_REM32Impl()
3059 if (DstDivReg) { in legalizeUnsignedDIV_REM64Impl()
3077 Register DstDivReg, DstRemReg; in legalizeUnsignedDIV_REM() local
3082 DstDivReg = MI.getOperand(0).getReg(); in legalizeUnsignedDIV_REM()
3090 DstDivReg = MI.getOperand(0).getReg(); in legalizeUnsignedDIV_REM()
3138 Register DstDivReg, DstRemReg, TmpDivReg, TmpRemReg; in legalizeSignedDIV_REM() local
3143 DstDivReg = MI.getOperand(0).getReg(); in legalizeSignedDIV_REM()
3153 DstDivReg = MI.getOperand(0).getReg(); in legalizeSignedDIV_REM()
3166 if (DstDivReg) { in legalizeSignedDIV_REM()
[all …]
/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/lib/Target/AMDGPU/
H A DAMDGPULegalizerInfo.h105 void legalizeUnsignedDIV_REM32Impl(MachineIRBuilder &B, Register DstDivReg,
109 void legalizeUnsignedDIV_REM64Impl(MachineIRBuilder &B, Register DstDivReg,
H A DAMDGPULegalizerInfo.cpp2903 if (DstDivReg) in legalizeUnsignedDIV_REM32Impl()
2909 if (DstDivReg) in legalizeUnsignedDIV_REM32Impl()
3059 if (DstDivReg) { in legalizeUnsignedDIV_REM64Impl()
3077 Register DstDivReg, DstRemReg; in legalizeUnsignedDIV_REM() local
3082 DstDivReg = MI.getOperand(0).getReg(); in legalizeUnsignedDIV_REM()
3090 DstDivReg = MI.getOperand(0).getReg(); in legalizeUnsignedDIV_REM()
3138 Register DstDivReg, DstRemReg, TmpDivReg, TmpRemReg; in legalizeSignedDIV_REM() local
3143 DstDivReg = MI.getOperand(0).getReg(); in legalizeSignedDIV_REM()
3153 DstDivReg = MI.getOperand(0).getReg(); in legalizeSignedDIV_REM()
3166 if (DstDivReg) { in legalizeSignedDIV_REM()
[all …]