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Searched refs:EDP_INTR_MASK1 (Results 1 – 3 of 3) sorted by relevance

/dports/multimedia/libv4l/linux-5.13-rc2/drivers/gpu/drm/msm/edp/
H A Dedp_ctrl.c47 #define EDP_INTR_MASK1 (EDP_INTR_STATUS1 << 2) macro
390 edp_write(ctrl->base + REG_EDP_INTERRUPT_REG_1, EDP_INTR_MASK1); in edp_ctrl_irq_enable()
1072 mask1 = isr1 & EDP_INTR_MASK1; in msm_edp_ctrl_irq()
/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/gpu/drm/msm/edp/
H A Dedp_ctrl.c47 #define EDP_INTR_MASK1 (EDP_INTR_STATUS1 << 2) macro
390 edp_write(ctrl->base + REG_EDP_INTERRUPT_REG_1, EDP_INTR_MASK1); in edp_ctrl_irq_enable()
1072 mask1 = isr1 & EDP_INTR_MASK1; in msm_edp_ctrl_irq()
/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/gpu/drm/msm/edp/
H A Dedp_ctrl.c47 #define EDP_INTR_MASK1 (EDP_INTR_STATUS1 << 2) macro
390 edp_write(ctrl->base + REG_EDP_INTERRUPT_REG_1, EDP_INTR_MASK1); in edp_ctrl_irq_enable()
1072 mask1 = isr1 & EDP_INTR_MASK1; in msm_edp_ctrl_irq()