Searched refs:EMC_DBG_WRITE_MUX_ACTIVE (Results 1 – 15 of 15) sorted by relevance
/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/memory/tegra/ |
H A D | tegra30-emc.c | 166 #define EMC_DBG_WRITE_MUX_ACTIVE BIT(1) macro 674 writel_relaxed(emc_dbg | EMC_DBG_WRITE_MUX_ACTIVE, in emc_prepare_timing_change() 700 writel_relaxed(emc_dbg | EMC_DBG_WRITE_MUX_ACTIVE, emc->regs + EMC_DBG); in emc_prepare_timing_change() 1075 emc_dbg &= ~EMC_DBG_WRITE_MUX_ACTIVE; in emc_setup_hw()
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H A D | tegra20-emc.c | 99 #define EMC_DBG_WRITE_MUX_ACTIVE BIT(1) macro 488 emc_dbg &= ~EMC_DBG_WRITE_MUX_ACTIVE; in emc_setup_hw()
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H A D | tegra210-emc-cc-r21021.c | 1248 value = emc_dbg | (EMC_DBG_WRITE_MUX_ACTIVE | in tegra210_emc_r21021_set_clock() 1361 value = emc_dbg | EMC_DBG_WRITE_MUX_ACTIVE | EMC_DBG_WRITE_ACTIVE_ONLY; in tegra210_emc_r21021_set_clock() 1603 ccfifo_writel(emc, emc_dbg | EMC_DBG_WRITE_MUX_ACTIVE, in tegra210_emc_r21021_set_clock()
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H A D | tegra210-emc.h | 24 #define EMC_DBG_WRITE_MUX_ACTIVE BIT(1) macro
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H A D | tegra210-emc-core.c | 889 emc_writel(emc, emc_dbg | EMC_DBG_WRITE_MUX_ACTIVE, EMC_DBG); in tegra210_emc_set_shadow_bypass() 891 emc_writel(emc, emc_dbg & ~EMC_DBG_WRITE_MUX_ACTIVE, EMC_DBG); in tegra210_emc_set_shadow_bypass()
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/dports/multimedia/libv4l/linux-5.13-rc2/drivers/memory/tegra/ |
H A D | tegra30-emc.c | 166 #define EMC_DBG_WRITE_MUX_ACTIVE BIT(1) macro 674 writel_relaxed(emc_dbg | EMC_DBG_WRITE_MUX_ACTIVE, in emc_prepare_timing_change() 700 writel_relaxed(emc_dbg | EMC_DBG_WRITE_MUX_ACTIVE, emc->regs + EMC_DBG); in emc_prepare_timing_change() 1075 emc_dbg &= ~EMC_DBG_WRITE_MUX_ACTIVE; in emc_setup_hw()
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H A D | tegra20-emc.c | 99 #define EMC_DBG_WRITE_MUX_ACTIVE BIT(1) macro 488 emc_dbg &= ~EMC_DBG_WRITE_MUX_ACTIVE; in emc_setup_hw()
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H A D | tegra210-emc-cc-r21021.c | 1248 value = emc_dbg | (EMC_DBG_WRITE_MUX_ACTIVE | in tegra210_emc_r21021_set_clock() 1361 value = emc_dbg | EMC_DBG_WRITE_MUX_ACTIVE | EMC_DBG_WRITE_ACTIVE_ONLY; in tegra210_emc_r21021_set_clock() 1603 ccfifo_writel(emc, emc_dbg | EMC_DBG_WRITE_MUX_ACTIVE, in tegra210_emc_r21021_set_clock()
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H A D | tegra210-emc.h | 24 #define EMC_DBG_WRITE_MUX_ACTIVE BIT(1) macro
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H A D | tegra210-emc-core.c | 889 emc_writel(emc, emc_dbg | EMC_DBG_WRITE_MUX_ACTIVE, EMC_DBG); in tegra210_emc_set_shadow_bypass() 891 emc_writel(emc, emc_dbg & ~EMC_DBG_WRITE_MUX_ACTIVE, EMC_DBG); in tegra210_emc_set_shadow_bypass()
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/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/memory/tegra/ |
H A D | tegra30-emc.c | 166 #define EMC_DBG_WRITE_MUX_ACTIVE BIT(1) macro 674 writel_relaxed(emc_dbg | EMC_DBG_WRITE_MUX_ACTIVE, in emc_prepare_timing_change() 700 writel_relaxed(emc_dbg | EMC_DBG_WRITE_MUX_ACTIVE, emc->regs + EMC_DBG); in emc_prepare_timing_change() 1075 emc_dbg &= ~EMC_DBG_WRITE_MUX_ACTIVE; in emc_setup_hw()
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H A D | tegra20-emc.c | 99 #define EMC_DBG_WRITE_MUX_ACTIVE BIT(1) macro 488 emc_dbg &= ~EMC_DBG_WRITE_MUX_ACTIVE; in emc_setup_hw()
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H A D | tegra210-emc-cc-r21021.c | 1248 value = emc_dbg | (EMC_DBG_WRITE_MUX_ACTIVE | in tegra210_emc_r21021_set_clock() 1361 value = emc_dbg | EMC_DBG_WRITE_MUX_ACTIVE | EMC_DBG_WRITE_ACTIVE_ONLY; in tegra210_emc_r21021_set_clock() 1603 ccfifo_writel(emc, emc_dbg | EMC_DBG_WRITE_MUX_ACTIVE, in tegra210_emc_r21021_set_clock()
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H A D | tegra210-emc.h | 24 #define EMC_DBG_WRITE_MUX_ACTIVE BIT(1) macro
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H A D | tegra210-emc-core.c | 889 emc_writel(emc, emc_dbg | EMC_DBG_WRITE_MUX_ACTIVE, EMC_DBG); in tegra210_emc_set_shadow_bypass() 891 emc_writel(emc, emc_dbg & ~EMC_DBG_WRITE_MUX_ACTIVE, EMC_DBG); in tegra210_emc_set_shadow_bypass()
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