1 /*========================== begin_copyright_notice ============================ 2 3 Copyright (C) 2017-2021 Intel Corporation 4 5 SPDX-License-Identifier: MIT 6 7 ============================= end_copyright_notice ===========================*/ 8 9 #pragma once 10 #include "Compiler/CodeGenPublic.h" 11 #include "Compiler/CISACodeGen/helper.h" 12 #include "visa_igc_common_header.h" 13 14 enum class SIMDMode : unsigned char; 15 16 namespace IGC 17 { 18 19 /*****************************************************************************\ 20 ENUM: EU_MESSAGE_TARGET 21 \*****************************************************************************/ 22 enum EU_MESSAGE_TARGET 23 { 24 EU_MESSAGE_TARGET_NULL = 0, 25 EU_MESSAGE_TARGET_MATHBOX = 1, 26 EU_MESSAGE_TARGET_SAMPLER = 2, 27 EU_MESSAGE_TARGET_GATEWAY = 3, 28 EU_MESSAGE_TARGET_DATA_PORT_READ = 4, 29 EU_MESSAGE_TARGET_DATA_PORT_WRITE = 5, 30 EU_MESSAGE_TARGET_URB = 6, 31 EU_MESSAGE_TARGET_THREAD_SPAWNER = 7, 32 EU_MESSAGE_TARGET_SFID_VME = 8, 33 EU_MESSAGE_TARGET_DATA_PORT_DATA_CACHE_READ_ONLY = 9, 34 EU_GEN7_MESSAGE_TARGET_DATA_PORT_DATA_CACHE = 10, 35 EU_GEN7_MESSAGE_TARGET_PIXEL_INTERPOLATOR = 11, 36 EU_GEN7_5_MESSAGE_TARGET_DATA_PORT_DATA_CACHE_1 = 12, 37 EU_MESSAGE_TARGET_SFID_CRE = 13, 38 NUM_EU_MESSAGE_TARGETS 39 }; 40 41 /*****************************************************************************\ 42 ENUM: EU_GEN7_5_VME_MESSAGE_TYPE 43 \*****************************************************************************/ 44 enum EU_GEN7_5_VME_MESSAGE_TYPE 45 { 46 EU_GEN7_5_VME_MESSAGE_SIC = 1, 47 EU_GEN7_5_VME_MESSAGE_IME = 2, 48 EU_GEN7_5_VME_MESSAGE_FBR = 3 49 }; 50 51 /*****************************************************************************\ 52 ENUM: EU_GEN6_SAMPLER_MESSAGE_TYPE 53 \*****************************************************************************/ 54 enum EU_GEN6_SAMPLER_MESSAGE_TYPE 55 { 56 EU_GEN6_SAMPLER_MESSAGE_SAMPLE = 0, 57 EU_GEN6_SAMPLER_MESSAGE_SAMPLE_B, 58 EU_GEN6_SAMPLER_MESSAGE_SAMPLE_L, 59 EU_GEN6_SAMPLER_MESSAGE_SAMPLE_C, 60 EU_GEN6_SAMPLER_MESSAGE_SAMPLE_D, 61 EU_GEN6_SAMPLER_MESSAGE_SAMPLE_BC, 62 EU_GEN6_SAMPLER_MESSAGE_SAMPLE_LC, 63 EU_GEN6_SAMPLER_MESSAGE_LD, 64 EU_GEN6_SAMPLER_MESSAGE_LOAD4, 65 EU_GEN6_SAMPLER_MESSAGE_LOD, 66 EU_GEN6_SAMPLER_MESSAGE_RESINFO, 67 EU_GEN6_SAMPLER_MESSAGE_SAMPLEINFO, 68 EU_GEN6_SAMPLER_MESSAGE_SAMPLE_KILLPIX, 69 70 EU_GEN6_SAMPLER_MESSAGE_GATHER4_C = 16, 71 EU_GEN6_SAMPLER_MESSAGE_GATHER4_PO = 17, 72 EU_GEN6_SAMPLER_MESSAGE_GATHER4_PO_C = 18, 73 74 EU_GEN6_SAMPLER_MESSAGE_SAMPLE_D_C = 20, 75 76 EU_GEN6_SAMPLER_MESSAGE_LD2DMS_W = 28, 77 EU_GEN6_SAMPLER_MESSAGE_LD_MCS = 29, 78 EU_GEN6_SAMPLER_MESSAGE_LD2DMS = 30, 79 EU_GEN6_SAMPLER_MESSAGE_SAMPLE2DMS = 31 80 }; 81 82 enum EU_PIXEL_INTERPOLATOR_MESSAGE_TYPE 83 { 84 EU_PI_MESSAGE_EVAL_PER_MESSAGE_OFFSET = 0, 85 EU_PI_MESSAGE_EVAL_SAMPLE_POSITION = 1, 86 EU_PI_MESSAGE_EVAL_CENTROID_POSITION = 2, 87 EU_PI_MESSAGE_EVAL_PER_SLOT_OFFSET = 3 88 }; 89 90 enum EU_PIXEL_INTERPOLATOR_INTERPOLATION_MODE 91 { 92 EU_PI_MESSAGE_PERSPECTIVE_INTERPOLATION = 0, 93 EU_PI_MESSAGE_LINEAR_INTERPOLATION = 1 94 }; 95 96 enum EU_PIXEL_INTERPOLATOR_SIMD_MODE 97 { 98 EU_PI_MESSAGE_SIMD8 = 0, 99 EU_PI_MESSAGE_SIMD16 = 1 100 }; 101 102 /*****************************************************************************\ 103 STRUCT: SEUPixelInterpolatorSampleIndexMessageDescriptorGen7_0 104 \*****************************************************************************/ 105 struct SEUPixelInterpolatorSampleIndexMessageDescriptorGen7_0 //Gen8 uses the same 106 { 107 union _DW0 108 { 109 struct _All 110 { 111 DWORD : 4; 112 DWORD SampleIndex : 4; 113 DWORD : 3; 114 DWORD SlotGroupSelect : 1; 115 DWORD MessageType : 2; 116 DWORD InterpolationMode : 1; 117 DWORD : 1; 118 DWORD SIMDMode : 1; 119 DWORD : 2; 120 DWORD HeaderPresent : 1; 121 DWORD ResponseLength : 5; 122 DWORD MessageLength : 4; 123 DWORD : 2; 124 DWORD EndOfThread : 1; // bool 125 } All; 126 127 DWORD Value; 128 } DW0; 129 }; 130 131 /*****************************************************************************\ 132 STRUCT: SEUPixelInterpolatorOffsetMessageDescriptorGen7_0 133 \*****************************************************************************/ 134 struct SEUPixelInterpolatorOffsetMessageDescriptorGen7_0 //Gen8 uses the same 135 { 136 union _DW0 137 { 138 struct _All 139 { 140 DWORD PerMessageXOffset : 4; 141 DWORD PerMessageYOffset : 4; 142 DWORD : 3; 143 DWORD SlotGroupSelect : 1; 144 DWORD MessageType : 2; 145 DWORD InterpolationMode : 1; 146 DWORD : 1; 147 DWORD SIMDMode : 1; 148 DWORD : 2; 149 DWORD HeaderPresent : 1; 150 DWORD ResponseLength : 5; 151 DWORD MessageLength : 4; 152 DWORD : 2; 153 DWORD EndOfThread : 1; // bool 154 } All; 155 156 DWORD Value; 157 } DW0; 158 }; 159 160 /*****************************************************************************\ 161 STRUCT: SEUPixelInterpolatorMessageDescriptorGen7_0 162 \*****************************************************************************/ 163 struct SEUPixelInterpolatorMessageDescriptorGen7_0 //Gen8 uses the same 164 { 165 union _DW0 166 { 167 struct _All 168 { 169 DWORD MessageSpecificControl : 8; 170 DWORD : 3; 171 DWORD SlotGroupSelect : 1; 172 DWORD MessageType : 2; 173 DWORD InterpolationMode : 1; 174 DWORD ShadingRate : 1; 175 DWORD SIMDMode : 1; 176 DWORD : 2; 177 DWORD HeaderPresent : 1; 178 DWORD ResponseLength : 5; 179 DWORD MessageLength : 4; 180 DWORD : 2; 181 DWORD EndOfThread : 1; // bool 182 } All; 183 184 DWORD Value; 185 } DW0; 186 }; 187 188 /*****************************************************************************\ 189 ENUM: EU_DATA_PORT_WRITE_MESSAGE_TYPE 190 \*****************************************************************************/ 191 enum EU_DATA_PORT_WRITE_MESSAGE_TYPE 192 { 193 EU_DATA_PORT_WRITE_MESSAGE_TYPE_OWORD_BLOCK_WRITE = 0, 194 EU_DATA_PORT_WRITE_MESSAGE_TYPE_OWORD_DUAL_BLOCK_WRITE = 1, 195 EU_DATA_PORT_WRITE_MESSAGE_TYPE_DWORD_BLOCK_WRITE = 2, 196 EU_DATA_PORT_WRITE_MESSAGE_TYPE_DWORD_SCATTERED_WRITE = 3, 197 EU_DATA_PORT_WRITE_MESSAGE_TYPE_RENDER_TARGET_WRITE = 4, 198 EU_DATA_PORT_WRITE_MESSAGE_TYPE_STREAMED_VERTEX_BUFFER_WRITE = 5, 199 EU_DATA_PORT_WRITE_MESSAGE_TYPE_RENDERTARGET_UNORM_WRITE = 6, // Only for Gen4.5 onwards 200 EU_DATA_PORT_WRITE_MESSAGE_TYPE_FLUSH_RENDER_CACHE = 7, 201 202 EU_DATA_PORT_WRITE_MESSAGE_TYPE_DWORD_ATOMIC_WRITE_MESSAGE = 8, // For Gen6 203 204 // Gen7.0 onwards 205 EU_DATA_PORT_WRITE_MESSAGE_TYPE_BYTE_SCATTERED_WRITE = 8, 206 EU_DATA_PORT_WRITE_MESSAGE_TYPE_UNTYPED_SURFACE_WRITE = 9, 207 EU_DATA_PORT_WRITE_MESSAGE_TYPE_TYPED_SURFACE_WRITE = 10, 208 EU_DATA_PORT_WRITE_MESSAGE_TYPE_UNTYPED_ATOMIC_OPERATION = 11, 209 EU_DATA_PORT_WRITE_MESSAGE_TYPE_TYPED_ATOMIC_OPERATION = 12, 210 EU_DATA_PORT_WRITE_MESSAGE_TYPE_MEMORY_FENCE = 13, 211 212 // Gen7.5 213 EU_DATA_PORT_WRITE_MESSAGE_TYPE_COUNTER_ATOMIC_OPERATION = 14, 214 EU_DATA_PORT_WRITE_MESSAGE_TYPE_COUNTER_ATOMIC_OPERATION_SIMD4x2 = 15, 215 EU_DATA_PORT_WRITE_MESSAGE_TYPE_UNTYPED_ATOMIC_OPERATION_SIMD4x2 = 16, 216 EU_DATA_PORT_WRITE_MESSAGE_TYPE_TYPED_ATOMIC_OPERATION_SIMD4x2 = 17, 217 218 // Gen 8 219 EU_DATA_PORT_WRITE_MESSAGE_TYPE_A64_UNTYPED_SURFACE_WRITE = 18, 220 EU_DATA_PORT_WRITE_MESSAGE_TYPE_A64_SCATTERED_WRITE = 19, 221 EU_DATA_PORT_WRITE_MESSAGE_TYPE_A64_UNTYPED_ATOMIC_OPERATION = 20, 222 EU_DATA_PORT_WRITE_MESSAGE_TYPE_A64_UNTYPED_ATOMIC_OPERATION_SIMD4X2 = 21, 223 EU_DATA_PORT_WRITE_MESSAGE_TYPE_A64_BLOCK_WRITE = 22, 224 225 // Gen 9 onwards 226 EU_DATA_PORT_WRITE_MESSAGE_TYPE_UNTYPED_ATOMIC_FLOAT_OPERATION = 23, 227 EU_DATA_PORT_WRITE_MESSAGE_TYPE_UNTYPED_ATOMIC_FLOAT_OPERATION_SIMD4X2 = 24, 228 EU_DATA_PORT_WRITE_MESSAGE_TYPE_A64_UNTYPED_ATOMIC_FLOAT_OPERATION = 25, 229 EU_DATA_PORT_WRITE_MESSAGE_TYPE_A64_UNTYPED_ATOMIC_FLOAT_OPERATION_SIMD4X2 = 26, 230 EU_DATA_PORT_WRITE_SCALED_MESSAGE_TYPE_BYTE_SCATTERED_WRITE = 27, 231 232 NUM_EU_DATA_PORT_WRITE_MESSAGE_TYPES 233 }; 234 235 /*****************************************************************************\ 236 ENUM: EU_DATA_PORT_A64_BYTE_SCATTERED_BLOCK_CONTROL 237 \*****************************************************************************/ 238 enum EU_DATA_PORT_A64_BYTE_SCATTERED_BLOCK_CONTROL 239 { 240 EU_DATA_PORT_A64_BYTE_SCATTERED_BLOCK_CONTROL_8BYTES = 0, 241 EU_DATA_PORT_A64_BYTE_SCATTERED_BLOCK_CONTROL_16BYTES = 16, 242 EU_DATA_PORT_A64_BYTE_SCATTERED_BLOCK_CONTROL_8SHORTS = 4, 243 EU_DATA_PORT_A64_BYTE_SCATTERED_BLOCK_CONTROL_16SHORTS = 20, 244 EU_DATA_PORT_A64_BYTE_SCATTERED_BLOCK_CONTROL_8DWORDS = 8, 245 EU_DATA_PORT_A64_BYTE_SCATTERED_BLOCK_CONTROL_16DWORDS = 24, 246 EU_DATA_PORT_A64_BYTE_SCATTERED_BLOCK_CONTROL_8QWORDS = 2, 247 }; 248 249 /*****************************************************************************\ 250 CONST: INVALID_MESSAGE_TYPE 251 \*****************************************************************************/ 252 static const unsigned int INVALID_MESSAGE_TYPE = 0xFFFFFFFF; 253 254 /*****************************************************************************\ 255 CONST: SCRATCH_SPACE_BTI 256 \*****************************************************************************/ 257 static const unsigned int SCRATCH_SPACE_BTI = 255; 258 259 /*****************************************************************************\ 260 CONST: STATELESS_BTI 261 \*****************************************************************************/ 262 static const unsigned int STATELESS_BTI = 255; 263 264 /*****************************************************************************\ 265 CONST: SLM_BTI 266 \*****************************************************************************/ 267 static const unsigned int SLM_BTI = 254; 268 269 /*****************************************************************************\ 270 CONST: STATELESS_NONCOHERENT_BTI 271 \*****************************************************************************/ 272 static const unsigned int STATELESS_NONCOHERENT_BTI = 253; 273 274 /*****************************************************************************\ 275 CONST: BINDLESS_BTI 276 \*****************************************************************************/ 277 static const unsigned int BINDLESS_BTI = 252; 278 279 /*****************************************************************************\ 280 CONST: SSH_BINDLESS_BTI 281 \*****************************************************************************/ 282 static const unsigned int SSH_BINDLESS_BTI = 251; 283 /*****************************************************************************\ 284 ENUM: EU_GEN7_DATA_CACHE_MESSAGE_TYPE 285 \*****************************************************************************/ 286 enum EU_GEN7_DATA_CACHE_MESSAGE_TYPE 287 { 288 EU_GEN7_DATA_CACHE_MESSAGE_TYPE_OWORD_BLOCK_READ = 0, 289 EU_GEN7_DATA_CACHE_MESSAGE_TYPE_UNALIGNED_OWORD_BLOCK_READ = 1, 290 EU_GEN7_DATA_CACHE_MESSAGE_TYPE_OWORD_DUAL_BLOCK_READ = 2, 291 EU_GEN7_DATA_CACHE_MESSAGE_TYPE_DWORD_SCATTERED_READ = 3, 292 EU_GEN7_DATA_CACHE_MESSAGE_TYPE_BYTE_SCATTERED_READ = 4, 293 EU_GEN7_DATA_CACHE_MESSAGE_TYPE_UNTYPED_SURFACE_READ = 5, 294 EU_GEN7_DATA_CACHE_MESSAGE_TYPE_UNTYPED_ATOMIC_OPERATION = 6, 295 EU_GEN7_DATA_CACHE_MESSAGE_TYPE_MEMORY_FENCE = 7, 296 EU_GEN7_DATA_CACHE_MESSAGE_TYPE_OWORD_BLOCK_WRITE = 8, 297 EU_GEN7_DATA_CACHE_MESSAGE_TYPE_OWORD_DUAL_BLOCK_WRITE = 10, 298 EU_GEN7_DATA_CACHE_MESSAGE_TYPE_DWORD_SCATTERED_WRITE = 11, 299 EU_GEN7_DATA_CACHE_MESSAGE_TYPE_BYTE_SCATTERED_WRITE = 12, 300 EU_GEN7_DATA_CACHE_MESSAGE_TYPE_UNTYPED_SURFACE_WRITE = 13, 301 }; 302 303 /*****************************************************************************\ 304 ENUM: EU_GEN7_RENDER_CACHE_MESSAGE_TYPE 305 \*****************************************************************************/ 306 enum EU_GEN7_RENDER_CACHE_MESSAGE_TYPE 307 { 308 EU_GEN7_RENDER_CACHE_MESSAGE_TYPE_MEDIA_BLOCK_READ = 4, 309 EU_GEN7_RENDER_CACHE_MESSAGE_TYPE_TYPED_SURFACE_READ = 5, 310 EU_GEN7_RENDER_CACHE_MESSAGE_TYPE_TYPED_ATOMIC_OPERATION = 6, 311 EU_GEN7_RENDER_CACHE_MESSAGE_TYPE_MEMORY_FENCE = 7, 312 EU_GEN7_RENDER_CACHE_MESSAGE_TYPE_MEDIA_BLOCK_WRITE = 10, 313 EU_GEN7_RENDER_CACHE_MESSAGE_TYPE_RENDER_TARGET_WRITE = 12, 314 EU_GEN7_RENDER_CACHE_MESSAGE_TYPE_TYPED_SURFACE_WRITE = 13, 315 }; 316 317 /*****************************************************************************\ 318 ENUM: EU_GEN9_RENDER_CACHE_MESSAGE_TYPE 319 \*****************************************************************************/ 320 enum EU_GEN9_RENDER_CACHE_MESSAGE_TYPE 321 { 322 EU_GEN9_RENDER_CACHE_MESSAGE_TYPE_RENDER_TARGET_WRITE = 12, 323 EU_GEN9_RENDER_CACHE_MESSAGE_TYPE_RENDER_TARGET_READ = 13, 324 }; 325 326 /*****************************************************************************\ 327 ENUM: EU_GEN9_DATA_PORT_RENDER_TARGET_READ_CONTROL 328 \*****************************************************************************/ 329 enum EU_GEN9_DATA_PORT_RENDER_TARGET_READ_CONTROL 330 { 331 EU_GEN9_DATA_PORT_RENDER_TARGET_READ_CONTROL_SIMD16_SINGLE_SOURCE = 0, 332 EU_GEN9_DATA_PORT_RENDER_TARGET_READ_CONTROL_SIMD8_SINGLE_SOURCE_LOW = 1, 333 EU_GEN9_DATA_PORT_RENDER_TARGET_READ_CONTROL_PER_SAMPLE_ENABLE = 32 334 }; 335 336 /*****************************************************************************\ 337 ENUM: EU_GEN6_DATA_PORT_RENDER_TARGET_WRITE_CONTROL 338 \*****************************************************************************/ 339 enum EU_GEN6_DATA_PORT_RENDER_TARGET_WRITE_CONTROL 340 { 341 EU_GEN6_DATA_PORT_RENDER_TARGET_WRITE_CONTROL_SIMD16_SINGLE_SOURCE = 0, 342 EU_GEN6_DATA_PORT_RENDER_TARGET_WRITE_CONTROL_SIMD16_SINGLE_SOURCE_REPLICATED = 1, 343 EU_GEN6_DATA_PORT_RENDER_TARGET_WRITE_CONTROL_SIMD8_DUAL_SOURCE_LOW = 2, 344 EU_GEN6_DATA_PORT_RENDER_TARGET_WRITE_CONTROL_SIMD8_DUAL_SOURCE_HIGH = 3, 345 EU_GEN6_DATA_PORT_RENDER_TARGET_WRITE_CONTROL_SIMD8_SINGLE_SOURCE_LOW = 4, 346 EU_GEN6_DATA_PORT_RENDER_TARGET_WRITE_CONTROL_SIMD8_IMAGE_WRITE = 5 347 }; 348 349 /*****************************************************************************\ 350 ENUM: EU_GEN6_DATA_PORT_RENDER_TARGET_WRITE_SLOT_GROUP_SELECT 351 \*****************************************************************************/ 352 enum EU_GEN6_DATA_PORT_RENDER_TARGET_WRITE_SLOT_GROUP_SELECT 353 { 354 EU_GEN6_DATA_PORT_RENDER_TARGET_WRITE_SLOTGRP_LO = 0, 355 EU_GEN6_DATA_PORT_RENDER_TARGET_WRITE_SLOTGRP_HI = 8, 356 }; 357 358 enum EU_GEN7_5_DATA_CACHE_1_MESSAGE_TYPE 359 { 360 EU_GEN8_DATA_CACHE_1_MESSAGE_TYPE_TRANSPOSE_READ = 0, 361 EU_GEN7_5_DATA_CACHE_1_MESSAGE_TYPE_UNTYPED_SURFACE_READ = 1, 362 EU_GEN7_5_DATA_CACHE_1_MESSAGE_TYPE_UNTYPED_ATOMIC_OPERATION = 2, 363 EU_GEN7_5_DATA_CACHE_1_MESSAGE_TYPE_UNTYPED_ATOMIC_OPERATION_SIMD4X2 = 3, 364 EU_GEN7_5_DATA_CACHE_1_MESSAGE_TYPE_MEDIA_BLOCK_READ = 4, 365 EU_GEN7_5_DATA_CACHE_1_MESSAGE_TYPE_TYPED_SURFACE_READ = 5, 366 EU_GEN7_5_DATA_CACHE_1_MESSAGE_TYPE_TYPED_ATOMIC_OPERATION = 6, 367 EU_GEN7_5_DATA_CACHE_1_MESSAGE_TYPE_TYPED_ATOMIC_OPERATION_SIMD4X2 = 7, 368 EU_GEN7_5_DATA_CACHE_1_MESSAGE_TYPE_UNTYPED_SURFACE_WRITE = 9, 369 EU_GEN7_5_DATA_CACHE_1_MESSAGE_TYPE_MEDIA_BLOCK_WRITE = 10, 370 EU_GEN7_5_DATA_CACHE_1_MESSAGE_TYPE_ATOMIC_COUNTER_OPERATION = 11, 371 EU_GEN7_5_DATA_CACHE_1_MESSAGE_TYPE_ATOMIC_COUNTER_OPERATION_SIMD4x2 = 12, 372 EU_GEN7_5_DATA_CACHE_1_MESSAGE_TYPE_TYPED_SURFACE_WRITE = 13, 373 EU_GEN8_DATA_CACHE_1_MESSAGE_TYPE_A64_SCATTERED_READ = 16, 374 EU_GEN8_DATA_CACHE_1_MESSAGE_TYPE_A64_UNTYPED_SURFACE_READ = 17, 375 EU_GEN8_DATA_CACHE_1_MESSAGE_TYPE_A64_UNTYPED_ATOMIC_OPERATION = 18, 376 EU_GEN8_DATA_CACHE_1_MESSAGE_TYPE_A64_UNTYPED_ATOMIC_OPERATION_SIMD4X2 = 19, 377 EU_GEN8_DATA_CACHE_1_MESSAGE_TYPE_A64_BLOCK_READ = 20, 378 EU_GEN8_DATA_CACHE_1_MESSAGE_TYPE_A64_BLOCK_WRITE = 21, 379 EU_GEN8_DATA_CACHE_1_MESSAGE_TYPE_A64_UNTYPED_ATOMIC_FLOAT_ADD = 24, 380 EU_GEN8_DATA_CACHE_1_MESSAGE_TYPE_A64_UNTYPED_SURFACE_WRITE = 25, 381 EU_GEN8_DATA_CACHE_1_MESSAGE_TYPE_A64_SCATTERED_WRITE = 26, 382 EU_GEN8_DATA_PORT_1_MESSAGE_TYPE_UNTYPED_ATOMIC_FLOAT = 27, 383 }; 384 385 enum EU_GEN12_DATA_CACHE_1_MESSAGE_TYPE 386 { 387 EU_GEN12_DATA_CACHE_1_MESSAGE_TYPE_WORD_UNTYPED_ATOMIC_INTEGER = 3, 388 EU_GEN12_DATA_CACHE_1_MESSAGE_TYPE_WORD_TYPED_ATOMIC_INTEGER = 7, 389 EU_GEN12_DATA_CACHE_1_MESSAGE_TYPE_WORD_ATOMIC_COUNTER = 12, 390 EU_GEN12_DATA_CACHE_1_MESSAGE_TYPE_A64_WORD_UNTYPED_ATOMIC_INTEGER = 19, 391 EU_GEN12_DATA_PORT_1_MESSAGE_TYPE_WORD_UNTYPED_ATOMIC_FLOAT = 28, 392 EU_GEN12_DATA_CACHE_1_MESSAGE_TYPE_A64_WORD_UNTYPED_ATOMIC_FLOAT = 30, 393 }; 394 395 enum EU_GEN7_SAMPLER_CACHE_MESSAGE_TYPE 396 { 397 EU_GEN8_SAMPLER_CACHE_MESSAGE_TYPE_SURFACE_INFO = 0, 398 EU_GEN7_SAMPLER_CACHE_MESSAGE_TYPE_UNALIGNED_OWORD_BLOCK_READ = 1, 399 EU_GEN7_SAMPLER_CACHE_MESSAGE_TYPE_MEDIA_BLOCK_READ = 4, 400 }; 401 402 enum EU_GEN7_CONSTANT_CACHE_MESSAGE_TYPE 403 { 404 EU_GEN7_CONSTANT_CACHE_MESSAGE_TYPE_OWORD_BLOCK_READ = 0, 405 EU_GEN7_CONSTANT_CACHE_MESSAGE_TYPE_UNALIGNED_OWORD_BLOCK_READ = 1, 406 EU_GEN7_CONSTANT_CACHE_MESSAGE_TYPE_OWORD_DUAL_BLOCK_READ = 2, 407 EU_GEN7_CONSTANT_CACHE_MESSAGE_TYPE_DWORD_SCATTERED_READ = 3, 408 EU_GEN9_CONSTANT_CACHE_MESSAGE_SURFACE_INFO = 6, 409 }; 410 411 enum EU_DATA_PORT_INVALIDATE_AFTER_READ 412 { 413 EU_DATA_PORT_INVALIDATE_AFTER_READ_ENABLE = 32 414 }; 415 416 417 enum DATA_PORT_TARGET_CACHE 418 { 419 DATA_PORT_TARGET_DATA_CACHE = 0, 420 DATA_PORT_TARGET_RENDER_CACHE = 1, 421 DATA_PORT_TARGET_SAMPLER_CACHE = 2, 422 DATA_PORT_TARGET_CONSTANT_CACHE = 3, 423 DATA_PORT_TARGET_DATA_CACHE_1 = 4 424 }; 425 426 enum EU_GEN6_DATA_PORT_RENDER_TARGET_WRITE_CONTROL_PIXEL_SCOREBOARD 427 { 428 EU_GEN6_DATA_PORT_RENDER_TARGET_WRITE_CONTROL_PIXEL_SCOREBOARD_CLEAR = 16 429 }; 430 431 enum EU_DATA_PORT_UNTYPED_SURFACE_SIMD_MODE 432 { 433 EU_DATA_PORT_UNTYPED_SURFACE_SIMD_SIMD4X2 = 0, // read message only 434 EU_DATA_PORT_UNTYPED_SURFACE_SIMD_16 = 16, 435 EU_DATA_PORT_UNTYPED_SURFACE_SIMD_8 = 32 436 }; 437 438 enum EU_DATA_PORT_READ_MESSAGE_TYPE 439 440 { 441 EU_DATA_PORT_READ_MESSAGE_TYPE_OWORD_BLOCK_READ = 0, 442 EU_DATA_PORT_READ_MESSAGE_TYPE_OWORD_DUAL_BLOCK_READ = 1, 443 EU_DATA_PORT_READ_MESSAGE_TYPE_DWORD_BLOCK_READ = 2, 444 EU_DATA_PORT_READ_MESSAGE_TYPE_DWORD_SCATTERED_READ = 3, 445 446 // Gen4.5 onwards 447 EU_DATA_PORT_READ_MESSAGE_TYPE_RENDERTARGET_UNORM_READ = 4, 448 EU_DATA_PORT_READ_MESSAGE_TYPE_AVC_LOOPFILTER_READ = 5, 449 450 // Gen6.0 onwards 451 EU_DATA_PORT_READ_MESSAGE_TYPE_UNALIGNED_OWORD_BLOCK_READ = 6, 452 453 // Gen7.0 onwards 454 EU_DATA_PORT_READ_MESSAGE_TYPE_BYTE_SCATTERED_READ = 7, 455 EU_DATA_PORT_READ_MESSAGE_TYPE_UNTYPED_SURFACE_READ = 8, 456 EU_DATA_PORT_READ_MESSAGE_TYPE_TYPED_SURFACE_READ = 9, 457 458 // Gen8.0 onwards 459 EU_DATA_PORT_READ_MESSAGE_TYPE_A64_UNTYPED_SURFACE_READ = 10, 460 EU_DATA_PORT_READ_MESSAGE_TYPE_A64_SCATTERED_READ = 11, 461 EU_DATA_PORT_READ_MESSAGE_TYPE_A64_BLOCK_READ = 12, 462 463 // Gen9.0 onwards 464 EU_DATA_PORT_READ_MESSAGE_TYPE_TRANSPOSE_READ = 13, 465 EU_DATA_PORT_READ_MESSAGE_TYPE_RENDER_TARGET_READ = 14, 466 467 EU_DATA_PORT_READ_MESSAGE_TYPE_SURFACE_INFO_READ = 15, 468 469 NUM_EU_DATA_PORT_READ_MESSAGE_TYPES 470 }; 471 472 /*****************************************************************************\ 473 ENUM: EU_SAMPLER_SIMD_MODE 474 \*****************************************************************************/ 475 enum EU_SAMPLER_SIMD_MODE 476 { 477 EU_SAMPLER_SIMD_SIMD4x2 = 0, 478 EU_SAMPLER_SIMD_SIMD8 = 1, 479 EU_SAMPLER_SIMD_SIMD16 = 2, 480 EU_SAMPLER_SIMD_SIMD32 = 3, 481 EU_SAMPLER_SIMD_SIMD64 = 3 482 }; 483 484 /*****************************************************************************\ 485 STRUCT: SEUSamplerMessageDescriptorGen7 486 \*****************************************************************************/ 487 struct SEUSamplerMessageDescriptorGen7 //Gen8 uses the same 488 { 489 union _DW0 490 { 491 struct _All 492 { 493 unsigned int BindingTableIndex : 8; 494 unsigned int SamplerIndex : 4; 495 unsigned int MessageType : 5; 496 unsigned int SIMDMode : 2; 497 unsigned int HeaderPresent : 1; 498 unsigned int ResponseLength : 5; 499 unsigned int MessageLength : 4; 500 unsigned int FP16Input : 1; 501 unsigned int FP16Return : 1; 502 unsigned int EndOfThread : 1; // bool 503 } All; 504 505 unsigned int Value; 506 } DW0; 507 }; 508 509 const unsigned int cConvertDataPortWriteMessageType[NUM_EU_DATA_PORT_WRITE_MESSAGE_TYPES] = 510 { 511 EU_GEN7_DATA_CACHE_MESSAGE_TYPE_OWORD_BLOCK_WRITE, // EU_DATA_PORT_WRITE_MESSAGE_TYPE_OWORD_BLOCK_WRITE 512 EU_GEN7_DATA_CACHE_MESSAGE_TYPE_OWORD_DUAL_BLOCK_WRITE, // EU_DATA_PORT_WRITE_MESSAGE_TYPE_OWORD_DUAL_BLOCK_WRITE 513 INVALID_MESSAGE_TYPE, // EU_DATA_PORT_WRITE_MESSAGE_TYPE_DWORD_BLOCK_WRITE 514 EU_GEN7_DATA_CACHE_MESSAGE_TYPE_DWORD_SCATTERED_WRITE, // EU_DATA_PORT_WRITE_MESSAGE_TYPE_DWORD_SCATTERED_WRITE 515 EU_GEN9_RENDER_CACHE_MESSAGE_TYPE_RENDER_TARGET_WRITE, // EU_DATA_PORT_WRITE_MESSAGE_TYPE_RENDER_TARGET_WRITE 516 INVALID_MESSAGE_TYPE, // EU_DATA_PORT_WRITE_MESSAGE_TYPE_STREAMED_VERTEX_BUFFER_WRITE 517 INVALID_MESSAGE_TYPE, // EU_DATA_PORT_WRITE_MESSAGE_TYPE_RENDERTARGET_UNORM_WRITE 518 INVALID_MESSAGE_TYPE, // EU_DATA_PORT_WRITE_MESSAGE_TYPE_FLUSH_RENDER_CACHE 519 EU_GEN7_DATA_CACHE_MESSAGE_TYPE_BYTE_SCATTERED_WRITE, // EU_DATA_PORT_WRITE_MESSAGE_TYPE_BYTE_SCATTERED_WRITE 520 EU_GEN7_5_DATA_CACHE_1_MESSAGE_TYPE_UNTYPED_SURFACE_WRITE, // EU_DATA_PORT_WRITE_MESSAGE_TYPE_UNTYPED_SURFACE_WRITE 521 EU_GEN7_5_DATA_CACHE_1_MESSAGE_TYPE_TYPED_SURFACE_WRITE, // EU_DATA_PORT_WRITE_MESSAGE_TYPE_TYPED_SURFACE_WRITE 522 EU_GEN7_5_DATA_CACHE_1_MESSAGE_TYPE_UNTYPED_ATOMIC_OPERATION, // EU_DATA_PORT_WRITE_MESSAGE_TYPE_UNTYPED_ATOMIC_OPERATION 523 EU_GEN7_5_DATA_CACHE_1_MESSAGE_TYPE_TYPED_ATOMIC_OPERATION, // EU_DATA_PORT_WRITE_MESSAGE_TYPE_TYPED_ATOMIC_OPERATION 524 EU_GEN7_RENDER_CACHE_MESSAGE_TYPE_MEMORY_FENCE, // EU_DATA_PORT_WRITE_MESSAGE_TYPE_MEMORY_FENCE 525 // EU_GEN7_DATA_CACHE_MESSAGE_TYPE_MEMORY_FENCE and EU_GEN7_RENDER_CACHE_MESSAGE_TYPE_MEMORY_FENCE are the same constants 526 EU_GEN7_5_DATA_CACHE_1_MESSAGE_TYPE_ATOMIC_COUNTER_OPERATION, // EU_DATA_PORT_WRITE_MESSAGE_TYPE_COUNTER_ATOMIC_OPERATION 527 EU_GEN7_5_DATA_CACHE_1_MESSAGE_TYPE_ATOMIC_COUNTER_OPERATION_SIMD4x2, // EU_DATA_PORT_WRITE_MESSAGE_TYPE_COUNTER_ATOMIC_OPERATION_SIMD4x2 528 EU_GEN7_5_DATA_CACHE_1_MESSAGE_TYPE_UNTYPED_ATOMIC_OPERATION_SIMD4X2, // EU_DATA_PORT_WRITE_MESSAGE_TYPE_UNTYPED_ATOMIC_OPERATION_SIMD4x2 529 EU_GEN7_5_DATA_CACHE_1_MESSAGE_TYPE_TYPED_ATOMIC_OPERATION_SIMD4X2, // EU_DATA_PORT_WRITE_MESSAGE_TYPE_TYPED_ATOMIC_OPERATION_SIMD4x2 530 EU_GEN8_DATA_CACHE_1_MESSAGE_TYPE_A64_UNTYPED_SURFACE_WRITE, // EU_DATA_PORT_WRITE_MESSAGE_TYPE_A64_UNTYPED_SURFACE_WRITE 531 EU_GEN8_DATA_CACHE_1_MESSAGE_TYPE_A64_SCATTERED_WRITE, // EU_DATA_PORT_WRITE_MESSAGE_TYPE_A64_SCATTERED_WRITE 532 EU_GEN8_DATA_CACHE_1_MESSAGE_TYPE_A64_UNTYPED_ATOMIC_OPERATION, // EU_DATA_PORT_WRITE_MESSAGE_TYPE_A64_UNTYPED_ATOMIC_OPERATION 533 EU_GEN8_DATA_CACHE_1_MESSAGE_TYPE_A64_UNTYPED_ATOMIC_OPERATION_SIMD4X2, // EU_DATA_PORT_WRITE_MESSAGE_TYPE_A64_UNTYPED_ATOMIC_OPERATION_SIMD4X2 534 EU_GEN8_DATA_CACHE_1_MESSAGE_TYPE_A64_BLOCK_WRITE, // EU_DATA_PORT_WRITE_MESSAGE_TYPE_A64_BLOCK_WRITE 535 }; 536 537 enum EU_DATA_PORT_DWORD_SCATTERED_BLOCK_CONTROL 538 { 539 EU_DATA_PORT_DWORD_SCATTERED_BLOCK_CONTROL_8DWORDS = 2, 540 EU_DATA_PORT_DWORD_SCATTERED_BLOCK_CONTROL_16DWORDS = 3 541 }; 542 543 /*****************************************************************************\ 544 ENUM: EU_DATA_PORT_ATOMIC_OPERATION_TYPE 545 \*****************************************************************************/ 546 enum EU_DATA_PORT_ATOMIC_OPERATION_TYPE 547 { 548 EU_DATA_PORT_ATOMIC_OPERATION_AND = 1, 549 EU_DATA_PORT_ATOMIC_OPERATION_OR = 2, 550 EU_DATA_PORT_ATOMIC_OPERATION_XOR = 3, 551 EU_DATA_PORT_ATOMIC_OPERATION_MOV = 4, 552 EU_DATA_PORT_ATOMIC_OPERATION_INC = 5, 553 EU_DATA_PORT_ATOMIC_OPERATION_DEC = 6, 554 EU_DATA_PORT_ATOMIC_OPERATION_ADD = 7, 555 EU_DATA_PORT_ATOMIC_OPERATION_SUB = 8, 556 EU_DATA_PORT_ATOMIC_OPERATION_REVSUB = 9, 557 EU_DATA_PORT_ATOMIC_OPERATION_IMAX = 10, 558 EU_DATA_PORT_ATOMIC_OPERATION_IMIN = 11, 559 EU_DATA_PORT_ATOMIC_OPERATION_UMAX = 12, 560 EU_DATA_PORT_ATOMIC_OPERATION_UMIN = 13, 561 EU_DATA_PORT_ATOMIC_OPERATION_CMPWR = 14, 562 EU_DATA_PORT_ATOMIC_OPERATION_PREDEC = 15, 563 564 // A64 Atomic Operations 565 EU_DATA_PORT_A64_ATOMIC_OPERATION_AND = 16, 566 EU_DATA_PORT_A64_ATOMIC_OPERATION_OR = 17, 567 EU_DATA_PORT_A64_ATOMIC_OPERATION_XOR = 18, 568 EU_DATA_PORT_A64_ATOMIC_OPERATION_MOV = 19, 569 EU_DATA_PORT_A64_ATOMIC_OPERATION_INC = 20, 570 EU_DATA_PORT_A64_ATOMIC_OPERATION_DEC = 21, 571 EU_DATA_PORT_A64_ATOMIC_OPERATION_ADD = 22, 572 EU_DATA_PORT_A64_ATOMIC_OPERATION_SUB = 23, 573 EU_DATA_PORT_A64_ATOMIC_OPERATION_REVSUB = 24, 574 EU_DATA_PORT_A64_ATOMIC_OPERATION_IMAX = 25, 575 EU_DATA_PORT_A64_ATOMIC_OPERATION_IMIN = 26, 576 EU_DATA_PORT_A64_ATOMIC_OPERATION_UMAX = 27, 577 EU_DATA_PORT_A64_ATOMIC_OPERATION_UMIN = 28, 578 EU_DATA_PORT_A64_ATOMIC_OPERATION_CMPWR = 29, 579 EU_DATA_PORT_A64_ATOMIC_OPERATION_PREDEC = 30, 580 EU_DATA_PORT_A64_ATOMIC_OPERATION_CMPWR8B = 31, 581 EU_DATA_PORT_A64_ATOMIC_OPERATION_CMPWR16B = 32, 582 EU_DATA_PORT_A64_ATOMIC_OPERATION_FMIN = 33, 583 EU_DATA_PORT_A64_ATOMIC_OPERATION_FMAX = 34, 584 EU_DATA_PORT_A64_ATOMIC_OPERATION_FCMPWR = 35, 585 }; 586 587 /*****************************************************************************\ 588 STRUCT: SEUDataPortMessageDescriptorGen8_0 589 \*****************************************************************************/ 590 struct SEUDataPortMessageDescriptorGen8_0 591 { 592 union _DW0 593 { 594 struct _All 595 { 596 unsigned int BindingTableIndex : 8; 597 unsigned int MessageSpecificControl : 6; 598 unsigned int MessageType : 5; 599 600 // cache message type is represented by 5-bits and for messages 601 // that use Data Port Data Cache0 message type is represented 602 // by 4-bits and should be using SEUDataPortMessageDescriptorGen7_0. 603 unsigned int HeaderPresent : 1; // bool 604 unsigned int ResponseLength : 5; 605 unsigned int MessageLength : 4; 606 unsigned int : 2; 607 unsigned int EndOfThread : 1; // bool 608 } All; 609 610 unsigned int Value; 611 } DW0; 612 }; 613 614 615 /*****************************************************************************\ 616 STRUCT: VMEMessageDescriptorGen8_0 617 \*****************************************************************************/ 618 struct VMEMessageDescriptorGen8_0 619 { 620 union _DW0 621 { 622 struct { 623 uint32_t BindingTableIndex : 8; // bit[7:0] 624 uint32_t : 5; // bit[12:8] 625 uint32_t MessageType : 2; // bit[14:13] 626 uint32_t StreamOutEnable : 1; // bit[15:15] 627 uint32_t StreamInEnable : 1; // bit[16:16] 628 uint32_t : 2; // bit[18:17] 629 uint32_t HeaderPresent : 1; // bit[19:19] 630 uint32_t ResponseLength : 5; // bit[24:20] 631 uint32_t MessageLength : 4; // bit[28:25] 632 } All; 633 634 uint32_t Value; 635 } DW0; 636 }; 637 638 /*****************************************************************************\ 639 STRUCT: SEUPixelDataPortMessageDescriptorGen8_0 640 \*****************************************************************************/ 641 struct SEUPixelDataPortMessageDescriptorGen8_0 642 { 643 union _DW0 644 { 645 struct _All 646 { 647 unsigned int BindingTableIndex : 8; 648 unsigned int MessageSubType : 3; 649 unsigned int Slot : 1; 650 unsigned int LastRT : 1; 651 unsigned int PerSample : 1; 652 unsigned int MessageType : 4; 653 unsigned int PerCoarse : 1; 654 unsigned int HeaderPresent : 1; 655 unsigned int ResponseLength : 5; 656 unsigned int MessageLength : 4; 657 unsigned int Reserved : 1; 658 unsigned int PrecisionSubType : 1; 659 unsigned int : 1; 660 } All; 661 662 unsigned int Value; 663 } DW0; 664 }; 665 666 /*****************************************************************************\ 667 STRUCT: SEUURBMessageDescriptorGen8_0 668 \*****************************************************************************/ 669 struct SEUURBMessageDescriptorGen8_0 670 { 671 union _DW0 672 { 673 struct _Simd8 674 { 675 unsigned int URBOpcode : 4; 676 unsigned int GlobalOffset : 11; 677 unsigned int ChannelMaskPresent : 1; 678 unsigned int : 1; 679 unsigned int PerSlotOffset : 1; 680 unsigned int : 1; 681 unsigned int HeaderPresent : 1; 682 unsigned int ResponseLength : 5; 683 unsigned int MessageLength : 4; 684 unsigned int : 2; 685 unsigned int reserved : 1; 686 } Simd8; 687 688 unsigned int Value; 689 } DW0; 690 }; 691 692 enum EU_URB_OPCODE 693 { 694 EU_URB_OPCODE_WRITE_HWORD = 0, 695 EU_URB_OPCODE_WRITE_OWORD = 1, 696 EU_URB_OPCODE_READ_HWORD = 2, 697 EU_URB_OPCODE_READ_OWORD = 3, 698 EU_URB_OPCODE_ATOMIC_MOV = 4, 699 EU_URB_OPCODE_ATOMIC_INC = 5, 700 EU_URB_OPCODE_ATOMIC_ADD = 6, 701 EU_URB_OPCODE_SIMD8_WRITE = 7, 702 EU_URB_OPCODE_SIMD8_READ = 8, 703 }; 704 705 EU_GEN6_SAMPLER_MESSAGE_TYPE GetSampleMessage(EOPCODE opCode); 706 707 EU_SAMPLER_SIMD_MODE samplerSimdMode(SIMDMode simd); 708 EU_PIXEL_INTERPOLATOR_SIMD_MODE pixelInterpolatorSimDMode(SIMDMode simd); 709 EU_DATA_PORT_ATOMIC_OPERATION_TYPE getHwAtomicOpEnum(AtomicOp op); 710 711 uint encodeMessageDescriptorForAtomicUnaryOp( 712 const unsigned int messageLength, 713 const unsigned int responseLength, 714 bool headerPresent, 715 const uint message_type, 716 const bool returnData, 717 const SIMDMode simdMode, 718 EU_DATA_PORT_ATOMIC_OPERATION_TYPE atomic_op_type, 719 uint binding_table_index); 720 721 uint encodeMessageSpecificControlForReadWrite( 722 const EU_DATA_PORT_READ_MESSAGE_TYPE messageType, 723 const VISAChannelMask mask, 724 const SIMDMode simdMode); 725 726 uint encodeMessageSpecificControlForReadWrite( 727 const EU_DATA_PORT_WRITE_MESSAGE_TYPE messageType, 728 const VISAChannelMask mask, 729 const SIMDMode simdMode); 730 731 unsigned int Sampler( 732 unsigned int messageLength, 733 unsigned int responseLength, 734 bool headerPresent, 735 EU_SAMPLER_SIMD_MODE executionMode, 736 EU_GEN6_SAMPLER_MESSAGE_TYPE messageType, 737 unsigned int samplerIndex, 738 unsigned int resourceIndex, 739 bool endOfThread, 740 bool FP16Input, 741 bool FP16Return); 742 743 unsigned int DataPortWrite( 744 const uint messageLength, 745 const uint responseLength, 746 const bool headerPresent, 747 const bool endOfThread, 748 const EU_DATA_PORT_WRITE_MESSAGE_TYPE messageType, 749 const uint messageSpecificControl, 750 const bool invalidateAfterReadEnable, 751 const uint bindingTableIndex); 752 753 unsigned int PixelDataPort( 754 const bool precisionSubType, 755 const uint messageLength, 756 const uint responseLength, 757 const bool headerPresent, 758 const bool perCoarse, 759 const bool perSample, 760 const bool lastRT, 761 const bool secondHalf, 762 const EU_GEN6_DATA_PORT_RENDER_TARGET_WRITE_CONTROL messageSubType, 763 const uint bindingTableIndex); 764 765 unsigned int DataPortRead( 766 const unsigned int messageLength, 767 const unsigned int responseLength, 768 const bool headerPresent, 769 const EU_DATA_PORT_READ_MESSAGE_TYPE messageType, 770 const uint messageSpecificControl, 771 const bool invalidateAfterReadEnableHint, 772 const DATA_PORT_TARGET_CACHE targetCache, 773 const unsigned int bindingTableIndex); 774 775 unsigned int UrbMessage( 776 const unsigned int messageLength, 777 const unsigned int responseLength, 778 const bool endOfThread, 779 const bool perSlotOffset, 780 const bool channelMaskPresent, 781 const unsigned int globalOffset, 782 const EU_URB_OPCODE urbOpcode); 783 784 unsigned int PixelInterpolator( 785 const unsigned int messageLength, 786 const unsigned int responseLength, 787 const unsigned int pass, 788 EU_PIXEL_INTERPOLATOR_SIMD_MODE executionMode, 789 EU_PIXEL_INTERPOLATOR_MESSAGE_TYPE messageType, 790 EU_PIXEL_INTERPOLATOR_INTERPOLATION_MODE interpolationMode, 791 const unsigned int sampleindex); 792 793 unsigned int PixelInterpolator( 794 unsigned int messageLength, 795 unsigned int responseLength, 796 unsigned int pass, 797 EU_PIXEL_INTERPOLATOR_SIMD_MODE executionMode, 798 EU_PIXEL_INTERPOLATOR_MESSAGE_TYPE messageType, 799 EU_PIXEL_INTERPOLATOR_INTERPOLATION_MODE interpolationMode, 800 unsigned int perMessageXOffset, 801 unsigned int perMessageYOffset); 802 803 unsigned int PixelInterpolator( 804 const DWORD messageLength, 805 const DWORD responseLength, 806 const DWORD pass, 807 bool IsCoarse, 808 EU_PIXEL_INTERPOLATOR_SIMD_MODE executionMode, 809 EU_PIXEL_INTERPOLATOR_MESSAGE_TYPE messageType, 810 EU_PIXEL_INTERPOLATOR_INTERPOLATION_MODE interpolationMode); 811 812 unsigned int PIPullPixelPayload( 813 EU_PIXEL_INTERPOLATOR_SIMD_MODE executionMode, 814 DWORD responseLength, 815 DWORD messageLenght, 816 bool inputCoverage, 817 bool linearCentroidBary, 818 bool linearCenterBary, 819 bool perspectiveCentroid, 820 bool perspectiveCenter, 821 bool OutputCoverageMask); 822 823 uint32_t VMEDescriptor( 824 COMMON_ISA_VME_STREAM_MODE streamMode, 825 const uint32_t bti, 826 const uint32_t msgType, 827 const uint32_t regs2snd, 828 const uint32_t regs2rcv 829 ); 830 831 832 } 833