/dports/emulators/citra/citra-ac98458e0/externals/dynarmic/src/backend/A64/emitter/ |
H A D | a64_emitter.cpp | 2928 Emit2RegMisc(false, 0, size >> 6, 0x17, Rd, Rn); in FCVTL() 2931 Emit2RegMisc(true, 0, size >> 6, 0x17, Rd, Rn); in FCVTL2() 2964 Emit2RegMisc(IsQuad(Rd), 1, 0, 5, Rd, Rn); in NOT() 2970 Emit2RegMisc(IsQuad(Rd), 0, size >> 4, 1, Rd, Rn); in REV16() 2973 Emit2RegMisc(IsQuad(Rd), 1, size >> 4, 0, Rd, Rn); in REV32() 2976 Emit2RegMisc(IsQuad(Rd), 0, size >> 4, 0, Rd, Rn); in REV64() 3035 Emit2RegMisc(IsQuad(Rd), 0, size >> 6, 0x1D, Rd, Rn); in SCVTF() 3038 Emit2RegMisc(IsQuad(Rd), 1, size >> 6, 0x1D, Rd, Rn); in UCVTF() 3052 Emit2RegMisc(true, 0, dest_size >> 4, 0b10100, Rd, Rn); in SQXTN2() 3058 Emit2RegMisc(true, 1, dest_size >> 4, 0b10100, Rd, Rn); in UQXTN2() [all …]
|
H A D | a64_emitter.h | 1119 void Emit2RegMisc(bool Q, bool U, u32 size, u32 opcode, ARM64Reg Rd, ARM64Reg Rn);
|
/dports/emulators/citra-qt5/citra-ac98458e0/externals/dynarmic/src/backend/A64/emitter/ |
H A D | a64_emitter.cpp | 2928 Emit2RegMisc(false, 0, size >> 6, 0x17, Rd, Rn); in FCVTL() 2931 Emit2RegMisc(true, 0, size >> 6, 0x17, Rd, Rn); in FCVTL2() 2964 Emit2RegMisc(IsQuad(Rd), 1, 0, 5, Rd, Rn); in NOT() 2970 Emit2RegMisc(IsQuad(Rd), 0, size >> 4, 1, Rd, Rn); in REV16() 2973 Emit2RegMisc(IsQuad(Rd), 1, size >> 4, 0, Rd, Rn); in REV32() 2976 Emit2RegMisc(IsQuad(Rd), 0, size >> 4, 0, Rd, Rn); in REV64() 3035 Emit2RegMisc(IsQuad(Rd), 0, size >> 6, 0x1D, Rd, Rn); in SCVTF() 3038 Emit2RegMisc(IsQuad(Rd), 1, size >> 6, 0x1D, Rd, Rn); in UCVTF() 3052 Emit2RegMisc(true, 0, dest_size >> 4, 0b10100, Rd, Rn); in SQXTN2() 3058 Emit2RegMisc(true, 1, dest_size >> 4, 0b10100, Rd, Rn); in UQXTN2() [all …]
|
H A D | a64_emitter.h | 1119 void Emit2RegMisc(bool Q, bool U, u32 size, u32 opcode, ARM64Reg Rd, ARM64Reg Rn);
|
/dports/emulators/dolphin-emu/dolphin-3152428/Source/Core/Common/ |
H A D | Arm64Emitter.cpp | 3270 Emit2RegMisc(false, 0, size >> 6, 0x17, Rd, Rn); in FCVTL() 3274 Emit2RegMisc(true, 0, size >> 6, 0x17, Rd, Rn); in FCVTL2() 3318 Emit2RegMisc(IsQuad(Rd), 1, 0, 5, Rd, Rn); in NOT() 3326 Emit2RegMisc(IsQuad(Rd), 0, size >> 4, 1, Rd, Rn); in REV16() 3330 Emit2RegMisc(IsQuad(Rd), 1, size >> 4, 0, Rd, Rn); in REV32() 3334 Emit2RegMisc(IsQuad(Rd), 0, size >> 4, 0, Rd, Rn); in REV64() 3338 Emit2RegMisc(IsQuad(Rd), 0, size >> 6, 0x1D, Rd, Rn); in SCVTF() 3342 Emit2RegMisc(IsQuad(Rd), 1, size >> 6, 0x1D, Rd, Rn); in UCVTF() 3360 Emit2RegMisc(true, 0, dest_size >> 4, 0b10100, Rd, Rn); in SQXTN2() 3368 Emit2RegMisc(true, 1, dest_size >> 4, 0b10100, Rd, Rn); in UQXTN2() [all …]
|
H A D | Arm64Emitter.h | 1096 void Emit2RegMisc(bool Q, bool U, u32 size, u32 opcode, ARM64Reg Rd, ARM64Reg Rn);
|
/dports/emulators/ppsspp-qt5/ppsspp-1.12.3/Common/ |
H A D | Arm64Emitter.cpp | 3032 Emit2RegMisc(false, 0, size >> 6, 0x17, Rd, Rn); 3036 Emit2RegMisc(true, 0, size >> 6, 0x17, Rd, Rn); 3092 Emit2RegMisc(IsQuad(Rd), 1, 0, 5, Rd, Rn); 3100 Emit2RegMisc(IsQuad(Rd), 0, size >> 4, 1, Rd, Rn); 3104 Emit2RegMisc(IsQuad(Rd), 1, size >> 4, 0, Rd, Rn); 3108 Emit2RegMisc(IsQuad(Rd), 0, size >> 4, 0, Rd, Rn); 3112 Emit2RegMisc(IsQuad(Rd), 0, size >> 6, 0x1D, Rd, Rn); 3116 Emit2RegMisc(IsQuad(Rd), 1, size >> 6, 0x1D, Rd, Rn); 3134 Emit2RegMisc(true, 0, dest_size >> 4, 0x14, Rd, Rn); 3142 Emit2RegMisc(true, 1, dest_size >> 4, 0x14, Rd, Rn); [all …]
|
H A D | Arm64Emitter.h | 956 void Emit2RegMisc(bool Q, bool U, u32 size, u32 opcode, ARM64Reg Rd, ARM64Reg Rn);
|
/dports/emulators/ppsspp/ppsspp-1.12.3/Common/ |
H A D | Arm64Emitter.cpp | 3032 Emit2RegMisc(false, 0, size >> 6, 0x17, Rd, Rn); in FCVTL() 3036 Emit2RegMisc(true, 0, size >> 6, 0x17, Rd, Rn); in FCVTL2() 3092 Emit2RegMisc(IsQuad(Rd), 1, 0, 5, Rd, Rn); in NOT() 3100 Emit2RegMisc(IsQuad(Rd), 0, size >> 4, 1, Rd, Rn); in REV16() 3104 Emit2RegMisc(IsQuad(Rd), 1, size >> 4, 0, Rd, Rn); in REV32() 3108 Emit2RegMisc(IsQuad(Rd), 0, size >> 4, 0, Rd, Rn); in REV64() 3112 Emit2RegMisc(IsQuad(Rd), 0, size >> 6, 0x1D, Rd, Rn); in SCVTF() 3116 Emit2RegMisc(IsQuad(Rd), 1, size >> 6, 0x1D, Rd, Rn); in UCVTF() 3134 Emit2RegMisc(true, 0, dest_size >> 4, 0x14, Rd, Rn); in SQXTN2() 3142 Emit2RegMisc(true, 1, dest_size >> 4, 0x14, Rd, Rn); in UQXTN2() [all …]
|
H A D | Arm64Emitter.h | 956 void Emit2RegMisc(bool Q, bool U, u32 size, u32 opcode, ARM64Reg Rd, ARM64Reg Rn);
|
/dports/emulators/libretro-ppsspp/ppsspp-1.12.3/Common/ |
H A D | Arm64Emitter.cpp | 3032 Emit2RegMisc(false, 0, size >> 6, 0x17, Rd, Rn); in FCVTL() 3036 Emit2RegMisc(true, 0, size >> 6, 0x17, Rd, Rn); in FCVTL2() 3092 Emit2RegMisc(IsQuad(Rd), 1, 0, 5, Rd, Rn); in NOT() 3100 Emit2RegMisc(IsQuad(Rd), 0, size >> 4, 1, Rd, Rn); in REV16() 3104 Emit2RegMisc(IsQuad(Rd), 1, size >> 4, 0, Rd, Rn); in REV32() 3108 Emit2RegMisc(IsQuad(Rd), 0, size >> 4, 0, Rd, Rn); in REV64() 3112 Emit2RegMisc(IsQuad(Rd), 0, size >> 6, 0x1D, Rd, Rn); in SCVTF() 3116 Emit2RegMisc(IsQuad(Rd), 1, size >> 6, 0x1D, Rd, Rn); in UCVTF() 3134 Emit2RegMisc(true, 0, dest_size >> 4, 0x14, Rd, Rn); in SQXTN2() 3142 Emit2RegMisc(true, 1, dest_size >> 4, 0x14, Rd, Rn); in UQXTN2() [all …]
|
H A D | Arm64Emitter.h | 956 void Emit2RegMisc(bool Q, bool U, u32 size, u32 opcode, ARM64Reg Rd, ARM64Reg Rn);
|