| /dports/devel/llvm10/llvm-10.0.1.src/lib/Target/AArch64/ |
| H A D | AArch64CallLowering.cpp | 150 Register FIReg = MRI.createGenericVirtualRegister(p0); in getStackAddress() local
151 MIRBuilder.buildFrameIndex(FIReg, FI); in getStackAddress()
153 return FIReg; in getStackAddress()
|
| /dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| H A D | AArch64CallLowering.cpp | 150 Register FIReg = MRI.createGenericVirtualRegister(p0); in getStackAddress() local
151 MIRBuilder.buildFrameIndex(FIReg, FI); in getStackAddress()
153 return FIReg; in getStackAddress()
|
| /dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64CallLowering.cpp | 150 Register FIReg = MRI.createGenericVirtualRegister(p0); in getStackAddress() local
151 MIRBuilder.buildFrameIndex(FIReg, FI); in getStackAddress()
153 return FIReg; in getStackAddress()
|
| /dports/devel/llvm70/llvm-7.0.1.src/lib/Target/AMDGPU/ |
| H A D | SIRegisterInfo.cpp | 323 unsigned FIReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass); in materializeFrameBaseRegister() local
327 BuildMI(*MBB, Ins, DL, TII->get(AMDGPU::V_MOV_B32_e32), FIReg) in materializeFrameBaseRegister()
332 .addReg(FIReg); in materializeFrameBaseRegister()
|
| /dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64CallLowering.cpp | 149 auto FIReg = MIRBuilder.buildFrameIndex(p0, FI); in getStackAddress() local
151 return FIReg.getReg(0); in getStackAddress()
|
| /dports/devel/llvm12/llvm-project-12.0.1.src/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64CallLowering.cpp | 150 auto FIReg = MIRBuilder.buildFrameIndex(p0, FI); in getStackAddress() local
152 return FIReg.getReg(0); in getStackAddress()
|
| /dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64CallLowering.cpp | 150 auto FIReg = MIRBuilder.buildFrameIndex(p0, FI); in getStackAddress() local
152 return FIReg.getReg(0); in getStackAddress()
|
| /dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/lib/Target/AMDGPU/ |
| H A D | SIRegisterInfo.cpp | 453 Register FIReg = MRI.createVirtualRegister( in materializeFrameBaseRegister() local
459 BuildMI(*MBB, Ins, DL, TII->get(MovOpc), FIReg) in materializeFrameBaseRegister()
465 .addReg(FIReg); in materializeFrameBaseRegister()
471 .addReg(FIReg) in materializeFrameBaseRegister()
|
| /dports/devel/llvm12/llvm-project-12.0.1.src/llvm/lib/Target/AMDGPU/ |
| H A D | SIRegisterInfo.cpp | 450 Register FIReg = MRI.createVirtualRegister( in materializeFrameBaseRegister() local
456 BuildMI(*MBB, Ins, DL, TII->get(MovOpc), FIReg) in materializeFrameBaseRegister()
462 .addReg(FIReg); in materializeFrameBaseRegister()
468 .addReg(FIReg) in materializeFrameBaseRegister()
|
| /dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/lib/Target/AMDGPU/ |
| H A D | SIRegisterInfo.cpp | 450 Register FIReg = MRI.createVirtualRegister( in materializeFrameBaseRegister() local
456 BuildMI(*MBB, Ins, DL, TII->get(MovOpc), FIReg) in materializeFrameBaseRegister()
462 .addReg(FIReg); in materializeFrameBaseRegister()
468 .addReg(FIReg) in materializeFrameBaseRegister()
|
| /dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64CallLowering.cpp | 150 auto FIReg = MIRBuilder.buildFrameIndex(p0, FI); in getStackAddress() local
152 return FIReg.getReg(0); in getStackAddress()
|
| /dports/devel/llvm11/llvm-11.0.1.src/lib/Target/AArch64/GISel/ |
| H A D | AArch64CallLowering.cpp | 154 auto FIReg = MIRBuilder.buildFrameIndex(p0, FI); in getStackAddress() local
156 return FIReg.getReg(0); in getStackAddress()
|
| /dports/devel/llvm80/llvm-8.0.1.src/lib/Target/AMDGPU/ |
| H A D | SIRegisterInfo.cpp | 326 unsigned FIReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);
330 BuildMI(*MBB, Ins, DL, TII->get(AMDGPU::V_MOV_B32_e32), FIReg)
335 .addReg(FIReg); in getSrcMods()
|
| /dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64CallLowering.cpp | 245 auto FIReg = MIRBuilder.buildFrameIndex(p0, FI); in getStackAddress() local
247 return FIReg.getReg(0); in getStackAddress()
|
| /dports/graphics/llvm-mesa/llvm-13.0.1.src/lib/Target/AArch64/GISel/ |
| H A D | AArch64CallLowering.cpp | 245 auto FIReg = MIRBuilder.buildFrameIndex(p0, FI); in getStackAddress() local
247 return FIReg.getReg(0); in getStackAddress()
|
| /dports/lang/rust/rustc-1.58.1-src/src/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64CallLowering.cpp | 245 auto FIReg = MIRBuilder.buildFrameIndex(p0, FI); in getStackAddress() local
247 return FIReg.getReg(0); in getStackAddress()
|
| /dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64CallLowering.cpp | 256 auto FIReg = MIRBuilder.buildFrameIndex(p0, FI); in getStackAddress() local
258 return FIReg.getReg(0); in getStackAddress()
|
| /dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64CallLowering.cpp | 245 auto FIReg = MIRBuilder.buildFrameIndex(p0, FI); in getStackAddress() local
247 return FIReg.getReg(0); in getStackAddress()
|
| /dports/devel/llvm13/llvm-project-13.0.1.src/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64CallLowering.cpp | 245 auto FIReg = MIRBuilder.buildFrameIndex(p0, FI); in getStackAddress() local
247 return FIReg.getReg(0); in getStackAddress()
|
| /dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIRegisterInfo.cpp | 364 Register FIReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass); in materializeFrameBaseRegister() local
368 BuildMI(*MBB, Ins, DL, TII->get(AMDGPU::V_MOV_B32_e32), FIReg) in materializeFrameBaseRegister()
373 .addReg(FIReg) in materializeFrameBaseRegister()
|
| /dports/devel/llvm10/llvm-10.0.1.src/lib/Target/AMDGPU/ |
| H A D | SIRegisterInfo.cpp | 364 Register FIReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass); in materializeFrameBaseRegister() local
368 BuildMI(*MBB, Ins, DL, TII->get(AMDGPU::V_MOV_B32_e32), FIReg) in materializeFrameBaseRegister()
373 .addReg(FIReg) in materializeFrameBaseRegister()
|
| /dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| H A D | SIRegisterInfo.cpp | 364 Register FIReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass); in materializeFrameBaseRegister() local
368 BuildMI(*MBB, Ins, DL, TII->get(AMDGPU::V_MOV_B32_e32), FIReg) in materializeFrameBaseRegister()
373 .addReg(FIReg) in materializeFrameBaseRegister()
|
| /dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/lib/Target/AMDGPU/ |
| H A D | SIRegisterInfo.cpp | 707 Register FIReg = MRI.createVirtualRegister( in materializeFrameBaseRegister() local
713 BuildMI(*MBB, Ins, DL, TII->get(MovOpc), FIReg) in materializeFrameBaseRegister()
719 .addReg(FIReg); in materializeFrameBaseRegister()
725 .addReg(FIReg) in materializeFrameBaseRegister()
|
| /dports/graphics/llvm-mesa/llvm-13.0.1.src/lib/Target/AMDGPU/ |
| H A D | SIRegisterInfo.cpp | 707 Register FIReg = MRI.createVirtualRegister( in materializeFrameBaseRegister() local
713 BuildMI(*MBB, Ins, DL, TII->get(MovOpc), FIReg) in materializeFrameBaseRegister()
719 .addReg(FIReg); in materializeFrameBaseRegister()
725 .addReg(FIReg) in materializeFrameBaseRegister()
|
| /dports/lang/rust/rustc-1.58.1-src/src/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIRegisterInfo.cpp | 707 Register FIReg = MRI.createVirtualRegister( in materializeFrameBaseRegister() local
713 BuildMI(*MBB, Ins, DL, TII->get(MovOpc), FIReg) in materializeFrameBaseRegister()
719 .addReg(FIReg); in materializeFrameBaseRegister()
725 .addReg(FIReg) in materializeFrameBaseRegister()
|