/dports/graphics/R-cran-pROC/pROC/R/ |
H A D | obuchowski.R | 55 f.partial <- function(A, B, FPR1, FPR2) { argument 56 cdagger1 <- cdagger(A, B, FPR1) 70 g.partial <- function(A, B, FPR1, FPR2) { argument 71 cdagger1 <- cdagger(A, B, FPR1) 91 FPR1 <- 1 - attr(roc$auc, "partial.auc")[2] functionVar 93 va <- var.params.obuchowski(A, B, kappa, FPR1, FPR2) 106 var.params.obuchowski <- function(A, B, kappa, FPR1, FPR2) { argument 107 if (!missing(FPR1) && !is.null(FPR1) && !missing(FPR1) && !is.null(FPR2)) { 108 …f.partial(A, B, FPR1, FPR2)^2 * (1 + B^2 / kappa + A^2/2) + g.partial(A, B, FPR1, FPR2)^2 * B^2 * … 149 FPR1 <- attr(roc1$auc, "partial.auc")[2] functionVar [all …]
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/dports/emulators/pcsxr/pcsxr-codeplex-final/pcsxr/libpcsxcore/ppc/ |
H A D | ppc_mnemonics.h | 442 #define FDIVS(FPR_DST, FPR1, FPR2) \ argument 443 {INSTR = (0xEC000024 | (FPR_DST << 21) | (FPR1 << 16) | (FPR2 << 11));} 445 #define FDIV(FPR_DST, FPR1, FPR2) \ argument 446 {INSTR = (0xFC000024 | (FPR_DST << 21) | (FPR1 << 16) | (FPR2 << 11));} 448 #define FMULS(FPR_DST, FPR1, FPR2) \ argument 449 {INSTR = (0xEC000032 | (FPR_DST << 21) | (FPR1 << 16) | (FPR2 << 11));} 451 #define FMUL(FPR_DST, FPR1, FPR2) \ argument 452 {INSTR = (0xFC000032 | (FPR_DST << 21) | (FPR1 << 16) | (FPR2 << 11));} 454 #define FADDS(FPR_DST, FPR1, FPR2) \ argument 455 {INSTR = (0xEC00002A | (FPR_DST << 21) | (FPR1 << 16) | (FPR2 << 11));} [all …]
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/dports/devel/llvm90/llvm-9.0.1.src/test/CodeGen/PowerPC/ |
H A D | ppc64-align-long-double.ll | 8 ; in the parameter save area and loaded from there for return in FPR1/2.
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/dports/devel/llvm80/llvm-8.0.1.src/test/CodeGen/PowerPC/ |
H A D | ppc64-align-long-double.ll | 8 ; in the parameter save area and loaded from there for return in FPR1/2.
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/dports/devel/llvm70/llvm-7.0.1.src/test/CodeGen/PowerPC/ |
H A D | ppc64-align-long-double.ll | 8 ; in the parameter save area and loaded from there for return in FPR1/2.
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/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/test/CodeGen/PowerPC/ |
H A D | ppc64-align-long-double.ll | 9 ; in the parameter save area and loaded from there for return in FPR1/2.
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/dports/devel/llvm10/llvm-10.0.1.src/test/CodeGen/PowerPC/ |
H A D | ppc64-align-long-double.ll | 9 ; in the parameter save area and loaded from there for return in FPR1/2.
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/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/CodeGen/PowerPC/ |
H A D | ppc64-align-long-double.ll | 9 ; in the parameter save area and loaded from there for return in FPR1/2.
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/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/test/CodeGen/PowerPC/ |
H A D | ppc64-align-long-double.ll | 9 ; in the parameter save area and loaded from there for return in FPR1/2.
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/dports/graphics/llvm-mesa/llvm-13.0.1.src/test/CodeGen/PowerPC/ |
H A D | ppc64-align-long-double.ll | 9 ; in the parameter save area and loaded from there for return in FPR1/2.
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/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/test/CodeGen/PowerPC/ |
H A D | ppc64-align-long-double.ll | 9 ; in the parameter save area and loaded from there for return in FPR1/2.
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/dports/devel/llvm11/llvm-11.0.1.src/test/CodeGen/PowerPC/ |
H A D | ppc64-align-long-double.ll | 9 ; in the parameter save area and loaded from there for return in FPR1/2.
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/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/test/CodeGen/PowerPC/ |
H A D | ppc64-align-long-double.ll | 9 ; in the parameter save area and loaded from there for return in FPR1/2.
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/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/test/CodeGen/PowerPC/ |
H A D | ppc64-align-long-double.ll | 9 ; in the parameter save area and loaded from there for return in FPR1/2.
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/dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/test/CodeGen/PowerPC/ |
H A D | ppc64-align-long-double.ll | 9 ; in the parameter save area and loaded from there for return in FPR1/2.
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/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/test/CodeGen/PowerPC/ |
H A D | ppc64-align-long-double.ll | 9 ; in the parameter save area and loaded from there for return in FPR1/2.
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/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/test/CodeGen/PowerPC/ |
H A D | ppc64-align-long-double.ll | 9 ; in the parameter save area and loaded from there for return in FPR1/2.
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/dports/devel/zpu-gcc/zpu-toolchain-1.0/toolchain/gcc/libgloss/hp74x/ |
H A D | pa_stub.c | 156 enum fregnames {FPR0, FPR1, FPR2, FPR3, FPR4, FPR5, FPR6, FPR7, enumerator
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/dports/devel/arm-none-eabi-newlib/newlib-2.4.0/libgloss/hp74x/ |
H A D | pa_stub.c | 156 enum fregnames {FPR0, FPR1, FPR2, FPR3, FPR4, FPR5, FPR6, FPR7, enumerator
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/dports/devel/zpu-binutils/zpu-toolchain-1.0/toolchain/gcc/libgloss/hp74x/ |
H A D | pa_stub.c | 156 enum fregnames {FPR0, FPR1, FPR2, FPR3, FPR4, FPR5, FPR6, FPR7, enumerator
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/dports/biology/biosig/biosig-2.3.3/biosig4matlab/t490_EvaluationCriteria/ |
H A D | criteria4asyncbci.m | 197 %### OPEN QUESTION: use of FPR1 or FPR2
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/dports/java/openjdk8/jdk8u-jdk8u312-b07.1/hotspot/src/cpu/x86/vm/ |
H A D | x86_32.ad | 81 // Ok so here's the trick FPR1 is really st(0) except in the midst 83 // is pushed making FPR1 == st(1) temporarily. However at any safepoint 84 // the stack will not have this element so FPR1 == st(0) from the 2237 // If src is FPR1, we can just FST to store it. 2238 // Else we need to FLD it to FPR1, then FSTP to store/pop it. 2481 // swap src with FPR1: 2482 // FXCH FPR1 with src 2551 // FXCH FPR1 with src 3987 format %{ "FPR1" %} 4022 format %{ "FPR1" %}
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/dports/java/openjdk8-jre/jdk8u-jdk8u312-b07.1/hotspot/src/cpu/x86/vm/ |
H A D | x86_32.ad | 81 // Ok so here's the trick FPR1 is really st(0) except in the midst 83 // is pushed making FPR1 == st(1) temporarily. However at any safepoint 84 // the stack will not have this element so FPR1 == st(0) from the 2237 // If src is FPR1, we can just FST to store it. 2238 // Else we need to FLD it to FPR1, then FSTP to store/pop it. 2481 // swap src with FPR1: 2482 // FXCH FPR1 with src 2551 // FXCH FPR1 with src 3987 format %{ "FPR1" %} 4022 format %{ "FPR1" %}
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/dports/java/openjdk11/jdk11u-jdk-11.0.13-8-1/src/hotspot/cpu/x86/ |
H A D | x86_32.ad | 81 // Ok so here's the trick FPR1 is really st(0) except in the midst 83 // is pushed making FPR1 == st(1) temporarily. However at any safepoint 84 // the stack will not have this element so FPR1 == st(0) from the 2306 // If src is FPR1, we can just FST to store it. 2307 // Else we need to FLD it to FPR1, then FSTP to store/pop it. 2550 // swap src with FPR1: 2551 // FXCH FPR1 with src 2620 // FXCH FPR1 with src 4056 format %{ "FPR1" %} 4091 format %{ "FPR1" %}
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/dports/java/openjdk13/jdk13u-jdk-13.0.10-1-1/src/hotspot/cpu/x86/ |
H A D | x86_32.ad | 81 // Ok so here's the trick FPR1 is really st(0) except in the midst 83 // is pushed making FPR1 == st(1) temporarily. However at any safepoint 84 // the stack will not have this element so FPR1 == st(0) from the 2301 // If src is FPR1, we can just FST to store it. 2302 // Else we need to FLD it to FPR1, then FSTP to store/pop it. 2545 // swap src with FPR1: 2546 // FXCH FPR1 with src 2615 // FXCH FPR1 with src 4051 format %{ "FPR1" %} 4086 format %{ "FPR1" %}
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