/dports/www/firefox-esr/firefox-91.8.0/js/src/jit/arm64/vixl/ |
H A D | Simulator-vixl.cpp | 1896 case FCVTAS_ws: set_wreg(dst, FPToInt32(sreg(src), FPTieAway)); break; in VisitFPIntegerConvert() 1898 case FCVTAS_wd: set_wreg(dst, FPToInt32(dreg(src), FPTieAway)); break; in VisitFPIntegerConvert() 1905 set_wreg(dst, FPToInt32(sreg(src), FPNegativeInfinity)); in VisitFPIntegerConvert() 1911 set_wreg(dst, FPToInt32(dreg(src), FPNegativeInfinity)); in VisitFPIntegerConvert() 1929 set_wreg(dst, FPToInt32(sreg(src), FPPositiveInfinity)); in VisitFPIntegerConvert() 1935 set_wreg(dst, FPToInt32(dreg(src), FPPositiveInfinity)); in VisitFPIntegerConvert() 1952 case FCVTNS_ws: set_wreg(dst, FPToInt32(sreg(src), FPTieEven)); break; in VisitFPIntegerConvert() 1954 case FCVTNS_wd: set_wreg(dst, FPToInt32(dreg(src), FPTieEven)); break; in VisitFPIntegerConvert() 1960 case FCVTZS_ws: set_wreg(dst, FPToInt32(sreg(src), FPZero)); break; in VisitFPIntegerConvert() 1962 case FCVTZS_wd: set_wreg(dst, FPToInt32(dreg(src), FPZero)); break; in VisitFPIntegerConvert() [all …]
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H A D | Simulator-vixl.h | 2292 int32_t FPToInt32(double value, FPRounding rmode);
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H A D | Logic-vixl.cpp | 3657 int32_t Simulator::FPToInt32(double value, FPRounding rmode) { in FPToInt32() function in vixl::Simulator 4237 dst.SetInt(vform, i, FPToInt32(op, rounding_mode)); in fcvts()
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/dports/www/firefox/firefox-99.0/js/src/jit/arm64/vixl/ |
H A D | Simulator-vixl.cpp | 1896 case FCVTAS_ws: set_wreg(dst, FPToInt32(sreg(src), FPTieAway)); break; in VisitFPIntegerConvert() 1898 case FCVTAS_wd: set_wreg(dst, FPToInt32(dreg(src), FPTieAway)); break; in VisitFPIntegerConvert() 1905 set_wreg(dst, FPToInt32(sreg(src), FPNegativeInfinity)); in VisitFPIntegerConvert() 1911 set_wreg(dst, FPToInt32(dreg(src), FPNegativeInfinity)); in VisitFPIntegerConvert() 1929 set_wreg(dst, FPToInt32(sreg(src), FPPositiveInfinity)); in VisitFPIntegerConvert() 1935 set_wreg(dst, FPToInt32(dreg(src), FPPositiveInfinity)); in VisitFPIntegerConvert() 1952 case FCVTNS_ws: set_wreg(dst, FPToInt32(sreg(src), FPTieEven)); break; in VisitFPIntegerConvert() 1954 case FCVTNS_wd: set_wreg(dst, FPToInt32(dreg(src), FPTieEven)); break; in VisitFPIntegerConvert() 1960 case FCVTZS_ws: set_wreg(dst, FPToInt32(sreg(src), FPZero)); break; in VisitFPIntegerConvert() 1962 case FCVTZS_wd: set_wreg(dst, FPToInt32(dreg(src), FPZero)); break; in VisitFPIntegerConvert() [all …]
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H A D | Simulator-vixl.h | 2292 int32_t FPToInt32(double value, FPRounding rmode);
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H A D | Logic-vixl.cpp | 3657 int32_t Simulator::FPToInt32(double value, FPRounding rmode) { in FPToInt32() function in vixl::Simulator 4237 dst.SetInt(vform, i, FPToInt32(op, rounding_mode)); in fcvts()
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/dports/mail/thunderbird/thunderbird-91.8.0/js/src/jit/arm64/vixl/ |
H A D | Simulator-vixl.cpp | 1896 case FCVTAS_ws: set_wreg(dst, FPToInt32(sreg(src), FPTieAway)); break; in VisitFPIntegerConvert() 1898 case FCVTAS_wd: set_wreg(dst, FPToInt32(dreg(src), FPTieAway)); break; in VisitFPIntegerConvert() 1905 set_wreg(dst, FPToInt32(sreg(src), FPNegativeInfinity)); in VisitFPIntegerConvert() 1911 set_wreg(dst, FPToInt32(dreg(src), FPNegativeInfinity)); in VisitFPIntegerConvert() 1929 set_wreg(dst, FPToInt32(sreg(src), FPPositiveInfinity)); in VisitFPIntegerConvert() 1935 set_wreg(dst, FPToInt32(dreg(src), FPPositiveInfinity)); in VisitFPIntegerConvert() 1952 case FCVTNS_ws: set_wreg(dst, FPToInt32(sreg(src), FPTieEven)); break; in VisitFPIntegerConvert() 1954 case FCVTNS_wd: set_wreg(dst, FPToInt32(dreg(src), FPTieEven)); break; in VisitFPIntegerConvert() 1960 case FCVTZS_ws: set_wreg(dst, FPToInt32(sreg(src), FPZero)); break; in VisitFPIntegerConvert() 1962 case FCVTZS_wd: set_wreg(dst, FPToInt32(dreg(src), FPZero)); break; in VisitFPIntegerConvert() [all …]
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H A D | Simulator-vixl.h | 2292 int32_t FPToInt32(double value, FPRounding rmode);
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H A D | Logic-vixl.cpp | 3657 int32_t Simulator::FPToInt32(double value, FPRounding rmode) { in FPToInt32() function in vixl::Simulator 4237 dst.SetInt(vform, i, FPToInt32(op, rounding_mode)); in fcvts()
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/dports/www/firefox-legacy/firefox-52.8.0esr/js/src/jit/arm64/vixl/ |
H A D | Simulator-vixl.cpp | 1859 case FCVTAS_ws: set_wreg(dst, FPToInt32(sreg(src), FPTieAway)); break; 1861 case FCVTAS_wd: set_wreg(dst, FPToInt32(dreg(src), FPTieAway)); break; 1868 set_wreg(dst, FPToInt32(sreg(src), FPNegativeInfinity)); 1874 set_wreg(dst, FPToInt32(dreg(src), FPNegativeInfinity)); 1892 set_wreg(dst, FPToInt32(sreg(src), FPPositiveInfinity)); 1898 set_wreg(dst, FPToInt32(dreg(src), FPPositiveInfinity)); 1915 case FCVTNS_ws: set_wreg(dst, FPToInt32(sreg(src), FPTieEven)); break; 1917 case FCVTNS_wd: set_wreg(dst, FPToInt32(dreg(src), FPTieEven)); break; 1923 case FCVTZS_ws: set_wreg(dst, FPToInt32(sreg(src), FPZero)); break; 1925 case FCVTZS_wd: set_wreg(dst, FPToInt32(dreg(src), FPZero)); break; [all …]
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H A D | Simulator-vixl.h | 2469 int32_t FPToInt32(double value, FPRounding rmode);
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H A D | Logic-vixl.cpp | 3820 int32_t Simulator::FPToInt32(double value, FPRounding rmode) { in FPToInt32() function in vixl::Simulator 4396 dst.SetInt(vform, i, FPToInt32(op, rounding_mode)); in fcvts()
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/dports/lang/spidermonkey60/firefox-60.9.0/js/src/jit/arm64/vixl/ |
H A D | Simulator-vixl.cpp | 1890 case FCVTAS_ws: set_wreg(dst, FPToInt32(sreg(src), FPTieAway)); break; in VisitFPIntegerConvert() 1892 case FCVTAS_wd: set_wreg(dst, FPToInt32(dreg(src), FPTieAway)); break; in VisitFPIntegerConvert() 1899 set_wreg(dst, FPToInt32(sreg(src), FPNegativeInfinity)); in VisitFPIntegerConvert() 1905 set_wreg(dst, FPToInt32(dreg(src), FPNegativeInfinity)); in VisitFPIntegerConvert() 1923 set_wreg(dst, FPToInt32(sreg(src), FPPositiveInfinity)); in VisitFPIntegerConvert() 1929 set_wreg(dst, FPToInt32(dreg(src), FPPositiveInfinity)); in VisitFPIntegerConvert() 1946 case FCVTNS_ws: set_wreg(dst, FPToInt32(sreg(src), FPTieEven)); break; in VisitFPIntegerConvert() 1948 case FCVTNS_wd: set_wreg(dst, FPToInt32(dreg(src), FPTieEven)); break; in VisitFPIntegerConvert() 1954 case FCVTZS_ws: set_wreg(dst, FPToInt32(sreg(src), FPZero)); break; in VisitFPIntegerConvert() 1956 case FCVTZS_wd: set_wreg(dst, FPToInt32(dreg(src), FPZero)); break; in VisitFPIntegerConvert() [all …]
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H A D | Logic-vixl.cpp | 3820 int32_t Simulator::FPToInt32(double value, FPRounding rmode) { in FPToInt32() function in vixl::Simulator 4396 dst.SetInt(vform, i, FPToInt32(op, rounding_mode)); in fcvts()
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/dports/lang/spidermonkey78/firefox-78.9.0/js/src/jit/arm64/vixl/ |
H A D | Simulator-vixl.cpp | 1896 case FCVTAS_ws: set_wreg(dst, FPToInt32(sreg(src), FPTieAway)); break; in VisitFPIntegerConvert() 1898 case FCVTAS_wd: set_wreg(dst, FPToInt32(dreg(src), FPTieAway)); break; in VisitFPIntegerConvert() 1905 set_wreg(dst, FPToInt32(sreg(src), FPNegativeInfinity)); in VisitFPIntegerConvert() 1911 set_wreg(dst, FPToInt32(dreg(src), FPNegativeInfinity)); in VisitFPIntegerConvert() 1929 set_wreg(dst, FPToInt32(sreg(src), FPPositiveInfinity)); in VisitFPIntegerConvert() 1935 set_wreg(dst, FPToInt32(dreg(src), FPPositiveInfinity)); in VisitFPIntegerConvert() 1952 case FCVTNS_ws: set_wreg(dst, FPToInt32(sreg(src), FPTieEven)); break; in VisitFPIntegerConvert() 1954 case FCVTNS_wd: set_wreg(dst, FPToInt32(dreg(src), FPTieEven)); break; in VisitFPIntegerConvert() 1960 case FCVTZS_ws: set_wreg(dst, FPToInt32(sreg(src), FPZero)); break; in VisitFPIntegerConvert() 1962 case FCVTZS_wd: set_wreg(dst, FPToInt32(dreg(src), FPZero)); break; in VisitFPIntegerConvert() [all …]
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H A D | Simulator-vixl.h | 2291 int32_t FPToInt32(double value, FPRounding rmode);
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/dports/databases/mongodb36/mongodb-src-r3.6.23/src/third_party/mozjs-45/extract/js/src/jit/arm64/vixl/ |
H A D | Simulator-vixl.cpp | 1876 case FCVTAS_ws: set_wreg(dst, FPToInt32(sreg(src), FPTieAway)); break; in VisitFPIntegerConvert() 1878 case FCVTAS_wd: set_wreg(dst, FPToInt32(dreg(src), FPTieAway)); break; in VisitFPIntegerConvert() 1885 set_wreg(dst, FPToInt32(sreg(src), FPNegativeInfinity)); in VisitFPIntegerConvert() 1891 set_wreg(dst, FPToInt32(dreg(src), FPNegativeInfinity)); in VisitFPIntegerConvert() 1909 set_wreg(dst, FPToInt32(sreg(src), FPPositiveInfinity)); in VisitFPIntegerConvert() 1915 set_wreg(dst, FPToInt32(dreg(src), FPPositiveInfinity)); in VisitFPIntegerConvert() 1932 case FCVTNS_ws: set_wreg(dst, FPToInt32(sreg(src), FPTieEven)); break; in VisitFPIntegerConvert() 1934 case FCVTNS_wd: set_wreg(dst, FPToInt32(dreg(src), FPTieEven)); break; in VisitFPIntegerConvert() 1940 case FCVTZS_ws: set_wreg(dst, FPToInt32(sreg(src), FPZero)); break; in VisitFPIntegerConvert() 1942 case FCVTZS_wd: set_wreg(dst, FPToInt32(dreg(src), FPZero)); break; in VisitFPIntegerConvert() [all …]
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/dports/lang/v8/v8-9.6.180.12/src/execution/arm64/ |
H A D | simulator-arm64.cc | 2702 set_wreg(dst, FPToInt32(sreg(src), FPTieAway)); in VisitFPIntegerConvert() 2708 set_wreg(dst, FPToInt32(dreg(src), FPTieAway)); in VisitFPIntegerConvert() 2726 set_wreg(dst, FPToInt32(sreg(src), FPNegativeInfinity)); in VisitFPIntegerConvert() 2732 set_wreg(dst, FPToInt32(dreg(src), FPNegativeInfinity)); in VisitFPIntegerConvert() 2750 set_wreg(dst, FPToInt32(sreg(src), FPTieEven)); in VisitFPIntegerConvert() 2756 set_wreg(dst, FPToInt32(dreg(src), FPTieEven)); in VisitFPIntegerConvert() 2774 set_wreg(dst, FPToInt32(sreg(src), FPZero)); in VisitFPIntegerConvert() 2780 set_wreg(dst, FPToInt32(dreg(src), FPZero)); in VisitFPIntegerConvert()
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H A D | simulator-logic-arm64.cc | 3220 int32_t Simulator::FPToInt32(double value, FPRounding rmode) { in FPToInt32() function in v8::internal::Simulator 3765 dst.SetInt(vform, i, FPToInt32(op, rounding_mode)); in fcvts()
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/dports/www/qt5-webengine/qtwebengine-everywhere-src-5.15.2/src/3rdparty/chromium/v8/src/execution/arm64/ |
H A D | simulator-arm64.cc | 2664 set_wreg(dst, FPToInt32(sreg(src), FPTieAway)); in VisitFPIntegerConvert() 2670 set_wreg(dst, FPToInt32(dreg(src), FPTieAway)); in VisitFPIntegerConvert() 2688 set_wreg(dst, FPToInt32(sreg(src), FPNegativeInfinity)); in VisitFPIntegerConvert() 2694 set_wreg(dst, FPToInt32(dreg(src), FPNegativeInfinity)); in VisitFPIntegerConvert() 2712 set_wreg(dst, FPToInt32(sreg(src), FPTieEven)); in VisitFPIntegerConvert() 2718 set_wreg(dst, FPToInt32(dreg(src), FPTieEven)); in VisitFPIntegerConvert() 2736 set_wreg(dst, FPToInt32(sreg(src), FPZero)); in VisitFPIntegerConvert() 2742 set_wreg(dst, FPToInt32(dreg(src), FPZero)); in VisitFPIntegerConvert()
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H A D | simulator-logic-arm64.cc | 3220 int32_t Simulator::FPToInt32(double value, FPRounding rmode) { in FPToInt32() function in v8::internal::Simulator 3726 dst.SetInt(vform, i, FPToInt32(op, rounding_mode)); in fcvts()
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/dports/www/chromium-legacy/chromium-88.0.4324.182/v8/src/execution/arm64/ |
H A D | simulator-arm64.cc | 2664 set_wreg(dst, FPToInt32(sreg(src), FPTieAway)); in VisitFPIntegerConvert() 2670 set_wreg(dst, FPToInt32(dreg(src), FPTieAway)); in VisitFPIntegerConvert() 2688 set_wreg(dst, FPToInt32(sreg(src), FPNegativeInfinity)); in VisitFPIntegerConvert() 2694 set_wreg(dst, FPToInt32(dreg(src), FPNegativeInfinity)); in VisitFPIntegerConvert() 2712 set_wreg(dst, FPToInt32(sreg(src), FPTieEven)); in VisitFPIntegerConvert() 2718 set_wreg(dst, FPToInt32(dreg(src), FPTieEven)); in VisitFPIntegerConvert() 2736 set_wreg(dst, FPToInt32(sreg(src), FPZero)); in VisitFPIntegerConvert() 2742 set_wreg(dst, FPToInt32(dreg(src), FPZero)); in VisitFPIntegerConvert()
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H A D | simulator-logic-arm64.cc | 3220 int32_t Simulator::FPToInt32(double value, FPRounding rmode) { in FPToInt32() function in v8::internal::Simulator 3785 dst.SetInt(vform, i, FPToInt32(op, rounding_mode)); in fcvts()
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/dports/www/node10/node-v10.24.1/deps/v8/src/arm64/ |
H A D | simulator-arm64.cc | 2544 case FCVTAS_ws: set_wreg(dst, FPToInt32(sreg(src), FPTieAway)); break; in VisitFPIntegerConvert() 2546 case FCVTAS_wd: set_wreg(dst, FPToInt32(dreg(src), FPTieAway)); break; in VisitFPIntegerConvert() 2553 set_wreg(dst, FPToInt32(sreg(src), FPNegativeInfinity)); in VisitFPIntegerConvert() 2559 set_wreg(dst, FPToInt32(dreg(src), FPNegativeInfinity)); in VisitFPIntegerConvert() 2576 case FCVTNS_ws: set_wreg(dst, FPToInt32(sreg(src), FPTieEven)); break; in VisitFPIntegerConvert() 2578 case FCVTNS_wd: set_wreg(dst, FPToInt32(dreg(src), FPTieEven)); break; in VisitFPIntegerConvert() 2584 case FCVTZS_ws: set_wreg(dst, FPToInt32(sreg(src), FPZero)); break; in VisitFPIntegerConvert() 2586 case FCVTZS_wd: set_wreg(dst, FPToInt32(dreg(src), FPZero)); break; in VisitFPIntegerConvert()
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H A D | simulator-logic-arm64.cc | 3219 int32_t Simulator::FPToInt32(double value, FPRounding rmode) { in FPToInt32() function in v8::internal::Simulator 3725 dst.SetInt(vform, i, FPToInt32(op, rounding_mode)); in fcvts()
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