/dports/devel/llvm70/llvm-7.0.1.src/utils/TableGen/ |
H A D | DAGISelMatcherGen.cpp | 110 void InferPossibleTypes(unsigned ForceMode); 114 unsigned ForceMode); 118 unsigned ForceMode); 167 InferPossibleTypes(Pattern.ForceMode); in MatcherGen() 174 void MatcherGen::InferPossibleTypes(unsigned ForceMode) { in InferPossibleTypes() argument 179 TP.getInfer().ForceMode = ForceMode; in InferPossibleTypes() 287 unsigned ForceMode) { in EmitOperatorMatchCode() argument 463 unsigned ForceMode) { in EmitMatchCode() argument 472 InferPossibleTypes(ForceMode); in EmitMatchCode() 485 EmitOperatorMatchCode(N, NodeNoTypes, ForceMode); in EmitMatchCode() [all …]
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H A D | CodeGenDAGPatterns.h | 251 TypeInfer(TreePattern &T) : TP(T), ForceMode(0) {} in TypeInfer() 348 unsigned ForceMode; // Mode to use when set. member 1027 AddedComplexity(complexity), ID(uid), ForceMode(setmode) {} in SrcRecord() 1037 unsigned ForceMode; // Force this mode in type inference when set. variable
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/dports/devel/llvm80/llvm-8.0.1.src/utils/TableGen/ |
H A D | DAGISelMatcherGen.cpp | 110 void InferPossibleTypes(unsigned ForceMode); 114 unsigned ForceMode); 118 unsigned ForceMode); 167 InferPossibleTypes(Pattern.ForceMode); in MatcherGen() 174 void MatcherGen::InferPossibleTypes(unsigned ForceMode) { in InferPossibleTypes() argument 179 TP.getInfer().ForceMode = ForceMode; in InferPossibleTypes() 287 unsigned ForceMode) { in EmitOperatorMatchCode() argument 481 unsigned ForceMode) { in EmitMatchCode() argument 490 InferPossibleTypes(ForceMode); in EmitMatchCode() 512 EmitOperatorMatchCode(N, NodeNoTypes, ForceMode); in EmitMatchCode() [all …]
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/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/utils/TableGen/ |
H A D | DAGISelMatcherGen.cpp | 109 void InferPossibleTypes(unsigned ForceMode); 113 unsigned ForceMode); 117 unsigned ForceMode); 166 InferPossibleTypes(Pattern.ForceMode); in MatcherGen() 173 void MatcherGen::InferPossibleTypes(unsigned ForceMode) { in InferPossibleTypes() argument 178 TP.getInfer().ForceMode = ForceMode; in InferPossibleTypes() 307 unsigned ForceMode) { in EmitOperatorMatchCode() argument 501 unsigned ForceMode) { in EmitMatchCode() argument 510 InferPossibleTypes(ForceMode); in EmitMatchCode() 532 EmitOperatorMatchCode(N, NodeNoTypes, ForceMode); in EmitMatchCode() [all …]
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H A D | CodeGenDAGPatterns.h | 264 TypeInfer(TreePattern &T) : TP(T), ForceMode(0) {} in TypeInfer() 361 unsigned ForceMode; // Mode to use when set. member 1117 AddedComplexity(complexity), ID(uid), ForceMode(setmode) {} in SrcRecord() 1127 unsigned ForceMode; // Force this mode in type inference when set. variable
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/dports/devel/llvm11/llvm-11.0.1.src/utils/TableGen/ |
H A D | DAGISelMatcherGen.cpp | 109 void InferPossibleTypes(unsigned ForceMode); 113 unsigned ForceMode); 117 unsigned ForceMode); 166 InferPossibleTypes(Pattern.ForceMode); in MatcherGen() 173 void MatcherGen::InferPossibleTypes(unsigned ForceMode) { in InferPossibleTypes() argument 178 TP.getInfer().ForceMode = ForceMode; in InferPossibleTypes() 307 unsigned ForceMode) { in EmitOperatorMatchCode() argument 501 unsigned ForceMode) { in EmitMatchCode() argument 510 InferPossibleTypes(ForceMode); in EmitMatchCode() 532 EmitOperatorMatchCode(N, NodeNoTypes, ForceMode); in EmitMatchCode() [all …]
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/dports/devel/llvm90/llvm-9.0.1.src/utils/TableGen/ |
H A D | DAGISelMatcherGen.cpp | 109 void InferPossibleTypes(unsigned ForceMode); 113 unsigned ForceMode); 117 unsigned ForceMode); 166 InferPossibleTypes(Pattern.ForceMode); in MatcherGen() 173 void MatcherGen::InferPossibleTypes(unsigned ForceMode) { in InferPossibleTypes() argument 178 TP.getInfer().ForceMode = ForceMode; in InferPossibleTypes() 307 unsigned ForceMode) { in EmitOperatorMatchCode() argument 501 unsigned ForceMode) { in EmitMatchCode() argument 510 InferPossibleTypes(ForceMode); in EmitMatchCode() 532 EmitOperatorMatchCode(N, NodeNoTypes, ForceMode); in EmitMatchCode() [all …]
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/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/utils/TableGen/ |
H A D | DAGISelMatcherGen.cpp | 109 void InferPossibleTypes(unsigned ForceMode); 113 unsigned ForceMode); 117 unsigned ForceMode); 166 InferPossibleTypes(Pattern.ForceMode); in MatcherGen() 173 void MatcherGen::InferPossibleTypes(unsigned ForceMode) { in InferPossibleTypes() argument 178 TP.getInfer().ForceMode = ForceMode; in InferPossibleTypes() 311 unsigned ForceMode) { in EmitOperatorMatchCode() argument 505 unsigned ForceMode) { in EmitMatchCode() argument 514 InferPossibleTypes(ForceMode); in EmitMatchCode() 536 EmitOperatorMatchCode(N, NodeNoTypes, ForceMode); in EmitMatchCode() [all …]
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/dports/devel/llvm10/llvm-10.0.1.src/utils/TableGen/ |
H A D | DAGISelMatcherGen.cpp | 109 void InferPossibleTypes(unsigned ForceMode); 113 unsigned ForceMode); 117 unsigned ForceMode); 166 InferPossibleTypes(Pattern.ForceMode); in MatcherGen() 173 void MatcherGen::InferPossibleTypes(unsigned ForceMode) { in InferPossibleTypes() argument 178 TP.getInfer().ForceMode = ForceMode; in InferPossibleTypes() 307 unsigned ForceMode) { in EmitOperatorMatchCode() argument 501 unsigned ForceMode) { in EmitMatchCode() argument 510 InferPossibleTypes(ForceMode); in EmitMatchCode() 532 EmitOperatorMatchCode(N, NodeNoTypes, ForceMode); in EmitMatchCode() [all …]
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/dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/utils/TableGen/ |
H A D | DAGISelMatcherGen.cpp | 109 void InferPossibleTypes(unsigned ForceMode); 113 unsigned ForceMode); 117 unsigned ForceMode); 166 InferPossibleTypes(Pattern.ForceMode); in MatcherGen() 173 void MatcherGen::InferPossibleTypes(unsigned ForceMode) { in InferPossibleTypes() argument 178 TP.getInfer().ForceMode = ForceMode; in InferPossibleTypes() 307 unsigned ForceMode) { in EmitOperatorMatchCode() argument 501 unsigned ForceMode) { in EmitMatchCode() argument 510 InferPossibleTypes(ForceMode); in EmitMatchCode() 532 EmitOperatorMatchCode(N, NodeNoTypes, ForceMode); in EmitMatchCode() [all …]
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/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/utils/TableGen/ |
H A D | DAGISelMatcherGen.cpp | 109 void InferPossibleTypes(unsigned ForceMode); 113 unsigned ForceMode); 117 unsigned ForceMode); 166 InferPossibleTypes(Pattern.ForceMode); in MatcherGen() 173 void MatcherGen::InferPossibleTypes(unsigned ForceMode) { in InferPossibleTypes() argument 178 TP.getInfer().ForceMode = ForceMode; in InferPossibleTypes() 311 unsigned ForceMode) { in EmitOperatorMatchCode() argument 505 unsigned ForceMode) { in EmitMatchCode() argument 514 InferPossibleTypes(ForceMode); in EmitMatchCode() 536 EmitOperatorMatchCode(N, NodeNoTypes, ForceMode); in EmitMatchCode() [all …]
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/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/utils/TableGen/ |
H A D | DAGISelMatcherGen.cpp | 109 void InferPossibleTypes(unsigned ForceMode); 113 unsigned ForceMode); 117 unsigned ForceMode); 166 InferPossibleTypes(Pattern.ForceMode); in MatcherGen() 173 void MatcherGen::InferPossibleTypes(unsigned ForceMode) { in InferPossibleTypes() argument 178 TP.getInfer().ForceMode = ForceMode; in InferPossibleTypes() 307 unsigned ForceMode) { in EmitOperatorMatchCode() argument 501 unsigned ForceMode) { in EmitMatchCode() argument 510 InferPossibleTypes(ForceMode); in EmitMatchCode() 532 EmitOperatorMatchCode(N, NodeNoTypes, ForceMode); in EmitMatchCode() [all …]
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/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/utils/TableGen/ |
H A D | DAGISelMatcherGen.cpp | 109 void InferPossibleTypes(unsigned ForceMode); 113 unsigned ForceMode); 117 unsigned ForceMode); 173 void MatcherGen::InferPossibleTypes(unsigned ForceMode) { in InferPossibleTypes() argument 178 TP.getInfer().ForceMode = ForceMode; in InferPossibleTypes() 311 unsigned ForceMode) { in EmitOperatorMatchCode() argument 364 EmitMatchCode(N->getChild(0), NodeNoTypes->getChild(0), ForceMode); in EmitOperatorMatchCode() 463 EmitMatchCode(N->getChild(i), NodeNoTypes->getChild(i), ForceMode); in EmitOperatorMatchCode() 505 unsigned ForceMode) { in EmitMatchCode() argument 514 InferPossibleTypes(ForceMode); in EmitMatchCode() [all …]
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H A D | CodeGenDAGPatterns.h | 260 TypeInfer(TreePattern &T) : TP(T), ForceMode(0) {} in TypeInfer() 360 unsigned ForceMode; // Mode to use when set. member 1064 unsigned ForceMode; // Force this mode in type inference when set. variable 1074 ID(uid), ForceMode(setmode) {} in SrcRecord() 1086 unsigned getForceMode() const { return ForceMode; } in getForceMode()
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/dports/lang/rust/rustc-1.58.1-src/src/llvm-project/llvm/utils/TableGen/ |
H A D | DAGISelMatcherGen.cpp | 109 void InferPossibleTypes(unsigned ForceMode); 113 unsigned ForceMode); 117 unsigned ForceMode); 173 void MatcherGen::InferPossibleTypes(unsigned ForceMode) { in InferPossibleTypes() argument 178 TP.getInfer().ForceMode = ForceMode; in InferPossibleTypes() 311 unsigned ForceMode) { in EmitOperatorMatchCode() argument 364 EmitMatchCode(N->getChild(0), NodeNoTypes->getChild(0), ForceMode); in EmitOperatorMatchCode() 463 EmitMatchCode(N->getChild(i), NodeNoTypes->getChild(i), ForceMode); in EmitOperatorMatchCode() 505 unsigned ForceMode) { in EmitMatchCode() argument 514 InferPossibleTypes(ForceMode); in EmitMatchCode() [all …]
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H A D | CodeGenDAGPatterns.h | 260 TypeInfer(TreePattern &T) : TP(T), ForceMode(0) {} in TypeInfer() 357 unsigned ForceMode; // Mode to use when set. member 1061 unsigned ForceMode; // Force this mode in type inference when set. variable 1071 ID(uid), ForceMode(setmode) {} in SrcRecord() 1083 unsigned getForceMode() const { return ForceMode; } in getForceMode()
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/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/utils/TableGen/ |
H A D | DAGISelMatcherGen.cpp | 109 void InferPossibleTypes(unsigned ForceMode); 113 unsigned ForceMode); 117 unsigned ForceMode); 173 void MatcherGen::InferPossibleTypes(unsigned ForceMode) { in InferPossibleTypes() argument 178 TP.getInfer().ForceMode = ForceMode; in InferPossibleTypes() 311 unsigned ForceMode) { in EmitOperatorMatchCode() argument 364 EmitMatchCode(N->getChild(0), NodeNoTypes->getChild(0), ForceMode); in EmitOperatorMatchCode() 463 EmitMatchCode(N->getChild(i), NodeNoTypes->getChild(i), ForceMode); in EmitOperatorMatchCode() 505 unsigned ForceMode) { in EmitMatchCode() argument 514 InferPossibleTypes(ForceMode); in EmitMatchCode() [all …]
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H A D | CodeGenDAGPatterns.h | 260 TypeInfer(TreePattern &T) : TP(T), ForceMode(0) {} in TypeInfer() 357 unsigned ForceMode; // Mode to use when set. member 1061 unsigned ForceMode; // Force this mode in type inference when set. variable 1071 ID(uid), ForceMode(setmode) {} in SrcRecord() 1083 unsigned getForceMode() const { return ForceMode; } in getForceMode()
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/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/utils/TableGen/ |
H A D | DAGISelMatcherGen.cpp | 109 void InferPossibleTypes(unsigned ForceMode); 113 unsigned ForceMode); 117 unsigned ForceMode); 173 void MatcherGen::InferPossibleTypes(unsigned ForceMode) { in InferPossibleTypes() argument 178 TP.getInfer().ForceMode = ForceMode; in InferPossibleTypes() 311 unsigned ForceMode) { in EmitOperatorMatchCode() argument 364 EmitMatchCode(N->getChild(0), NodeNoTypes->getChild(0), ForceMode); in EmitOperatorMatchCode() 463 EmitMatchCode(N->getChild(i), NodeNoTypes->getChild(i), ForceMode); in EmitOperatorMatchCode() 505 unsigned ForceMode) { in EmitMatchCode() argument 514 InferPossibleTypes(ForceMode); in EmitMatchCode() [all …]
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H A D | CodeGenDAGPatterns.h | 260 TypeInfer(TreePattern &T) : TP(T), ForceMode(0) {} in TypeInfer() 357 unsigned ForceMode; // Mode to use when set. member 1061 unsigned ForceMode; // Force this mode in type inference when set. variable 1071 ID(uid), ForceMode(setmode) {} in SrcRecord() 1083 unsigned getForceMode() const { return ForceMode; } in getForceMode()
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/dports/graphics/llvm-mesa/llvm-13.0.1.src/utils/TableGen/ |
H A D | DAGISelMatcherGen.cpp | 109 void InferPossibleTypes(unsigned ForceMode); 113 unsigned ForceMode); 117 unsigned ForceMode); 173 void MatcherGen::InferPossibleTypes(unsigned ForceMode) { in InferPossibleTypes() argument 178 TP.getInfer().ForceMode = ForceMode; in InferPossibleTypes() 311 unsigned ForceMode) { in EmitOperatorMatchCode() argument 364 EmitMatchCode(N->getChild(0), NodeNoTypes->getChild(0), ForceMode); in EmitOperatorMatchCode() 463 EmitMatchCode(N->getChild(i), NodeNoTypes->getChild(i), ForceMode); in EmitOperatorMatchCode() 505 unsigned ForceMode) { in EmitMatchCode() argument 514 InferPossibleTypes(ForceMode); in EmitMatchCode() [all …]
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H A D | CodeGenDAGPatterns.h | 260 TypeInfer(TreePattern &T) : TP(T), ForceMode(0) {} in TypeInfer() 357 unsigned ForceMode; // Mode to use when set. member 1061 unsigned ForceMode; // Force this mode in type inference when set. variable 1071 ID(uid), ForceMode(setmode) {} in SrcRecord() 1083 unsigned getForceMode() const { return ForceMode; } in getForceMode()
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/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/utils/TableGen/ |
H A D | DAGISelMatcherGen.cpp | 109 void InferPossibleTypes(unsigned ForceMode); 113 unsigned ForceMode); 117 unsigned ForceMode); 173 void MatcherGen::InferPossibleTypes(unsigned ForceMode) { in InferPossibleTypes() argument 178 TP.getInfer().ForceMode = ForceMode; in InferPossibleTypes() 311 unsigned ForceMode) { in EmitOperatorMatchCode() argument 364 EmitMatchCode(N->getChild(0), NodeNoTypes->getChild(0), ForceMode); in EmitOperatorMatchCode() 463 EmitMatchCode(N->getChild(i), NodeNoTypes->getChild(i), ForceMode); in EmitOperatorMatchCode() 505 unsigned ForceMode) { in EmitMatchCode() argument 514 InferPossibleTypes(ForceMode); in EmitMatchCode() [all …]
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H A D | CodeGenDAGPatterns.h | 260 TypeInfer(TreePattern &T) : TP(T), ForceMode(0) {} in TypeInfer() 357 unsigned ForceMode; // Mode to use when set. member 1061 unsigned ForceMode; // Force this mode in type inference when set. variable 1071 ID(uid), ForceMode(setmode) {} in SrcRecord() 1083 unsigned getForceMode() const { return ForceMode; } in getForceMode()
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/dports/devel/asl/asl-current/ |
H A D | codemn2610.c | 363 int ArgOffset, ForceMode; in DecodeMem() local 372 ForceMode = 1; in DecodeMem() 382 ForceMode = 2; in DecodeMem() 386 ForceMode = 1; in DecodeMem() 389 ArgOffset = ForceMode = 0; in DecodeMem() 400 switch (ForceMode) in DecodeMem()
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