| /dports/emulators/qemu42/qemu-4.2.1/include/hw/intc/ |
| H A D | arm_gic_common.h | 51 #define GIC_VIRT_MIN_ABPR (GIC_VIRT_MIN_BPR + 1) macro
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| /dports/emulators/qemu/qemu-6.2.0/include/hw/intc/ |
| H A D | arm_gic_common.h | 52 #define GIC_VIRT_MIN_ABPR (GIC_VIRT_MIN_BPR + 1) macro
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| /dports/emulators/qemu60/qemu-6.0.0/include/hw/intc/ |
| H A D | arm_gic_common.h | 52 #define GIC_VIRT_MIN_ABPR (GIC_VIRT_MIN_BPR + 1) macro
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| /dports/emulators/qemu-powernv/qemu-powernv-3.0.50/include/hw/intc/ |
| H A D | arm_gic_common.h | 51 #define GIC_VIRT_MIN_ABPR (GIC_VIRT_MIN_BPR + 1) macro
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| /dports/emulators/qemu5/qemu-5.2.0/include/hw/intc/ |
| H A D | arm_gic_common.h | 52 #define GIC_VIRT_MIN_ABPR (GIC_VIRT_MIN_BPR + 1) macro
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| /dports/emulators/qemu-utils/qemu-4.2.1/include/hw/intc/ |
| H A D | arm_gic_common.h | 51 #define GIC_VIRT_MIN_ABPR (GIC_VIRT_MIN_BPR + 1) macro
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| /dports/emulators/qemu-guest-agent/qemu-5.0.1/include/hw/intc/ |
| H A D | arm_gic_common.h | 51 #define GIC_VIRT_MIN_ABPR (GIC_VIRT_MIN_BPR + 1)
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| /dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/include/hw/intc/ |
| H A D | arm_gic_common.h | 52 #define GIC_VIRT_MIN_ABPR (GIC_VIRT_MIN_BPR + 1) macro
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| /dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/include/hw/intc/ |
| H A D | arm_gic_common.h | 51 #define GIC_VIRT_MIN_ABPR (GIC_VIRT_MIN_BPR + 1) macro
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| /dports/emulators/qemu42/qemu-4.2.1/hw/intc/ |
| H A D | arm_gic_common.c | 251 s->abpr[i] = gic_is_vcpu(i) ? GIC_VIRT_MIN_ABPR : GIC_MIN_ABPR; in arm_gic_common_reset_irq_state()
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| H A D | arm_gic.c | 1842 s->abpr[vcpu] = MAX(abpr, GIC_VIRT_MIN_ABPR); in gic_vmcr_write()
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| /dports/emulators/qemu/qemu-6.2.0/hw/intc/ |
| H A D | arm_gic_common.c | 251 s->abpr[i] = gic_is_vcpu(i) ? GIC_VIRT_MIN_ABPR : GIC_MIN_ABPR; in arm_gic_common_reset_irq_state()
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| H A D | arm_gic.c | 1864 s->abpr[vcpu] = MAX(abpr, GIC_VIRT_MIN_ABPR); in gic_vmcr_write()
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| /dports/emulators/qemu60/qemu-6.0.0/hw/intc/ |
| H A D | arm_gic_common.c | 251 s->abpr[i] = gic_is_vcpu(i) ? GIC_VIRT_MIN_ABPR : GIC_MIN_ABPR; in arm_gic_common_reset_irq_state()
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| H A D | arm_gic.c | 1864 s->abpr[vcpu] = MAX(abpr, GIC_VIRT_MIN_ABPR); in gic_vmcr_write()
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| /dports/emulators/qemu-powernv/qemu-powernv-3.0.50/hw/intc/ |
| H A D | arm_gic_common.c | 248 s->abpr[i] = gic_is_vcpu(i) ? GIC_VIRT_MIN_ABPR : GIC_MIN_ABPR; in arm_gic_common_reset_irq_state()
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| H A D | arm_gic.c | 1840 s->abpr[vcpu] = MAX(abpr, GIC_VIRT_MIN_ABPR); in gic_vmcr_write()
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| /dports/emulators/qemu5/qemu-5.2.0/hw/intc/ |
| H A D | arm_gic_common.c | 251 s->abpr[i] = gic_is_vcpu(i) ? GIC_VIRT_MIN_ABPR : GIC_MIN_ABPR; in arm_gic_common_reset_irq_state()
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| H A D | arm_gic.c | 1861 s->abpr[vcpu] = MAX(abpr, GIC_VIRT_MIN_ABPR); in gic_vmcr_write()
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| /dports/emulators/qemu-utils/qemu-4.2.1/hw/intc/ |
| H A D | arm_gic_common.c | 251 s->abpr[i] = gic_is_vcpu(i) ? GIC_VIRT_MIN_ABPR : GIC_MIN_ABPR; in arm_gic_common_reset_irq_state()
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| H A D | arm_gic.c | 1842 s->abpr[vcpu] = MAX(abpr, GIC_VIRT_MIN_ABPR); in gic_vmcr_write()
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| /dports/emulators/qemu-guest-agent/qemu-5.0.1/hw/intc/ |
| H A D | arm_gic_common.c | 251 s->abpr[i] = gic_is_vcpu(i) ? GIC_VIRT_MIN_ABPR : GIC_MIN_ABPR; in arm_gic_common_reset_irq_state()
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| H A D | arm_gic.c | 1861 s->abpr[vcpu] = MAX(abpr, GIC_VIRT_MIN_ABPR);
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| /dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/hw/intc/ |
| H A D | arm_gic_common.c | 251 s->abpr[i] = gic_is_vcpu(i) ? GIC_VIRT_MIN_ABPR : GIC_MIN_ABPR; in arm_gic_common_reset_irq_state()
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| /dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/hw/intc/ |
| H A D | arm_gic_common.c | 251 s->abpr[i] = gic_is_vcpu(i) ? GIC_VIRT_MIN_ABPR : GIC_MIN_ABPR; in arm_gic_common_reset_irq_state()
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