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Searched refs:GMAC_TI_ST_CTRL (Results 1 – 25 of 39) sorted by relevance

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/dports/emulators/qemu60/qemu-6.0.0/roms/ipxe/src/drivers/net/
H A Dsky2.c1750 sky2_write8(hw, GMAC_TI_ST_CTRL, GMT_ST_CLR_IRQ); in sky2_hw_intr()
2070 sky2_write8(hw, GMAC_TI_ST_CTRL, GMT_ST_STOP); in sky2_reset()
2071 sky2_write8(hw, GMAC_TI_ST_CTRL, GMT_ST_CLR_IRQ); in sky2_reset()
H A Dsky2.h866 GMAC_TI_ST_CTRL = 0x0e18,/* 8 bit Time Stamp Timer Ctrl Reg */ enumerator
/dports/emulators/qemu42/qemu-4.2.1/roms/ipxe/src/drivers/net/
H A Dsky2.c1750 sky2_write8(hw, GMAC_TI_ST_CTRL, GMT_ST_CLR_IRQ); in sky2_hw_intr()
2070 sky2_write8(hw, GMAC_TI_ST_CTRL, GMT_ST_STOP); in sky2_reset()
2071 sky2_write8(hw, GMAC_TI_ST_CTRL, GMT_ST_CLR_IRQ); in sky2_reset()
H A Dsky2.h866 GMAC_TI_ST_CTRL = 0x0e18,/* 8 bit Time Stamp Timer Ctrl Reg */ enumerator
H A Dskge.h892 GMAC_TI_ST_CTRL = 0x0e18,/* 8 bit Time Stamp Timer Ctrl Reg */ enumerator
/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/ipxe/src/drivers/net/
H A Dsky2.c1750 sky2_write8(hw, GMAC_TI_ST_CTRL, GMT_ST_CLR_IRQ); in sky2_hw_intr()
2070 sky2_write8(hw, GMAC_TI_ST_CTRL, GMT_ST_STOP); in sky2_reset()
2071 sky2_write8(hw, GMAC_TI_ST_CTRL, GMT_ST_CLR_IRQ); in sky2_reset()
H A Dsky2.h866 GMAC_TI_ST_CTRL = 0x0e18,/* 8 bit Time Stamp Timer Ctrl Reg */ enumerator
/dports/emulators/qemu-utils/qemu-4.2.1/roms/ipxe/src/drivers/net/
H A Dsky2.c1750 sky2_write8(hw, GMAC_TI_ST_CTRL, GMT_ST_CLR_IRQ); in sky2_hw_intr()
2070 sky2_write8(hw, GMAC_TI_ST_CTRL, GMT_ST_STOP); in sky2_reset()
2071 sky2_write8(hw, GMAC_TI_ST_CTRL, GMT_ST_CLR_IRQ); in sky2_reset()
H A Dsky2.h866 GMAC_TI_ST_CTRL = 0x0e18,/* 8 bit Time Stamp Timer Ctrl Reg */ enumerator
H A Dskge.h892 GMAC_TI_ST_CTRL = 0x0e18,/* 8 bit Time Stamp Timer Ctrl Reg */ enumerator
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/roms/ipxe/src/drivers/net/
H A Dsky2.c1750 sky2_write8(hw, GMAC_TI_ST_CTRL, GMT_ST_CLR_IRQ); in sky2_hw_intr()
2070 sky2_write8(hw, GMAC_TI_ST_CTRL, GMT_ST_STOP); in sky2_reset()
2071 sky2_write8(hw, GMAC_TI_ST_CTRL, GMT_ST_CLR_IRQ); in sky2_reset()
H A Dsky2.h866 GMAC_TI_ST_CTRL = 0x0e18,/* 8 bit Time Stamp Timer Ctrl Reg */ enumerator
H A Dskge.h892 GMAC_TI_ST_CTRL = 0x0e18,/* 8 bit Time Stamp Timer Ctrl Reg */ enumerator
/dports/sysutils/syslinux/syslinux-6.03/gpxe/src/drivers/net/
H A Dsky2.c1751 sky2_write8(hw, GMAC_TI_ST_CTRL, GMT_ST_CLR_IRQ); in sky2_hw_intr()
2071 sky2_write8(hw, GMAC_TI_ST_CTRL, GMT_ST_STOP); in sky2_reset()
2072 sky2_write8(hw, GMAC_TI_ST_CTRL, GMT_ST_CLR_IRQ); in sky2_reset()
H A Dsky2.h866 GMAC_TI_ST_CTRL = 0x0e18,/* 8 bit Time Stamp Timer Ctrl Reg */ enumerator
/dports/emulators/qemu5/qemu-5.2.0/roms/ipxe/src/drivers/net/
H A Dsky2.c1750 sky2_write8(hw, GMAC_TI_ST_CTRL, GMT_ST_CLR_IRQ); in sky2_hw_intr()
2070 sky2_write8(hw, GMAC_TI_ST_CTRL, GMT_ST_STOP); in sky2_reset()
2071 sky2_write8(hw, GMAC_TI_ST_CTRL, GMT_ST_CLR_IRQ); in sky2_reset()
H A Dsky2.h866 GMAC_TI_ST_CTRL = 0x0e18,/* 8 bit Time Stamp Timer Ctrl Reg */ enumerator
/dports/net/ipxe/ipxe-2265a65/src/drivers/net/
H A Dsky2.c1750 sky2_write8(hw, GMAC_TI_ST_CTRL, GMT_ST_CLR_IRQ); in sky2_hw_intr()
2070 sky2_write8(hw, GMAC_TI_ST_CTRL, GMT_ST_STOP); in sky2_reset()
2071 sky2_write8(hw, GMAC_TI_ST_CTRL, GMT_ST_CLR_IRQ); in sky2_reset()
H A Dsky2.h866 GMAC_TI_ST_CTRL = 0x0e18,/* 8 bit Time Stamp Timer Ctrl Reg */ enumerator
/dports/emulators/qemu/qemu-6.2.0/roms/ipxe/src/drivers/net/
H A Dsky2.c1750 sky2_write8(hw, GMAC_TI_ST_CTRL, GMT_ST_CLR_IRQ); in sky2_hw_intr()
2070 sky2_write8(hw, GMAC_TI_ST_CTRL, GMT_ST_STOP); in sky2_reset()
2071 sky2_write8(hw, GMAC_TI_ST_CTRL, GMT_ST_CLR_IRQ); in sky2_reset()
H A Dsky2.h866 GMAC_TI_ST_CTRL = 0x0e18,/* 8 bit Time Stamp Timer Ctrl Reg */ enumerator
/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/net/ethernet/marvell/
H A Dskge.h834 GMAC_TI_ST_CTRL = 0x0e18,/* 8 bit Time Stamp Timer Ctrl Reg */ enumerator
H A Dsky2.h1006 GMAC_TI_ST_CTRL = 0x0e18,/* 8 bit Time Stamp Timer Ctrl Reg */ enumerator
/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/net/ethernet/marvell/
H A Dsky2.h1006 GMAC_TI_ST_CTRL = 0x0e18,/* 8 bit Time Stamp Timer Ctrl Reg */ enumerator
H A Dskge.h834 GMAC_TI_ST_CTRL = 0x0e18,/* 8 bit Time Stamp Timer Ctrl Reg */ enumerator

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