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Searched refs:GPDR0 (Results 1 – 25 of 140) sorted by relevance

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/dports/devel/openocd/openocd-0.11.0/tcl/board/
H A Dpxa255_sst.cfg30 mww 0x40E0000C 0x00008000 ;#GPDR0
38 mww 0x40E0000C 0x0280E000 ;#GPDR0
/dports/games/libretro-mu/Mu-ff746b8/tools/palm/hwTestSuite/armSideCode/
H A DarmDefines.h32 #define GPDR0 0x000C macro
/dports/sysutils/u-boot-utilite/u-boot-2015.07/board/pxa255_idp/
H A Dpxa_idp.c110 writel(led_bit, GPDR0); in blink_c()
/dports/sysutils/u-boot-nanopi-r4s/u-boot-2021.07/arch/arm/cpu/pxa/
H A Dpxa2xx.c195 writel(CONFIG_SYS_GPDR0_VAL, GPDR0); in pxa_gpio_setup()
/dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/arch/arm/cpu/pxa/
H A Dpxa2xx.c195 writel(CONFIG_SYS_GPDR0_VAL, GPDR0); in pxa_gpio_setup()
/dports/sysutils/u-boot-olinuxino-lime2-emmc/u-boot-2021.07/arch/arm/cpu/pxa/
H A Dpxa2xx.c195 writel(CONFIG_SYS_GPDR0_VAL, GPDR0); in pxa_gpio_setup()
/dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/arch/arm/cpu/pxa/
H A Dpxa2xx.c195 writel(CONFIG_SYS_GPDR0_VAL, GPDR0); in pxa_gpio_setup()
/dports/sysutils/u-boot-chip/u-boot-2021.07/arch/arm/cpu/pxa/
H A Dpxa2xx.c195 writel(CONFIG_SYS_GPDR0_VAL, GPDR0); in pxa_gpio_setup()
/dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/arch/arm/cpu/pxa/
H A Dpxa2xx.c195 writel(CONFIG_SYS_GPDR0_VAL, GPDR0); in pxa_gpio_setup()
/dports/sysutils/u-boot-firefly-rk3399/u-boot-2021.07/arch/arm/cpu/pxa/
H A Dpxa2xx.c195 writel(CONFIG_SYS_GPDR0_VAL, GPDR0); in pxa_gpio_setup()
/dports/sysutils/u-boot-nanopi-a64/u-boot-2021.07/arch/arm/cpu/pxa/
H A Dpxa2xx.c195 writel(CONFIG_SYS_GPDR0_VAL, GPDR0); in pxa_gpio_setup()
/dports/sysutils/u-boot-sopine/u-boot-2021.07/arch/arm/cpu/pxa/
H A Dpxa2xx.c195 writel(CONFIG_SYS_GPDR0_VAL, GPDR0); in pxa_gpio_setup()
/dports/sysutils/u-boot-a13-olinuxino/u-boot-2021.07/arch/arm/cpu/pxa/
H A Dpxa2xx.c195 writel(CONFIG_SYS_GPDR0_VAL, GPDR0); in pxa_gpio_setup()
/dports/sysutils/u-boot-sopine-spi/u-boot-2021.07/arch/arm/cpu/pxa/
H A Dpxa2xx.c195 writel(CONFIG_SYS_GPDR0_VAL, GPDR0); in pxa_gpio_setup()
/dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/arch/arm/cpu/pxa/
H A Dpxa2xx.c195 writel(CONFIG_SYS_GPDR0_VAL, GPDR0); in pxa_gpio_setup()
/dports/sysutils/u-boot-bananapi/u-boot-2021.07/arch/arm/cpu/pxa/
H A Dpxa2xx.c195 writel(CONFIG_SYS_GPDR0_VAL, GPDR0); in pxa_gpio_setup()
/dports/sysutils/u-boot-qemu-riscv64/u-boot-2021.07/arch/arm/cpu/pxa/
H A Dpxa2xx.c195 writel(CONFIG_SYS_GPDR0_VAL, GPDR0); in pxa_gpio_setup()
/dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/arch/arm/cpu/pxa/
H A Dpxa2xx.c195 writel(CONFIG_SYS_GPDR0_VAL, GPDR0); in pxa_gpio_setup()
/dports/sysutils/u-boot-clearfog/u-boot-2021.07/arch/arm/cpu/pxa/
H A Dpxa2xx.c195 writel(CONFIG_SYS_GPDR0_VAL, GPDR0); in pxa_gpio_setup()
/dports/sysutils/u-boot-cubieboard/u-boot-2021.07/arch/arm/cpu/pxa/
H A Dpxa2xx.c195 writel(CONFIG_SYS_GPDR0_VAL, GPDR0); in pxa_gpio_setup()
/dports/sysutils/u-boot-cubieboard2/u-boot-2021.07/arch/arm/cpu/pxa/
H A Dpxa2xx.c195 writel(CONFIG_SYS_GPDR0_VAL, GPDR0); in pxa_gpio_setup()
/dports/sysutils/u-boot-orangepi-zero-plus/u-boot-2021.07/arch/arm/cpu/pxa/
H A Dpxa2xx.c195 writel(CONFIG_SYS_GPDR0_VAL, GPDR0); in pxa_gpio_setup()
/dports/sysutils/u-boot-pandaboard/u-boot-2021.07/arch/arm/cpu/pxa/
H A Dpxa2xx.c195 writel(CONFIG_SYS_GPDR0_VAL, GPDR0); in pxa_gpio_setup()
/dports/sysutils/u-boot-orangepi-zero/u-boot-2021.07/arch/arm/cpu/pxa/
H A Dpxa2xx.c195 writel(CONFIG_SYS_GPDR0_VAL, GPDR0); in pxa_gpio_setup()
/dports/sysutils/u-boot-pine64-lts/u-boot-2021.07/arch/arm/cpu/pxa/
H A Dpxa2xx.c195 writel(CONFIG_SYS_GPDR0_VAL, GPDR0); in pxa_gpio_setup()

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