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Searched refs:Get_Block_Specification (Results 1 – 19 of 19) sorted by relevance

/dports/cad/ghdl/ghdl-1.0.0/src/vhdl/translate/
H A Dtrans-chap1.adb518 (Get_Block_Specification (El));
617 Spec : constant Iir := Get_Block_Specification (Block_Config);
804 Spec : constant Iir := Get_Block_Specification (Block_Config);
849 Block := Get_Block_Specification (Item);
907 Strip_Denoting_Name (Get_Block_Specification (Block_Config));
927 Strip_Denoting_Name (Get_Block_Specification (Block_Config));
H A Dtrans-chap12.adb543 (Get_Block_Specification (Get_Block_Configuration (Config_Lib)));
H A Dtrans-chap9.adb1948 (Get_Block_Specification (Get_Block_Configuration (Config)));
1959 Arch := Get_Block_Specification
H A Dtranslation.adb332 Arch := Get_Block_Specification
/dports/cad/ghdl/ghdl-1.0.0/src/synth/
H A Dsynthesis.adb52 (Get_Block_Specification (Get_Block_Configuration (Unit)));
H A Dsynth-insts.adb998 Arch := Get_Block_Specification (Get_Block_Configuration (Config));
1412 (Get_Block_Specification (Cfg)) = Blk);
1440 (Get_Block_Specification (Item));
H A Dsynth-stmts.adb3518 Spec := Get_Block_Specification (Config);
/dports/cad/ghdl/ghdl-1.0.0/src/vhdl/
H A Dvhdl-sem.adb779 Block_Spec := Get_Block_Specification (Block_Conf);
960 (Get_Block_Specification (Father)));
1036 Block_Spec := Get_Block_Specification (Block_Conf);
1088 Block_Spec := Get_Block_Specification (Block_Conf);
1273 Configured_Block := Get_Block_Specification (Father);
H A Dvhdl-canon.adb2455 (Get_Block_Specification (Block)));
3260 (Get_Block_Specification (Blk_Config));
3297 Spec : constant Iir := Get_Block_Specification (Conf);
3336 (Get_Block_Specification (El));
H A Dvhdl-errors.adb545 Arch := Get_Block_Specification
H A Dvhdl-configuration.adb162 Arch := Strip_Denoting_Name (Get_Block_Specification (Blk));
H A Dvhdl-utils.adb1779 (Get_Block_Specification (Get_Block_Configuration (Conf_Unit)));
H A Dvhdl-nodes.ads7718 function Get_Block_Specification (Target : Iir) return Iir; subprogspec
H A Dvhdl-nodes.adb2481 function Get_Block_Specification (Target : Iir) return Iir is subprogram
2487 end Get_Block_Specification;
H A Dvhdl-prints.adb4316 Spec := Get_Block_Specification (Block);
H A Dvhdl-nodes_meta.adb6051 return Get_Block_Specification (N);
/dports/cad/ghdl/ghdl-1.0.0/src/vhdl/simulate/
H A Dsimul-elaboration.adb1680 Arch := Get_Block_Specification
2079 Arch := Get_Named_Entity (Get_Block_Specification (Sub_Conf));
2175 Spec := Strip_Denoting_Name (Get_Block_Specification (Item));
2266 Spec := Strip_Denoting_Name (Get_Block_Specification (Item));
3033 (Get_Block_Specification (Get_Block_Configuration (Unit)));
/dports/cad/ghdl/ghdl-1.0.0/src/ghdldrv/
H A Dghdlcomp.adb349 (Get_Block_Specification (Get_Block_Configuration (Conf_Unit)));
/dports/cad/ghdl/ghdl-1.0.0/pyGHDL/libghdl/vhdl/
H A Dnodes.py1945 Get_Block_Specification = libghdl.vhdl__nodes__get_block_specification variable