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Searched refs:Get_Design_File_Chain (Results 1 – 13 of 13) sorted by relevance

/dports/cad/ghdl/ghdl-1.0.0/src/
H A Dlibraries.adb284 File := Get_Design_File_Chain (Work_Library);
420 pragma Assert (Get_Design_File_Chain (Library) = Null_Iir);
498 Set_Chain (Design_File, Get_Design_File_Chain (Library));
689 Set_Chain (Std_Standard_File, Get_Design_File_Chain (Std_Library));
909 File := Get_Design_File_Chain (Lib);
932 File := Get_Design_File_Chain (Lib);
1204 Design_File := Get_Design_File_Chain (Work_Library);
1257 Set_Chain (Design_File, Get_Design_File_Chain (Work_Library));
1360 Design_File := Get_Design_File_Chain (Library);
1530 Design_File := Get_Design_File_Chain (Lib);
/dports/cad/ghdl/ghdl-1.0.0/src/ghdldrv/
H A Dghdllocal.adb573 File := Get_Design_File_Chain (Lib);
812 Design_File := Get_Design_File_Chain (Libraries.Work_Library);
1040 File := Get_Design_File_Chain (Libraries.Work_Library);
1161 File := Get_Design_File_Chain (Libraries.Work_Library);
1365 File := Get_Design_File_Chain (Lib);
1427 File := Get_Design_File_Chain (Lib);
1488 File := Get_Design_File_Chain (Libraries.Work_Library);
/dports/cad/ghdl/ghdl-1.0.0/src/vhdl/
H A Dvhdl-nodes_gc.adb420 File := Get_Design_File_Chain (Lib);
435 File := Get_Design_File_Chain (Lib);
H A Dvhdl-nodes_walk.adb131 El := Get_Design_File_Chain (Parent);
H A Dvhdl-configuration.adb746 File := Get_Design_File_Chain (Library);
H A Dvhdl-sem_scopes.adb1362 Design_File := Get_Design_File_Chain (Library);
H A Dvhdl-nodes.ads7416 function Get_Design_File_Chain (Library : Iir) return Iir; subprogspec
H A Dvhdl-nodes.adb1487 function Get_Design_File_Chain (Library : Iir) return Iir is subprogram
1493 end Get_Design_File_Chain;
H A Dvhdl-nodes_meta.adb5999 return Get_Design_File_Chain (N);
/dports/cad/ghdl/ghdl-1.0.0/pyGHDL/lsp/
H A Dworkspace.py430 files = nodes.Get_Design_File_Chain(lib)
483 files = nodes.Get_Design_File_Chain(lib)
/dports/cad/ghdl/ghdl-1.0.0/src/synth/
H A Dsynth-debugger__on.adb630 File := Get_Design_File_Chain (Lib);
/dports/cad/ghdl/ghdl-1.0.0/src/vhdl/simulate/
H A Dsimul-debugger.adb797 File := Get_Design_File_Chain (Lib);
/dports/cad/ghdl/ghdl-1.0.0/pyGHDL/libghdl/vhdl/
H A Dnodes.py1771 Get_Design_File_Chain = libghdl.vhdl__nodes__get_design_file_chain variable