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Searched refs:Get_Formal_Conversion (Results 1 – 15 of 15) sorted by relevance

/dports/cad/ghdl/ghdl-1.0.0/src/vhdl/translate/
H A Dtrans-chap5.adb393 and then Get_Formal_Conversion (Assoc) = Null_Iir
518 if Get_Formal_Conversion (Assoc) /= Null_Iir then
558 Out_Conv : constant Iir := Get_Formal_Conversion (Assoc);
H A Dtrans-chap4.adb2833 Imp := Get_Formal_Conversion (Assoc);
3124 if Get_Formal_Conversion (Assoc) /= Null_Iir then
3286 (Formal, Get_Actual (Assoc), Get_Formal_Conversion (Assoc),
H A Dtrans-chap9.adb208 Form_Conv : constant Iir := Get_Formal_Conversion (Assoc);
H A Dtrans-chap8.adb3684 Out_Conv := Get_Formal_Conversion (El);
/dports/cad/ghdl/ghdl-1.0.0/src/vhdl/
H A Dvhdl-sem_assocs.adb331 or Get_Formal_Conversion (Assoc) /= Null_Iir
393 or Get_Formal_Conversion (Assoc) /= Null_Iir
590 F_Conv : constant Iir := Get_Formal_Conversion (Assoc);
H A Dvhdl-sem.adb286 or else Get_Formal_Conversion (Assoc) /= Null_Iir
1589 and then Are_Trees_Equal (Get_Formal_Conversion (Left),
1590 Get_Formal_Conversion (Right));
H A Dvhdl-canon.adb2521 Sem_Inst.Copy_Tree (Get_Formal_Conversion (Assoc)));
H A Dvhdl-nodes.ads7633 function Get_Formal_Conversion (Target : Iir) return Iir; subprogspec
H A Dvhdl-nodes.adb2208 function Get_Formal_Conversion (Target : Iir) return Iir is subprogram
2214 end Get_Formal_Conversion;
H A Dvhdl-prints.adb3297 Conv := Get_Formal_Conversion (El);
H A Dvhdl-nodes_meta.adb6031 return Get_Formal_Conversion (N);
/dports/cad/ghdl/ghdl-1.0.0/src/vhdl/simulate/
H A Dsimul-elaboration.adb1324 and then Get_Formal_Conversion (Assoc) = Null_Iir
1359 pragma Assert (Get_Formal_Conversion (Assoc) = Null_Iir);
H A Dsimul-simulation-main.adb806 Out_Conv : constant Iir := Get_Formal_Conversion (Assoc);
H A Dsimul-execution.adb3664 if Get_Formal_Conversion (Assoc) /= Null_Iir then
3767 Conv := Get_Formal_Conversion (Assoc);
/dports/cad/ghdl/ghdl-1.0.0/pyGHDL/libghdl/vhdl/
H A Dnodes.py1894 Get_Formal_Conversion = libghdl.vhdl__nodes__get_formal_conversion variable