/dports/cad/ghdl/ghdl-1.0.0/src/psl/ |
H A D | psl-subsets.adb | 47 if Get_Psl_Type (Get_Left (N)) /= Type_Boolean then 52 if Get_Psl_Type (Get_Left (N)) /= Type_Boolean then 57 if Get_Psl_Type (Get_Left (N)) /= Type_Boolean then 70 or else Get_Psl_Type (Get_Left (N)) /= Type_Boolean 78 or else Get_Psl_Type (Get_Left (N)) /= Type_Boolean 127 Check_Simple (Get_Left (N)); 146 Check_Simple (Get_Left (N)); 162 Check_Simple (Get_Left (N));
|
H A D | psl-qm.adb | 251 return Build_Primes_Or (Build_Primes (Get_Left (N), True), 254 return Build_Primes_And (Build_Primes (Get_Left (N), False), 260 return Build_Primes_And (Build_Primes (Get_Left (N), True), 263 return Build_Primes_Or (Build_Primes (Get_Left (N), False), 269 return Build_Primes_Or (Build_Primes (Get_Left (N), True), 273 return Build_Primes_And (Build_Primes (Get_Left (N), False), 280 (Build_Primes_And (Build_Primes (Get_Left (N), False), 282 Build_Primes_And (Build_Primes (Get_Left (N), True), 287 (Build_Primes_And (Build_Primes (Get_Left (N), True), 289 Build_Primes_And (Build_Primes (Get_Left (N), False),
|
H A D | psl-prints.adb | 118 Dump_Expr (Get_Left (N)); 124 Dump_Expr (Get_Left (N)); 173 Print_Expr (Get_Left (N), Prio); 177 Print_Expr (Get_Left (N), Prio); 181 Print_Expr (Get_Left (N), Prio); 211 Print_Sequence (Get_Left (N), Prio); 279 Print_Property (Get_Left (N), Prio); 288 Print_Property (Get_Left (N), Prio);
|
H A D | psl-rewrites.adb | 109 Set_Left (N, Rewrite_Boolean (Get_Left (N))); 231 Res := Build_Concat (Build_Concat (Build_True_Star, Get_Left (N)), 306 Set_Left (N, Rewrite_SERE (Get_Left (N))); 317 Set_Left (N, Rewrite_SERE (Get_Left (N))); 348 Build_Plus (Rewrite_Boolean (Get_Left (N))), 357 Res := Build_Overlap_Imp_Seq (L, Rewrite_Property (Get_Left (N))); 460 B1 := Rewrite_Boolean (Get_Left (N)); 520 (Rewrite_Boolean (Get_Left (N)), 579 Set_Left (N, Rewrite_Property (Get_Left (N))); 583 return Rewrite_Or (Rewrite_Property (Get_Left (N)),
|
H A D | psl-cse.adb | 108 R1 := Get_Left (R); 122 and then Get_Left (H) = L 166 and then Get_Left (H) = L
|
H A D | psl-build.adb | 493 return Build_Concat (Build_SERE_FA (Get_Left (N)), 496 return Build_Fusion (Build_SERE_FA (Get_Left (N)), 499 return Intersection.Build_Inter (Build_SERE_FA (Get_Left (N)), 503 return Intersection.Build_Inter (Build_SERE_FA (Get_Left (N)), 508 return Build_Or (Build_SERE_FA (Get_Left (N)), 1005 (Get_Left (N), Get_Right (N), With_Active); 1008 L := Build_Property_FA (Get_Left (N), False);
|
H A D | psl-tprint.adb | 105 Disp_Property (Up (Prefix), Get_Left (N));
|
H A D | psl-nodes.ads | 532 function Get_Left (N : Node) return Node; subprogspec
|
H A D | psl-nfas-utils.adb | 347 return Has_EOS (Get_Left (N)) or else Has_EOS (Get_Right (N));
|
H A D | psl-nodes.adb | 634 function Get_Left (N : Node) return Node is subprogram 640 end Get_Left;
|
H A D | psl-nodes_meta.adb | 811 return Get_Left (N);
|
/dports/cad/ghdl/ghdl-1.0.0/src/vhdl/ |
H A D | vhdl-canon_psl.adb | 35 Canon_Extract_Sensitivity (Get_Left (Expr), Sensitivity_List);
|
H A D | vhdl-sem_psl.adb | 235 Left : constant Iir := Get_Left (Expr); 418 Set_Left (Bool, Sem_Boolean (Get_Left (Bool))); 444 Set_Left (Res, Get_Left (Prop)); 483 L := Sem_Sequence (Get_Left (Seq)); 581 Res := Sem_Property (Get_Left (Prop)); 593 L := Sem_Property (Get_Left (Prop)); 791 Set_Left (Res, Rewrite_As_Boolean_Expression (Get_Left (Expr)));
|
H A D | vhdl-parse_psl.adb | 88 Set_Left (Res, Psl_To_Vhdl (Get_Left (N))); 676 Set_Left (Res, Property_To_Sequence (Get_Left (N))); 700 Set_Left (N, Property_To_Sequence (Get_Left (N)));
|
H A D | vhdl-sem_expr.adb | 883 Staticness := Min (Get_Expr_Staticness (Get_Left (Expr)), 1737 Left := Get_Left (Expr); 1801 Left := Get_Left (Expr); 1867 Level := Is_Expr_Compatible (Get_Type (Left_Inter), Get_Left (Expr)); 4581 Left := Get_Left (Left); 4651 Left := Get_Left (Arr (Len));
|
H A D | vhdl-prints.adb | 1986 Print_Expr (Ctxt, Get_Left (N), Prio); 1992 Print_Expr (Ctxt, Get_Left (N), Prio); 1997 Print_Expr (Ctxt, Get_Left (N), Prio); 2030 Print_Sequence (Ctxt, Get_Left (N), Prio); 2104 Print_Property (Ctxt, Get_Left (N), Prio); 2114 Print_Property (Ctxt, Get_Left (N), Prio); 2923 Print (Ctxt, Get_Left (Expr));
|
H A D | vhdl-canon.adb | 213 (Get_Left (Expr), Sensitivity_List, False); 687 Canon_Expression (Get_Left (Expr)); 814 Canon_PSL_Expression (Get_Left (Expr));
|
H A D | vhdl-sem.adb | 1573 return Are_Trees_Equal (Get_Left (Left), Get_Left (Right))
|
H A D | vhdl-evaluation.adb | 1100 Left_Op := Get_Left (Op); 2928 Left : constant Iir := Get_Left (Expr); 3328 return Can_Eval_Value (Get_Left (Expr), False)
|
/dports/cad/ghdl/ghdl-1.0.0/src/synth/ |
H A D | synth-expr.adb | 1634 Left := Get_Left (Expr); 1883 L : constant PSL_Node := Get_Left (Expr); 1908 Synth_PSL_Expression (Syn_Inst, Get_Left (Expr)), 2130 Get_Left (Expr), Get_Right (Expr)); 2140 (Syn_Inst, Id_And, Get_Left (Expr), Get_Right (Expr), 2144 (Syn_Inst, Id_Or, Get_Left (Expr), Get_Right (Expr), 2148 (Syn_Inst, Id_And, Get_Left (Expr), Get_Right (Expr), 2152 (Syn_Inst, Id_Or, Get_Left (Expr), Get_Right (Expr), 2159 (Syn_Inst, Get_Left (Expr), Get_Right (Expr), Expr); 2164 Get_Left (Expr), Get_Right (Expr), Expr);
|
/dports/cad/ghdl/ghdl-1.0.0/src/vhdl/simulate/ |
H A D | simul-elaboration-ams.adb | 120 Add_Dependency (Block, Get_Left (N));
|
H A D | simul-simulation-main.adb | 398 return Execute_Psl_Expr (Instance, Get_Left (Expr), Eos) 401 return Execute_Psl_Expr (Instance, Get_Left (Expr), Eos)
|
/dports/lang/racket/racket-8.3/share/pkgs/mzscheme-lib/mzscheme/examples/ |
H A D | tree.cxx | 436 Scheme_Object *Get_Left(int argc, Scheme_Object **argv) in Get_Left() function 489 Get_Left, 0, 0); in scheme_initialize()
|
/dports/cad/ghdl/ghdl-1.0.0/src/vhdl/translate/ |
H A D | trans-chap9.adb | 417 Translate_Psl_Expr (Get_Left (Expr), Eos), 422 Translate_Psl_Expr (Get_Left (Expr), Eos),
|
H A D | trans-chap7.adb | 1280 Walk_Concat (Imp, Get_Left (E), Get_Right (E)); 4392 (Expr, Get_Left (Expr), Get_Right (Expr), Res_Type); 4395 (Expr, Get_Left (Expr), Get_Right (Expr), Res_Type); 4588 if Get_Length_Pattern (Get_Left (Expr), False) = Pat_Length
|