/dports/cad/ghdl/ghdl-1.0.0/src/psl/ |
H A D | psl-qm.adb | 252 Build_Primes (Get_Right (N), True)); 255 Build_Primes (Get_Right (N), False)); 261 Build_Primes (Get_Right (N), True)); 264 Build_Primes (Get_Right (N), False)); 270 Build_Primes (Get_Right (N), False)); 274 Build_Primes (Get_Right (N), True)); 281 Build_Primes (Get_Right (N), False)), 283 Build_Primes (Get_Right (N), True))); 288 Build_Primes (Get_Right (N), False)), 290 Build_Primes (Get_Right (N), True)));
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H A D | psl-subsets.adb | 64 if Get_Psl_Type (Get_Right (N)) /= Type_Boolean then 69 if Get_Psl_Type (Get_Right (N)) /= Type_Boolean 77 if Get_Psl_Type (Get_Right (N)) /= Type_Boolean 128 Check_Simple (Get_Right (N)); 147 Check_Simple (Get_Right (N)); 163 Check_Simple (Get_Right (N));
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H A D | psl-prints.adb | 120 Dump_Expr (Get_Right (N)); 126 Dump_Expr (Get_Right (N)); 175 Print_Expr (Get_Right (N), Prio); 179 Print_Expr (Get_Right (N), Prio); 183 Print_Expr (Get_Right (N), Prio); 213 Print_Sequence (Get_Right (N), Prio); 281 Print_Property (Get_Right (N), Prio); 297 Print_Property (Get_Right (N), Prio);
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H A D | psl-rewrites.adb | 110 Set_Right (N, Rewrite_Boolean (Get_Right (N))); 233 return Build_Binary (N_Match_And_Seq, Res, Get_Right (N)); 307 Set_Right (N, Rewrite_SERE (Get_Right (N))); 318 Set_Right (N, Rewrite_SERE (Get_Right (N))); 349 Rewrite_Boolean (Get_Right (N))); 355 B := Rewrite_Boolean (Get_Right (N)); 461 B2 := Rewrite_Boolean (Get_Right (N)); 521 Rewrite_Property (Get_Right (N))); 580 Set_Right (N, Rewrite_Property (Get_Right (N))); 584 Rewrite_Property (Get_Right (N)));
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H A D | psl-build.adb | 494 Build_SERE_FA (Get_Right (N))); 497 Build_SERE_FA (Get_Right (N))); 500 Build_SERE_FA (Get_Right (N)), 504 Build_SERE_FA (Get_Right (N)), 509 Build_SERE_FA (Get_Right (N))); 1005 (Get_Left (N), Get_Right (N), With_Active); 1009 R := Build_Property_FA (Get_Right (N), False);
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H A D | psl-cse.adb | 123 and then Get_Right (H) = R 167 and then Get_Right (H) = R
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H A D | psl-tprint.adb | 107 Disp_Property (Down (Prefix), Get_Right (N));
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H A D | psl-nodes.ads | 536 function Get_Right (N : Node) return Node; subprogspec
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H A D | psl-nfas-utils.adb | 347 return Has_EOS (Get_Left (N)) or else Has_EOS (Get_Right (N));
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H A D | psl-nodes.adb | 650 function Get_Right (N : Node) return Node is subprogram 656 end Get_Right;
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H A D | psl-nodes_meta.adb | 813 return Get_Right (N);
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/dports/cad/ghdl/ghdl-1.0.0/src/vhdl/ |
H A D | vhdl-canon_psl.adb | 36 Canon_Extract_Sensitivity (Get_Right (Expr), Sensitivity_List);
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H A D | vhdl-sem_psl.adb | 236 Right : constant Iir := Get_Right (Expr); 419 Set_Right (Bool, Sem_Boolean (Get_Right (Bool))); 445 Set_Right (Res, Get_Right (Prop)); 485 R := Sem_Sequence (Get_Right (Seq)); 583 Res := Sem_Property (Get_Right (Prop)); 595 R := Sem_Property (Get_Right (Prop)); 792 Set_Right (Res, Rewrite_As_Boolean_Expression (Get_Right (Expr)));
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H A D | vhdl-parse_psl.adb | 89 Set_Right (Res, Psl_To_Vhdl (Get_Right (N))); 677 Set_Right (Res, Property_To_Sequence (Get_Right (N))); 701 Set_Right (N, Property_To_Sequence (Get_Right (N)));
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H A D | vhdl-sem_expr.adb | 884 Get_Expr_Staticness (Get_Right (Expr))); 1748 Right := Get_Right (Expr); 1810 Right := Get_Right (Expr); 1875 Get_Right (Expr)); 4636 Right := Get_Right (Arr (I)); 4638 Right := Get_Right (Arr (I));
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H A D | vhdl-evaluation.adb | 1077 El := Get_Right (Op); 1188 Res_Type := Get_Type (Get_Right (Operands (1))); 1222 Res_Type := Get_Type (Get_Right (Operands (1))); 2929 Right : constant Iir := Get_Right (Expr); 3329 and then Can_Eval_Value (Get_Right (Expr), False);
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H A D | vhdl-prints.adb | 1988 Print_Expr (Ctxt, Get_Right (N), Prio); 1994 Print_Expr (Ctxt, Get_Right (N), Prio); 1999 Print_Expr (Ctxt, Get_Right (N), Prio); 2032 Print_Sequence (Ctxt, Get_Right (N), Prio); 2106 Print_Property (Ctxt, Get_Right (N), Prio); 2128 Print_Property (Ctxt, Get_Right (N), Prio); 2925 Print (Ctxt, Get_Right (Expr));
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H A D | vhdl-canon.adb | 215 (Get_Right (Expr), Sensitivity_List, False); 688 Canon_Expression (Get_Right (Expr)); 815 Canon_PSL_Expression (Get_Right (Expr));
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H A D | vhdl-sem.adb | 1574 and then Are_Trees_Equal (Get_Right (Left), Get_Right (Right));
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/dports/cad/ghdl/ghdl-1.0.0/src/synth/ |
H A D | synth-expr.adb | 1639 Right := Get_Right (Expr); 1884 R : constant PSL_Node := Get_Right (Expr); 1909 Synth_PSL_Expression (Syn_Inst, Get_Right (Expr))); 2130 Get_Left (Expr), Get_Right (Expr)); 2140 (Syn_Inst, Id_And, Get_Left (Expr), Get_Right (Expr), 2144 (Syn_Inst, Id_Or, Get_Left (Expr), Get_Right (Expr), 2148 (Syn_Inst, Id_And, Get_Left (Expr), Get_Right (Expr), 2152 (Syn_Inst, Id_Or, Get_Left (Expr), Get_Right (Expr), 2159 (Syn_Inst, Get_Left (Expr), Get_Right (Expr), Expr); 2164 Get_Left (Expr), Get_Right (Expr), Expr);
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/dports/cad/ghdl/ghdl-1.0.0/src/vhdl/simulate/ |
H A D | simul-elaboration-ams.adb | 121 Add_Dependency (Block, Get_Right (N));
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H A D | simul-simulation-main.adb | 399 and Execute_Psl_Expr (Instance, Get_Right (Expr), Eos); 402 or Execute_Psl_Expr (Instance, Get_Right (Expr), Eos);
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/dports/lang/racket/racket-8.3/share/pkgs/mzscheme-lib/mzscheme/examples/ |
H A D | tree.cxx | 443 Scheme_Object *Get_Right(int argc, Scheme_Object **argv) in Get_Right() function 491 Get_Right, 0, 0); in scheme_initialize()
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/dports/cad/ghdl/ghdl-1.0.0/src/vhdl/translate/ |
H A D | trans-chap9.adb | 418 Translate_Psl_Expr (Get_Right (Expr), Eos)); 423 Translate_Psl_Expr (Get_Right (Expr), Eos));
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H A D | trans-chap7.adb | 1280 Walk_Concat (Imp, Get_Left (E), Get_Right (E)); 4392 (Expr, Get_Left (Expr), Get_Right (Expr), Res_Type); 4395 (Expr, Get_Left (Expr), Get_Right (Expr), Res_Type); 4590 Get_Length_Pattern (Get_Right (Expr), False) = Pat_1
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