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Searched refs:Get_Subprogram_Specification (Results 1 – 21 of 21) sorted by relevance

/dports/cad/ghdl/ghdl-1.0.0/src/vhdl/translate/
H A Dtrans_analyzes.adb199 not Get_Pure_Flag (Get_Subprogram_Specification (Decl)))
H A Dtrans-chap2.adb401 Spec : constant Iir := Get_Subprogram_Specification (Subprg);
H A Dtrans-chap4.adb2567 Get_Use_Flag (Get_Subprogram_Specification (El))
2571 (Get_Subprogram_Specification (El));
/dports/cad/ghdl/ghdl-1.0.0/src/vhdl/
H A Dvhdl-xrefs.adb276 Xref_Table.Table (I).Ref := Get_Subprogram_Specification (N);
H A Dvhdl-sem_decls.adb1251 Spec := Get_Subprogram_Specification (Parent);
1258 Spec := Get_Subprogram_Specification (Parent);
H A Dvhdl-sem.adb2058 (Get_Subprogram_Specification (Parent)) + 1);
2114 Spec : constant Iir := Get_Subprogram_Specification (Subprg);
H A Dvhdl-annotations.adb538 Spec : constant Iir := Get_Subprogram_Specification (Subprg);
H A Dvhdl-sem_inst.adb505 Spec : constant Iir := Get_Subprogram_Specification (Res);
H A Dvhdl-utils.adb1347 and then Get_Subprogram_Specification (Bod) /= Spec;
H A Dvhdl-sem_specs.adb667 Spec := Get_Subprogram_Specification (Scope);
H A Dvhdl-nodes.ads7914 function Get_Subprogram_Specification (Target : Iir) return Iir; subprogspec
H A Dvhdl-evaluation.adb4252 Path_Add_Element (Get_Subprogram_Specification (El),
H A Dvhdl-sem_names.adb1729 Get_Subprogram_Depth (Get_Subprogram_Specification (Parent)));
H A Dvhdl-nodes.adb3127 function Get_Subprogram_Specification (Target : Iir) return Iir is subprogram
3133 end Get_Subprogram_Specification;
H A Dvhdl-prints.adb294 Disp_Function_Name (Ctxt, Get_Subprogram_Specification (Decl));
H A Dvhdl-nodes_meta.adb6117 return Get_Subprogram_Specification (N);
/dports/cad/ghdl/ghdl-1.0.0/pyGHDL/lsp/
H A Dsymbols.py115 nid = nodes.Get_Identifier(nodes.Get_Subprogram_Specification(n))
/dports/cad/ghdl/ghdl-1.0.0/src/synth/
H A Dsynth-debugger__on.adb575 Decl := Get_Subprogram_Specification (Decl);
/dports/cad/ghdl/ghdl-1.0.0/src/vhdl/simulate/
H A Dsimul-debugger.adb1781 Spec : constant Iir := Get_Subprogram_Specification (N);
H A Dsimul-execution.adb3346 Label := Get_Subprogram_Specification (Bod);
/dports/cad/ghdl/ghdl-1.0.0/pyGHDL/libghdl/vhdl/
H A Dnodes.py2062 Get_Subprogram_Specification = libghdl.vhdl__nodes__get_subprogram_specification variable