Searched refs:HIFN_PUSTAT_CHIPENA (Results 1 – 5 of 5) sorted by relevance
171 #define HIFN_PUSTAT_CHIPENA 0xff00 /* Chip enabled mask */ macro
405 ena = READ_REG_0(sc, HIFN_0_PUSTAT) & HIFN_PUSTAT_CHIPENA;950 encl = READ_REG_0(sc, HIFN_0_PUSTAT) & HIFN_PUSTAT_CHIPENA;986 encl = READ_REG_0(sc, HIFN_0_PUSTAT) & HIFN_PUSTAT_CHIPENA;
153 #define HIFN_PUSTAT_CHIPENA 0xff00 /* Chip enabled mask */ macro