| /dports/emulators/qemu60/qemu-6.0.0/hw/i2c/ |
| H A D | aspeed_i2c.c | 123 #define I2CD_RX_DMA_ENABLE (0x1 << 9) macro
322 } else if (bus->cmd & I2CD_RX_DMA_ENABLE) { in aspeed_i2c_bus_recv()
340 bus->cmd &= ~I2CD_RX_DMA_ENABLE; in aspeed_i2c_bus_recv()
392 (bus->cmd & (I2CD_RX_DMA_ENABLE | I2CD_TX_DMA_ENABLE | in aspeed_i2c_check_sram()
408 } else if (bus->cmd & (I2CD_RX_DMA_ENABLE | I2CD_RX_DMA_ENABLE)) { in aspeed_i2c_bus_cmd_dump()
416 bus->cmd & I2CD_RX_DMA_ENABLE ? "rxdma|" : "", in aspeed_i2c_bus_cmd_dump()
590 value & (I2CD_RX_DMA_ENABLE | I2CD_TX_DMA_ENABLE)) { in aspeed_i2c_bus_write()
|
| /dports/emulators/qemu5/qemu-5.2.0/hw/i2c/ |
| H A D | aspeed_i2c.c | 123 #define I2CD_RX_DMA_ENABLE (0x1 << 9) macro
322 } else if (bus->cmd & I2CD_RX_DMA_ENABLE) { in aspeed_i2c_bus_recv()
340 bus->cmd &= ~I2CD_RX_DMA_ENABLE; in aspeed_i2c_bus_recv()
392 (bus->cmd & (I2CD_RX_DMA_ENABLE | I2CD_TX_DMA_ENABLE | in aspeed_i2c_check_sram()
408 } else if (bus->cmd & (I2CD_RX_DMA_ENABLE | I2CD_RX_DMA_ENABLE)) { in aspeed_i2c_bus_cmd_dump()
416 bus->cmd & I2CD_RX_DMA_ENABLE ? "rxdma|" : "", in aspeed_i2c_bus_cmd_dump()
590 value & (I2CD_RX_DMA_ENABLE | I2CD_TX_DMA_ENABLE)) { in aspeed_i2c_bus_write()
|
| /dports/emulators/qemu-guest-agent/qemu-5.0.1/hw/i2c/ |
| H A D | aspeed_i2c.c | 123 #define I2CD_RX_DMA_ENABLE (0x1 << 9) macro
322 } else if (bus->cmd & I2CD_RX_DMA_ENABLE) { in aspeed_i2c_bus_recv()
340 bus->cmd &= ~I2CD_RX_DMA_ENABLE; in aspeed_i2c_bus_recv()
392 (bus->cmd & (I2CD_RX_DMA_ENABLE | I2CD_TX_DMA_ENABLE | in aspeed_i2c_check_sram()
408 } else if (bus->cmd & (I2CD_RX_DMA_ENABLE | I2CD_RX_DMA_ENABLE)) { in aspeed_i2c_bus_cmd_dump()
416 bus->cmd & I2CD_RX_DMA_ENABLE ? "rxdma|" : "", in aspeed_i2c_bus_cmd_dump()
590 value & (I2CD_RX_DMA_ENABLE | I2CD_TX_DMA_ENABLE)) { in aspeed_i2c_bus_write()
|
| /dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/hw/i2c/ |
| H A D | aspeed_i2c.c | 123 #define I2CD_RX_DMA_ENABLE (0x1 << 9) macro
322 } else if (bus->cmd & I2CD_RX_DMA_ENABLE) { in aspeed_i2c_bus_recv()
340 bus->cmd &= ~I2CD_RX_DMA_ENABLE; in aspeed_i2c_bus_recv()
392 (bus->cmd & (I2CD_RX_DMA_ENABLE | I2CD_TX_DMA_ENABLE | in aspeed_i2c_check_sram()
408 } else if (bus->cmd & (I2CD_RX_DMA_ENABLE | I2CD_RX_DMA_ENABLE)) { in aspeed_i2c_bus_cmd_dump()
416 bus->cmd & I2CD_RX_DMA_ENABLE ? "rxdma|" : "", in aspeed_i2c_bus_cmd_dump()
590 value & (I2CD_RX_DMA_ENABLE | I2CD_TX_DMA_ENABLE)) { in aspeed_i2c_bus_write()
|
| /dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/hw/i2c/ |
| H A D | aspeed_i2c.c | 123 #define I2CD_RX_DMA_ENABLE (0x1 << 9) macro
322 } else if (bus->cmd & I2CD_RX_DMA_ENABLE) { in aspeed_i2c_bus_recv()
340 bus->cmd &= ~I2CD_RX_DMA_ENABLE; in aspeed_i2c_bus_recv()
392 (bus->cmd & (I2CD_RX_DMA_ENABLE | I2CD_TX_DMA_ENABLE | in aspeed_i2c_check_sram()
408 } else if (bus->cmd & (I2CD_RX_DMA_ENABLE | I2CD_RX_DMA_ENABLE)) { in aspeed_i2c_bus_cmd_dump()
416 bus->cmd & I2CD_RX_DMA_ENABLE ? "rxdma|" : "", in aspeed_i2c_bus_cmd_dump()
590 value & (I2CD_RX_DMA_ENABLE | I2CD_TX_DMA_ENABLE)) { in aspeed_i2c_bus_write()
|
| /dports/emulators/qemu/qemu-6.2.0/hw/i2c/ |
| H A D | aspeed_i2c.c | 123 #define I2CD_RX_DMA_ENABLE (0x1 << 9) macro
322 } else if (bus->cmd & I2CD_RX_DMA_ENABLE) { in aspeed_i2c_bus_recv()
340 bus->cmd &= ~I2CD_RX_DMA_ENABLE; in aspeed_i2c_bus_recv()
392 (bus->cmd & (I2CD_RX_DMA_ENABLE | I2CD_TX_DMA_ENABLE | in aspeed_i2c_check_sram()
408 } else if (bus->cmd & (I2CD_RX_DMA_ENABLE | I2CD_RX_DMA_ENABLE)) { in aspeed_i2c_bus_cmd_dump()
416 bus->cmd & I2CD_RX_DMA_ENABLE ? "rxdma|" : "", in aspeed_i2c_bus_cmd_dump()
590 value & (I2CD_RX_DMA_ENABLE | I2CD_TX_DMA_ENABLE)) { in aspeed_i2c_bus_write()
|
| /dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/drivers/i2c/ |
| H A D | ast_i2c.h | 113 #define I2CD_RX_DMA_ENABLE (0x1 << 9) macro
|
| /dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/drivers/i2c/ |
| H A D | ast_i2c.h | 113 #define I2CD_RX_DMA_ENABLE (0x1 << 9) macro
|
| /dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/drivers/i2c/ |
| H A D | ast_i2c.h | 113 #define I2CD_RX_DMA_ENABLE (0x1 << 9) macro
|
| /dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/drivers/i2c/ |
| H A D | ast_i2c.h | 113 #define I2CD_RX_DMA_ENABLE (0x1 << 9) macro
|
| /dports/sysutils/u-boot-olinuxino-lime2-emmc/u-boot-2021.07/drivers/i2c/ |
| H A D | ast_i2c.h | 113 #define I2CD_RX_DMA_ENABLE (0x1 << 9) macro
|
| /dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/drivers/i2c/ |
| H A D | ast_i2c.h | 113 #define I2CD_RX_DMA_ENABLE (0x1 << 9) macro
|
| /dports/sysutils/u-boot-wandboard/u-boot-2021.07/drivers/i2c/ |
| H A D | ast_i2c.h | 113 #define I2CD_RX_DMA_ENABLE (0x1 << 9) macro
|
| /dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot/drivers/i2c/ |
| H A D | ast_i2c.h | 113 #define I2CD_RX_DMA_ENABLE (0x1 << 9) macro
|
| /dports/sysutils/u-boot-cubieboard2/u-boot-2021.07/drivers/i2c/ |
| H A D | ast_i2c.h | 113 #define I2CD_RX_DMA_ENABLE (0x1 << 9) macro
|
| /dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/drivers/i2c/ |
| H A D | ast_i2c.h | 113 #define I2CD_RX_DMA_ENABLE (0x1 << 9) macro
|
| /dports/sysutils/u-boot-firefly-rk3399/u-boot-2021.07/drivers/i2c/ |
| H A D | ast_i2c.h | 113 #define I2CD_RX_DMA_ENABLE (0x1 << 9) macro
|
| /dports/sysutils/u-boot-sinovoip-bpi-m3/u-boot-2021.07/drivers/i2c/ |
| H A D | ast_i2c.h | 113 #define I2CD_RX_DMA_ENABLE (0x1 << 9) macro
|
| /dports/sysutils/u-boot-a13-olinuxino/u-boot-2021.07/drivers/i2c/ |
| H A D | ast_i2c.h | 113 #define I2CD_RX_DMA_ENABLE (0x1 << 9) macro
|
| /dports/sysutils/u-boot-sopine/u-boot-2021.07/drivers/i2c/ |
| H A D | ast_i2c.h | 113 #define I2CD_RX_DMA_ENABLE (0x1 << 9) macro
|
| /dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/drivers/i2c/ |
| H A D | ast_i2c.h | 113 #define I2CD_RX_DMA_ENABLE (0x1 << 9) macro
|
| /dports/sysutils/u-boot-qemu-arm64/u-boot-2021.07/drivers/i2c/ |
| H A D | ast_i2c.h | 113 #define I2CD_RX_DMA_ENABLE (0x1 << 9) macro
|
| /dports/sysutils/u-boot-rpi/u-boot-2021.07/drivers/i2c/ |
| H A D | ast_i2c.h | 113 #define I2CD_RX_DMA_ENABLE (0x1 << 9) macro
|
| /dports/sysutils/u-boot-nanopi-r4s/u-boot-2021.07/drivers/i2c/ |
| H A D | ast_i2c.h | 113 #define I2CD_RX_DMA_ENABLE (0x1 << 9) macro
|
| /dports/sysutils/u-boot-nanopi-m1plus/u-boot-2021.07/drivers/i2c/ |
| H A D | ast_i2c.h | 113 #define I2CD_RX_DMA_ENABLE (0x1 << 9) macro
|