Home
last modified time | relevance | path

Searched refs:ICH_IOCE (Results 1 – 8 of 8) sorted by relevance

/dports/misc/rump/buildrump.sh-b914579/src/sys/dev/pci/
H A Dauichreg.h66 #define ICH_IOCE 0x10 /* int on completion enable */ macro
H A Dauich.c1397 ICH_IOCE | ICH_FEIE | ICH_RPBM); in auich_trigger_pipe()
/dports/multimedia/v4l_compat/linux-5.13-rc2/sound/pci/
H A Dintel8x0m.c81 #define ICH_IOCE 0x10 /* interrupt on completion enable */ macro
516 val = ICH_IOCE | ICH_STARTBM; in snd_intel8x0m_pcm_trigger()
523 val = ICH_IOCE; in snd_intel8x0m_pcm_trigger()
526 val = ICH_IOCE | ICH_STARTBM; in snd_intel8x0m_pcm_trigger()
H A Dintel8x0.c111 #define ICH_IOCE 0x10 /* interrupt on completion enable */ macro
793 val = ICH_IOCE | ICH_STARTBM; in snd_intel8x0_pcm_trigger()
803 val = ICH_IOCE; in snd_intel8x0_pcm_trigger()
842 iputbyte(chip, port + ICH_REG_OFF_CR, ICH_IOCE); in snd_intel8x0_ali_trigger()
2670 iputbyte(chip, port + ICH_REG_OFF_CR, ICH_IOCE | ICH_STARTBM); in intel8x0_measure_ac97_clock()
2672 iputbyte(chip, port + ICH_REG_OFF_CR, ICH_IOCE); in intel8x0_measure_ac97_clock()
/dports/multimedia/libv4l/linux-5.13-rc2/sound/pci/
H A Dintel8x0m.c81 #define ICH_IOCE 0x10 /* interrupt on completion enable */ macro
516 val = ICH_IOCE | ICH_STARTBM; in snd_intel8x0m_pcm_trigger()
523 val = ICH_IOCE; in snd_intel8x0m_pcm_trigger()
526 val = ICH_IOCE | ICH_STARTBM; in snd_intel8x0m_pcm_trigger()
H A Dintel8x0.c111 #define ICH_IOCE 0x10 /* interrupt on completion enable */ macro
793 val = ICH_IOCE | ICH_STARTBM; in snd_intel8x0_pcm_trigger()
803 val = ICH_IOCE; in snd_intel8x0_pcm_trigger()
842 iputbyte(chip, port + ICH_REG_OFF_CR, ICH_IOCE); in snd_intel8x0_ali_trigger()
2670 iputbyte(chip, port + ICH_REG_OFF_CR, ICH_IOCE | ICH_STARTBM); in intel8x0_measure_ac97_clock()
2672 iputbyte(chip, port + ICH_REG_OFF_CR, ICH_IOCE); in intel8x0_measure_ac97_clock()
/dports/multimedia/v4l-utils/linux-5.13-rc2/sound/pci/
H A Dintel8x0m.c81 #define ICH_IOCE 0x10 /* interrupt on completion enable */ macro
516 val = ICH_IOCE | ICH_STARTBM; in snd_intel8x0m_pcm_trigger()
523 val = ICH_IOCE; in snd_intel8x0m_pcm_trigger()
526 val = ICH_IOCE | ICH_STARTBM; in snd_intel8x0m_pcm_trigger()
H A Dintel8x0.c111 #define ICH_IOCE 0x10 /* interrupt on completion enable */ macro
793 val = ICH_IOCE | ICH_STARTBM; in snd_intel8x0_pcm_trigger()
803 val = ICH_IOCE; in snd_intel8x0_pcm_trigger()
842 iputbyte(chip, port + ICH_REG_OFF_CR, ICH_IOCE); in snd_intel8x0_ali_trigger()
2670 iputbyte(chip, port + ICH_REG_OFF_CR, ICH_IOCE | ICH_STARTBM); in intel8x0_measure_ac97_clock()
2672 iputbyte(chip, port + ICH_REG_OFF_CR, ICH_IOCE); in intel8x0_measure_ac97_clock()