Searched refs:ICH_LVBCI (Results 1 – 7 of 7) sorted by relevance
| /dports/misc/rump/buildrump.sh-b914579/src/sys/dev/pci/ |
| H A D | auichreg.h | 59 #define ICH_LVBCI 0x04 /* r- last valid bci, wr ack */ macro
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| /dports/multimedia/v4l_compat/linux-5.13-rc2/sound/pci/ |
| H A D | intel8x0m.c | 73 #define ICH_LVBCI 0x04 /* last valid buffer completion interrupt */ macro
410 iputbyte(chip, port + ichdev->roff_sr, ICH_FIFOE | ICH_BCIS | ICH_LVBCI); in snd_intel8x0m_setup_periods()
466 iputbyte(chip, port + ichdev->roff_sr, ICH_FIFOE | ICH_BCIS | ICH_LVBCI); in snd_intel8x0m_update()
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| H A D | intel8x0.c | 103 #define ICH_LVBCI 0x04 /* last valid buffer completion interrupt */ macro
680 iputbyte(chip, port + ichdev->roff_sr, ICH_FIFOE | ICH_BCIS | ICH_LVBCI); in snd_intel8x0_setup_periods()
740 status & (ICH_FIFOE | ICH_BCIS | ICH_LVBCI)); in snd_intel8x0_update()
2619 iputbyte(chip, port + ichdev->roff_sr, ICH_FIFOE | ICH_BCIS | ICH_LVBCI); in intel8x0_resume()
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| /dports/multimedia/libv4l/linux-5.13-rc2/sound/pci/ |
| H A D | intel8x0m.c | 73 #define ICH_LVBCI 0x04 /* last valid buffer completion interrupt */ macro
410 iputbyte(chip, port + ichdev->roff_sr, ICH_FIFOE | ICH_BCIS | ICH_LVBCI); in snd_intel8x0m_setup_periods()
466 iputbyte(chip, port + ichdev->roff_sr, ICH_FIFOE | ICH_BCIS | ICH_LVBCI); in snd_intel8x0m_update()
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| H A D | intel8x0.c | 103 #define ICH_LVBCI 0x04 /* last valid buffer completion interrupt */ macro
680 iputbyte(chip, port + ichdev->roff_sr, ICH_FIFOE | ICH_BCIS | ICH_LVBCI); in snd_intel8x0_setup_periods()
740 status & (ICH_FIFOE | ICH_BCIS | ICH_LVBCI)); in snd_intel8x0_update()
2619 iputbyte(chip, port + ichdev->roff_sr, ICH_FIFOE | ICH_BCIS | ICH_LVBCI); in intel8x0_resume()
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| /dports/multimedia/v4l-utils/linux-5.13-rc2/sound/pci/ |
| H A D | intel8x0m.c | 73 #define ICH_LVBCI 0x04 /* last valid buffer completion interrupt */ macro
410 iputbyte(chip, port + ichdev->roff_sr, ICH_FIFOE | ICH_BCIS | ICH_LVBCI); in snd_intel8x0m_setup_periods()
466 iputbyte(chip, port + ichdev->roff_sr, ICH_FIFOE | ICH_BCIS | ICH_LVBCI); in snd_intel8x0m_update()
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| H A D | intel8x0.c | 103 #define ICH_LVBCI 0x04 /* last valid buffer completion interrupt */ macro
680 iputbyte(chip, port + ichdev->roff_sr, ICH_FIFOE | ICH_BCIS | ICH_LVBCI); in snd_intel8x0_setup_periods()
740 status & (ICH_FIFOE | ICH_BCIS | ICH_LVBCI)); in snd_intel8x0_update()
2619 iputbyte(chip, port + ichdev->roff_sr, ICH_FIFOE | ICH_BCIS | ICH_LVBCI); in intel8x0_resume()
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