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Searched refs:ICH_VMCR_EL2 (Results 1 – 25 of 45) sorted by relevance

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/dports/multimedia/v4l-utils/linux-5.13-rc2/arch/arm64/kvm/hyp/
H A Dvgic-v3-sr.c275 write_gicreg(cpu_if->vgic_vmcr, ICH_VMCR_EL2); in __vgic_v3_activate_traps()
312 cpu_if->vgic_vmcr = read_gicreg(ICH_VMCR_EL2); in __vgic_v3_deactivate_traps()
460 return read_gicreg(ICH_VMCR_EL2); in __vgic_v3_read_vmcr()
465 write_gicreg(vmcr, ICH_VMCR_EL2); in __vgic_v3_write_vmcr()
972 write_gicreg(vmcr, ICH_VMCR_EL2); in __vgic_v3_write_pmr()
1016 write_gicreg(vmcr, ICH_VMCR_EL2); in __vgic_v3_write_ctlr()
/dports/multimedia/v4l_compat/linux-5.13-rc2/arch/arm64/kvm/hyp/
H A Dvgic-v3-sr.c275 write_gicreg(cpu_if->vgic_vmcr, ICH_VMCR_EL2); in __vgic_v3_activate_traps()
312 cpu_if->vgic_vmcr = read_gicreg(ICH_VMCR_EL2); in __vgic_v3_deactivate_traps()
460 return read_gicreg(ICH_VMCR_EL2); in __vgic_v3_read_vmcr()
465 write_gicreg(vmcr, ICH_VMCR_EL2); in __vgic_v3_write_vmcr()
972 write_gicreg(vmcr, ICH_VMCR_EL2); in __vgic_v3_write_pmr()
1016 write_gicreg(vmcr, ICH_VMCR_EL2); in __vgic_v3_write_ctlr()
/dports/multimedia/libv4l/linux-5.13-rc2/arch/arm64/kvm/hyp/
H A Dvgic-v3-sr.c275 write_gicreg(cpu_if->vgic_vmcr, ICH_VMCR_EL2); in __vgic_v3_activate_traps()
312 cpu_if->vgic_vmcr = read_gicreg(ICH_VMCR_EL2); in __vgic_v3_deactivate_traps()
460 return read_gicreg(ICH_VMCR_EL2); in __vgic_v3_read_vmcr()
465 write_gicreg(vmcr, ICH_VMCR_EL2); in __vgic_v3_write_vmcr()
972 write_gicreg(vmcr, ICH_VMCR_EL2); in __vgic_v3_write_pmr()
1016 write_gicreg(vmcr, ICH_VMCR_EL2); in __vgic_v3_write_ctlr()
/dports/sysutils/atf-sun50i_h6/arm-trusted-firmware-2.5/lib/el3_runtime/aarch64/
H A Dcontext.S84 mrs x10, ICH_VMCR_EL2
254 msr ICH_VMCR_EL2, x10
/dports/sysutils/atf-rk3399/arm-trusted-firmware-2.5/lib/el3_runtime/aarch64/
H A Dcontext.S84 mrs x10, ICH_VMCR_EL2
254 msr ICH_VMCR_EL2, x10
/dports/sysutils/atf-sun50i_a64/arm-trusted-firmware-2.5/lib/el3_runtime/aarch64/
H A Dcontext.S84 mrs x10, ICH_VMCR_EL2
254 msr ICH_VMCR_EL2, x10
/dports/sysutils/atf-rk3328/arm-trusted-firmware-2.5/lib/el3_runtime/aarch64/
H A Dcontext.S84 mrs x10, ICH_VMCR_EL2
254 msr ICH_VMCR_EL2, x10
/dports/sysutils/atf-fvp/arm-trusted-firmware-2.5/lib/el3_runtime/aarch64/
H A Dcontext.S84 mrs x10, ICH_VMCR_EL2
254 msr ICH_VMCR_EL2, x10
/dports/emulators/qemu42/qemu-4.2.1/hw/intc/
H A Dtrace-events136 gicv3_ich_vmcr_read(uint32_t cpu, uint64_t val) "GICv3 ICH_VMCR_EL2 read cpu 0x%x value 0x%" PRIx64
137 gicv3_ich_vmcr_write(uint32_t cpu, uint64_t val) "GICv3 ICH_VMCR_EL2 write cpu 0x%x value 0x%" PRIx…
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/hw/intc/
H A Dtrace-events136 gicv3_ich_vmcr_read(uint32_t cpu, uint64_t val) "GICv3 ICH_VMCR_EL2 read cpu 0x%x value 0x%" PRIx64
137 gicv3_ich_vmcr_write(uint32_t cpu, uint64_t val) "GICv3 ICH_VMCR_EL2 write cpu 0x%x value 0x%" PRIx…
/dports/emulators/qemu5/qemu-5.2.0/hw/intc/
H A Dtrace-events136 gicv3_ich_vmcr_read(uint32_t cpu, uint64_t val) "GICv3 ICH_VMCR_EL2 read cpu 0x%x value 0x%" PRIx64
137 gicv3_ich_vmcr_write(uint32_t cpu, uint64_t val) "GICv3 ICH_VMCR_EL2 write cpu 0x%x value 0x%" PRIx…
/dports/emulators/qemu-utils/qemu-4.2.1/hw/intc/
H A Dtrace-events136 gicv3_ich_vmcr_read(uint32_t cpu, uint64_t val) "GICv3 ICH_VMCR_EL2 read cpu 0x%x value 0x%" PRIx64
137 gicv3_ich_vmcr_write(uint32_t cpu, uint64_t val) "GICv3 ICH_VMCR_EL2 write cpu 0x%x value 0x%" PRIx…
/dports/emulators/qemu-guest-agent/qemu-5.0.1/hw/intc/
H A Dtrace-events136 gicv3_ich_vmcr_read(uint32_t cpu, uint64_t val) "GICv3 ICH_VMCR_EL2 read cpu 0x%x value 0x%" PRIx64
137 gicv3_ich_vmcr_write(uint32_t cpu, uint64_t val) "GICv3 ICH_VMCR_EL2 write cpu 0x%x value 0x%" PRIx…
/dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/hw/intc/
H A Dtrace-events136 gicv3_ich_vmcr_read(uint32_t cpu, uint64_t val) "GICv3 ICH_VMCR_EL2 read cpu 0x%x value 0x%" PRIx64
137 gicv3_ich_vmcr_write(uint32_t cpu, uint64_t val) "GICv3 ICH_VMCR_EL2 write cpu 0x%x value 0x%" PRIx…
/dports/devel/py-keystone-engine/keystone-engine-0.9.1-3/src/llvm/lib/Target/AArch64/Utils/
H A DAArch64BaseInfo.cpp757 {"ich_vmcr_el2", ICH_VMCR_EL2, {}},
H A DAArch64BaseInfo.h1156 ICH_VMCR_EL2 = 0xe65f, // 11 100 1100 1011 111 enumerator
/dports/emulators/qemu/qemu-6.2.0/hw/intc/
H A Dtrace-events127 gicv3_ich_vmcr_read(uint32_t cpu, uint64_t val) "GICv3 ICH_VMCR_EL2 read cpu 0x%x value 0x%" PRIx64
128 gicv3_ich_vmcr_write(uint32_t cpu, uint64_t val) "GICv3 ICH_VMCR_EL2 write cpu 0x%x value 0x%" PRIx…
/dports/emulators/qemu60/qemu-6.0.0/hw/intc/
H A Dtrace-events136 gicv3_ich_vmcr_read(uint32_t cpu, uint64_t val) "GICv3 ICH_VMCR_EL2 read cpu 0x%x value 0x%" PRIx64
137 gicv3_ich_vmcr_write(uint32_t cpu, uint64_t val) "GICv3 ICH_VMCR_EL2 write cpu 0x%x value 0x%" PRIx…
/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/hw/intc/
H A Dtrace-events127 gicv3_ich_vmcr_read(uint32_t cpu, uint64_t val) "GICv3 ICH_VMCR_EL2 read cpu 0x%x value 0x%" PRIx64
128 gicv3_ich_vmcr_write(uint32_t cpu, uint64_t val) "GICv3 ICH_VMCR_EL2 write cpu 0x%x value 0x%" PRIx…
/dports/sysutils/atf-sun50i_h6/arm-trusted-firmware-2.5/include/arch/aarch64/
H A Darch.h111 #define ICH_VMCR_EL2 S3_4_C12_C11_7 macro
/dports/sysutils/atf-sun50i_a64/arm-trusted-firmware-2.5/include/arch/aarch64/
H A Darch.h111 #define ICH_VMCR_EL2 S3_4_C12_C11_7 macro
/dports/sysutils/atf-rk3328/arm-trusted-firmware-2.5/include/arch/aarch64/
H A Darch.h111 #define ICH_VMCR_EL2 S3_4_C12_C11_7 macro
/dports/sysutils/atf-fvp/arm-trusted-firmware-2.5/include/arch/aarch64/
H A Darch.h111 #define ICH_VMCR_EL2 S3_4_C12_C11_7 macro
/dports/sysutils/atf-rk3399/arm-trusted-firmware-2.5/include/arch/aarch64/
H A Darch.h111 #define ICH_VMCR_EL2 S3_4_C12_C11_7 macro
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/AArch64/
H A DAArch64GenSystemOperands.inc764 ICH_VMCR_EL2 = 58975,
2828 { "ICH_VMCR_EL2", 0xE65F, true, true, {} }, // 574
3326 { "ICH_VMCR_EL2", 574 },

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