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Searched refs:ICIP2 (Results 1 – 25 of 79) sorted by relevance

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/dports/emulators/qemu42/qemu-4.2.1/hw/arm/
H A Dpxa2xx_pic.c27 #define ICIP2 0x9c /* Interrupt Controller IRQ Pending register 2 */ macro
141 case ICIP2: /* IRQ Pending register 2 */ in pxa2xx_pic_mem_read()
216 [0x6] = ICIP2,
/dports/emulators/qemu/qemu-6.2.0/hw/arm/
H A Dpxa2xx_pic.c30 #define ICIP2 0x9c /* Interrupt Controller IRQ Pending register 2 */ macro
143 case ICIP2: /* IRQ Pending register 2 */ in pxa2xx_pic_mem_read()
222 [0x6] = ICIP2,
/dports/emulators/qemu60/qemu-6.0.0/hw/arm/
H A Dpxa2xx_pic.c30 #define ICIP2 0x9c /* Interrupt Controller IRQ Pending register 2 */ macro
143 case ICIP2: /* IRQ Pending register 2 */ in pxa2xx_pic_mem_read()
222 [0x6] = ICIP2,
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/hw/arm/
H A Dpxa2xx_pic.c27 #define ICIP2 0x9c /* Interrupt Controller IRQ Pending register 2 */ macro
141 case ICIP2: /* IRQ Pending register 2 */ in pxa2xx_pic_mem_read()
216 [0x6] = ICIP2,
/dports/emulators/qemu5/qemu-5.2.0/hw/arm/
H A Dpxa2xx_pic.c30 #define ICIP2 0x9c /* Interrupt Controller IRQ Pending register 2 */ macro
143 case ICIP2: /* IRQ Pending register 2 */ in pxa2xx_pic_mem_read()
222 [0x6] = ICIP2,
/dports/emulators/qemu-utils/qemu-4.2.1/hw/arm/
H A Dpxa2xx_pic.c27 #define ICIP2 0x9c /* Interrupt Controller IRQ Pending register 2 */ macro
141 case ICIP2: /* IRQ Pending register 2 */ in pxa2xx_pic_mem_read()
216 [0x6] = ICIP2,
/dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/hw/arm/
H A Dpxa2xx_pic.c27 #define ICIP2 0x9c /* Interrupt Controller IRQ Pending register 2 */ macro
141 case ICIP2: /* IRQ Pending register 2 */ in pxa2xx_pic_mem_read()
216 [0x6] = ICIP2,
/dports/emulators/qemu-guest-agent/qemu-5.0.1/hw/arm/
H A Dpxa2xx_pic.c27 #define ICIP2 0x9c /* Interrupt Controller IRQ Pending register 2 */ macro
141 case ICIP2: /* IRQ Pending register 2 */ in pxa2xx_pic_mem_read()
216 [0x6] = ICIP2,
/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/hw/arm/
H A Dpxa2xx_pic.c30 #define ICIP2 0x9c /* Interrupt Controller IRQ Pending register 2 */ macro
143 case ICIP2: /* IRQ Pending register 2 */ in pxa2xx_pic_mem_read()
222 [0x6] = ICIP2,
/dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot-sam460ex/arch/arm/include/asm/arch-pxa/
H A Dpxa-regs.h1141 #define ICIP2 __REG(0x40D0009C) /* Interrupt Controller IRQ Pending Register 2 */ macro
1470 #define ICIP2 __REG(0x40D0009C) /* Interrupt Controller IRQ Pending Register 2 */ macro
2442 #define ICIP2 __REG(0x40D0009C) /* Interrupt Controller IRQ Pending Register 2 */ macro
/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot-sam460ex/arch/arm/include/asm/arch-pxa/
H A Dpxa-regs.h1141 #define ICIP2 __REG(0x40D0009C) /* Interrupt Controller IRQ Pending Register 2 */ macro
1470 #define ICIP2 __REG(0x40D0009C) /* Interrupt Controller IRQ Pending Register 2 */ macro
2442 #define ICIP2 __REG(0x40D0009C) /* Interrupt Controller IRQ Pending Register 2 */ macro
/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot-sam460ex/arch/arm/include/asm/arch-pxa/
H A Dpxa-regs.h1141 #define ICIP2 __REG(0x40D0009C) /* Interrupt Controller IRQ Pending Register 2 */ macro
1470 #define ICIP2 __REG(0x40D0009C) /* Interrupt Controller IRQ Pending Register 2 */ macro
2442 #define ICIP2 __REG(0x40D0009C) /* Interrupt Controller IRQ Pending Register 2 */ macro
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/roms/u-boot-sam460ex/arch/arm/include/asm/arch-pxa/
H A Dpxa-regs.h1141 #define ICIP2 __REG(0x40D0009C) /* Interrupt Controller IRQ Pending Register 2 */ macro
1470 #define ICIP2 __REG(0x40D0009C) /* Interrupt Controller IRQ Pending Register 2 */ macro
2442 #define ICIP2 __REG(0x40D0009C) /* Interrupt Controller IRQ Pending Register 2 */ macro
/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot-sam460ex/arch/arm/include/asm/arch-pxa/
H A Dpxa-regs.h1141 #define ICIP2 __REG(0x40D0009C) /* Interrupt Controller IRQ Pending Register 2 */ macro
1470 #define ICIP2 __REG(0x40D0009C) /* Interrupt Controller IRQ Pending Register 2 */ macro
2442 #define ICIP2 __REG(0x40D0009C) /* Interrupt Controller IRQ Pending Register 2 */ macro
/dports/emulators/qemu/qemu-6.2.0/roms/u-boot-sam460ex/arch/arm/include/asm/arch-pxa/
H A Dpxa-regs.h1141 #define ICIP2 __REG(0x40D0009C) /* Interrupt Controller IRQ Pending Register 2 */ macro
1470 #define ICIP2 __REG(0x40D0009C) /* Interrupt Controller IRQ Pending Register 2 */ macro
2442 #define ICIP2 __REG(0x40D0009C) /* Interrupt Controller IRQ Pending Register 2 */ macro
/dports/emulators/qemu60/qemu-6.0.0/roms/u-boot-sam460ex/arch/arm/include/asm/arch-pxa/
H A Dpxa-regs.h1141 #define ICIP2 __REG(0x40D0009C) /* Interrupt Controller IRQ Pending Register 2 */ macro
1470 #define ICIP2 __REG(0x40D0009C) /* Interrupt Controller IRQ Pending Register 2 */ macro
2442 #define ICIP2 __REG(0x40D0009C) /* Interrupt Controller IRQ Pending Register 2 */ macro
/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/arch/arm/include/asm/arch-pxa/
H A Dpxa-regs.h1147 #define ICIP2 0x40D0009C /* Interrupt Controller IRQ Pending Register 2 */ macro
/dports/emulators/qemu/qemu-6.2.0/roms/u-boot/arch/arm/include/asm/arch-pxa/
H A Dpxa-regs.h1147 #define ICIP2 0x40D0009C /* Interrupt Controller IRQ Pending Register 2 */ macro
/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/arch/arm/include/asm/arch-pxa/
H A Dpxa-regs.h1147 #define ICIP2 0x40D0009C /* Interrupt Controller IRQ Pending Register 2 */ macro
/dports/sysutils/u-boot-nanopi-r4s/u-boot-2021.07/arch/arm/include/asm/arch-pxa/
H A Dpxa-regs.h1147 #define ICIP2 0x40D0009C /* Interrupt Controller IRQ Pending Register 2 */ macro
/dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/arch/arm/include/asm/arch-pxa/
H A Dpxa-regs.h1147 #define ICIP2 0x40D0009C /* Interrupt Controller IRQ Pending Register 2 */ macro
/dports/sysutils/u-boot-olinuxino-lime2-emmc/u-boot-2021.07/arch/arm/include/asm/arch-pxa/
H A Dpxa-regs.h1147 #define ICIP2 0x40D0009C /* Interrupt Controller IRQ Pending Register 2 */ macro
/dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/arch/arm/include/asm/arch-pxa/
H A Dpxa-regs.h1147 #define ICIP2 0x40D0009C /* Interrupt Controller IRQ Pending Register 2 */ macro
/dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/arch/arm/include/asm/arch-pxa/
H A Dpxa-regs.h1147 #define ICIP2 0x40D0009C /* Interrupt Controller IRQ Pending Register 2 */ macro
/dports/sysutils/u-boot-firefly-rk3399/u-boot-2021.07/arch/arm/include/asm/arch-pxa/
H A Dpxa-regs.h1147 #define ICIP2 0x40D0009C /* Interrupt Controller IRQ Pending Register 2 */ macro

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