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Searched refs:ICPState (Results 1 – 25 of 75) sorted by relevance

123

/dports/emulators/qemu42/qemu-4.2.1/include/hw/ppc/
H A Dxics.h44 typedef struct ICPState ICPState; typedef
68 struct ICPState { struct
86 ICPState parent_obj; argument
159 void icp_set_cppr(ICPState *icp, uint8_t cppr);
161 uint32_t icp_accept(ICPState *ss);
163 void icp_eoi(ICPState *icp, uint32_t xirr);
164 void icp_reset(ICPState *icp);
180 void icp_resend(ICPState *ss);
184 void icp_destroy(ICPState *icp);
187 void icp_get_kvm_state(ICPState *icp);
[all …]
/dports/emulators/qemu-utils/qemu-4.2.1/include/hw/ppc/
H A Dxics.h44 typedef struct ICPState ICPState; typedef
68 struct ICPState { struct
86 ICPState parent_obj; argument
159 void icp_set_cppr(ICPState *icp, uint8_t cppr);
161 uint32_t icp_accept(ICPState *ss);
163 void icp_eoi(ICPState *icp, uint32_t xirr);
164 void icp_reset(ICPState *icp);
180 void icp_resend(ICPState *ss);
184 void icp_destroy(ICPState *icp);
187 void icp_get_kvm_state(ICPState *icp);
[all …]
/dports/emulators/qemu-guest-agent/qemu-5.0.1/include/hw/ppc/
H A Dxics.h44 typedef struct ICPState ICPState; typedef
68 struct ICPState { struct
86 ICPState parent_obj; argument
163 void icp_set_cppr(ICPState *icp, uint8_t cppr);
165 uint32_t icp_accept(ICPState *ss);
167 void icp_eoi(ICPState *icp, uint32_t xirr);
169 void icp_reset(ICPState *icp);
185 void icp_resend(ICPState *ss);
189 void icp_destroy(ICPState *icp);
192 void icp_get_kvm_state(ICPState *icp);
[all …]
/dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/include/hw/ppc/
H A Dxics.h44 typedef struct ICPState ICPState; typedef
68 struct ICPState { struct
86 ICPState parent_obj; argument
163 void icp_set_cppr(ICPState *icp, uint8_t cppr);
165 uint32_t icp_accept(ICPState *ss);
167 void icp_eoi(ICPState *icp, uint32_t xirr);
169 void icp_reset(ICPState *icp);
185 void icp_resend(ICPState *ss);
189 void icp_destroy(ICPState *icp);
192 void icp_get_kvm_state(ICPState *icp);
[all …]
/dports/emulators/qemu/qemu-6.2.0/include/hw/ppc/
H A Dxics.h51 OBJECT_DECLARE_TYPE(ICPState, ICPStateClass,
65 struct ICPState { struct
83 ICPState parent_obj; argument
156 void icp_set_cppr(ICPState *icp, uint8_t cppr);
158 uint32_t icp_accept(ICPState *ss);
160 void icp_eoi(ICPState *icp, uint32_t xirr);
162 void icp_reset(ICPState *icp);
178 void icp_resend(ICPState *ss);
182 void icp_destroy(ICPState *icp);
185 void icp_get_kvm_state(ICPState *icp);
[all …]
/dports/emulators/qemu60/qemu-6.0.0/include/hw/ppc/
H A Dxics.h51 OBJECT_DECLARE_TYPE(ICPState, ICPStateClass,
65 struct ICPState { struct
83 ICPState parent_obj; argument
156 void icp_set_cppr(ICPState *icp, uint8_t cppr);
158 uint32_t icp_accept(ICPState *ss);
160 void icp_eoi(ICPState *icp, uint32_t xirr);
162 void icp_reset(ICPState *icp);
178 void icp_resend(ICPState *ss);
182 void icp_destroy(ICPState *icp);
185 void icp_get_kvm_state(ICPState *icp);
[all …]
/dports/emulators/qemu5/qemu-5.2.0/include/hw/ppc/
H A Dxics.h51 OBJECT_DECLARE_TYPE(ICPState, ICPStateClass,
65 struct ICPState { struct
83 ICPState parent_obj; argument
156 void icp_set_cppr(ICPState *icp, uint8_t cppr);
158 uint32_t icp_accept(ICPState *ss);
160 void icp_eoi(ICPState *icp, uint32_t xirr);
162 void icp_reset(ICPState *icp);
178 void icp_resend(ICPState *ss);
182 void icp_destroy(ICPState *icp);
185 void icp_get_kvm_state(ICPState *icp);
[all …]
/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/include/hw/ppc/
H A Dxics.h51 OBJECT_DECLARE_TYPE(ICPState, ICPStateClass,
65 struct ICPState { struct
83 ICPState parent_obj; argument
156 void icp_set_cppr(ICPState *icp, uint8_t cppr);
158 uint32_t icp_accept(ICPState *ss);
160 void icp_eoi(ICPState *icp, uint32_t xirr);
162 void icp_reset(ICPState *icp);
178 void icp_resend(ICPState *ss);
182 void icp_destroy(ICPState *icp);
185 void icp_get_kvm_state(ICPState *icp);
[all …]
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/include/hw/ppc/
H A Dxics.h43 typedef struct ICPState ICPState; typedef
70 void (*pre_save)(ICPState *icp);
72 void (*synchronize_state)(ICPState *icp);
75 struct ICPState { struct
93 ICPState parent_obj; argument
190 void icp_set_cppr(ICPState *icp, uint8_t cppr);
191 void icp_set_mfrr(ICPState *icp, uint8_t mfrr);
192 uint32_t icp_accept(ICPState *ss);
193 uint32_t icp_ipoll(ICPState *ss, uint32_t *mfrr);
194 void icp_eoi(ICPState *icp, uint32_t xirr);
[all …]
/dports/emulators/qemu/qemu-6.2.0/hw/intc/
H A Dxics.c112 static void icp_check_ipi(ICPState *icp) in icp_check_ipi()
130 void icp_resend(ICPState *icp) in icp_resend()
176 uint32_t icp_accept(ICPState *icp) in icp_accept()
243 ICPState *icp = opaque; in icp_pre_save()
254 ICPState *icp = opaque; in icp_post_load()
280 VMSTATE_UINT8(mfrr, ICPState),
285 void icp_reset(ICPState *icp) in icp_reset()
303 ICPState *icp = ICP(dev); in icp_realize()
342 ICPState *icp = ICP(dev); in icp_unrealize()
371 .instance_size = sizeof(ICPState),
[all …]
H A Dxics_pnv.c36 ICPState *icp = ICP(opaque); in pnv_icp_read()
99 ICPState *icp = ICP(opaque); in pnv_icp_write()
164 ICPState *icp = ICP(dev); in pnv_icp_realize()
/dports/emulators/qemu60/qemu-6.0.0/hw/intc/
H A Dxics.c113 static void icp_check_ipi(ICPState *icp) in icp_check_ipi()
131 void icp_resend(ICPState *icp) in icp_resend()
177 uint32_t icp_accept(ICPState *icp) in icp_accept()
244 ICPState *icp = opaque; in icp_pre_save()
255 ICPState *icp = opaque; in icp_post_load()
281 VMSTATE_UINT8(mfrr, ICPState),
286 void icp_reset(ICPState *icp) in icp_reset()
304 ICPState *icp = ICP(dev); in icp_realize()
343 ICPState *icp = ICP(dev); in icp_unrealize()
372 .instance_size = sizeof(ICPState),
[all …]
H A Dxics_pnv.c36 ICPState *icp = ICP(opaque); in pnv_icp_read()
99 ICPState *icp = ICP(opaque); in pnv_icp_write()
164 ICPState *icp = ICP(dev); in pnv_icp_realize()
/dports/emulators/qemu5/qemu-5.2.0/hw/intc/
H A Dxics.c113 static void icp_check_ipi(ICPState *icp) in icp_check_ipi()
131 void icp_resend(ICPState *icp) in icp_resend()
177 uint32_t icp_accept(ICPState *icp) in icp_accept()
244 ICPState *icp = opaque; in icp_pre_save()
255 ICPState *icp = opaque; in icp_post_load()
281 VMSTATE_UINT8(mfrr, ICPState),
286 void icp_reset(ICPState *icp) in icp_reset()
304 ICPState *icp = ICP(dev); in icp_realize()
343 ICPState *icp = ICP(dev); in icp_unrealize()
372 .instance_size = sizeof(ICPState),
[all …]
H A Dxics_pnv.c36 ICPState *icp = ICP(opaque); in pnv_icp_read()
99 ICPState *icp = ICP(opaque); in pnv_icp_write()
164 ICPState *icp = ICP(dev); in pnv_icp_realize()
/dports/emulators/qemu-guest-agent/qemu-5.0.1/hw/intc/
H A Dxics.c113 static void icp_check_ipi(ICPState *icp) in icp_check_ipi()
131 void icp_resend(ICPState *icp) in icp_resend()
177 uint32_t icp_accept(ICPState *icp) in icp_accept()
244 ICPState *icp = opaque; in icp_pre_save()
255 ICPState *icp = opaque; in icp_post_load()
281 VMSTATE_UINT8(mfrr, ICPState),
286 void icp_reset(ICPState *icp) in icp_reset()
304 ICPState *icp = ICP(dev); in icp_realize()
343 ICPState *icp = ICP(dev); in icp_unrealize()
372 .instance_size = sizeof(ICPState),
[all …]
/dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/hw/intc/
H A Dxics.c113 static void icp_check_ipi(ICPState *icp) in icp_check_ipi()
131 void icp_resend(ICPState *icp) in icp_resend()
177 uint32_t icp_accept(ICPState *icp) in icp_accept()
244 ICPState *icp = opaque; in icp_pre_save()
255 ICPState *icp = opaque; in icp_post_load()
281 VMSTATE_UINT8(mfrr, ICPState),
286 void icp_reset(ICPState *icp) in icp_reset()
304 ICPState *icp = ICP(dev); in icp_realize()
343 ICPState *icp = ICP(dev); in icp_unrealize()
372 .instance_size = sizeof(ICPState),
[all …]
/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/hw/intc/
H A Dxics.c112 static void icp_check_ipi(ICPState *icp) in icp_check_ipi()
130 void icp_resend(ICPState *icp) in icp_resend()
176 uint32_t icp_accept(ICPState *icp) in icp_accept()
243 ICPState *icp = opaque; in icp_pre_save()
254 ICPState *icp = opaque; in icp_post_load()
280 VMSTATE_UINT8(mfrr, ICPState),
285 void icp_reset(ICPState *icp) in icp_reset()
303 ICPState *icp = ICP(dev); in icp_realize()
342 ICPState *icp = ICP(dev); in icp_unrealize()
371 .instance_size = sizeof(ICPState),
[all …]
/dports/emulators/qemu42/qemu-4.2.1/hw/intc/
H A Dxics.c113 static void icp_check_ipi(ICPState *icp) in icp_check_ipi()
131 void icp_resend(ICPState *icp) in icp_resend()
177 uint32_t icp_accept(ICPState *icp) in icp_accept()
244 ICPState *icp = opaque; in icp_pre_save()
255 ICPState *icp = opaque; in icp_post_load()
281 VMSTATE_UINT8(mfrr, ICPState),
286 void icp_reset(ICPState *icp) in icp_reset()
307 ICPState *icp = ICP(dev); in icp_realize()
366 ICPState *icp = ICP(dev); in icp_unrealize()
387 .instance_size = sizeof(ICPState),
[all …]
H A Dxics_pnv.c36 ICPState *icp = ICP(opaque); in pnv_icp_read()
99 ICPState *icp = ICP(opaque); in pnv_icp_write()
164 ICPState *icp = ICP(dev); in pnv_icp_realize()
/dports/emulators/qemu-utils/qemu-4.2.1/hw/intc/
H A Dxics.c113 static void icp_check_ipi(ICPState *icp) in icp_check_ipi()
131 void icp_resend(ICPState *icp) in icp_resend()
177 uint32_t icp_accept(ICPState *icp) in icp_accept()
244 ICPState *icp = opaque; in icp_pre_save()
255 ICPState *icp = opaque; in icp_post_load()
281 VMSTATE_UINT8(mfrr, ICPState),
286 void icp_reset(ICPState *icp) in icp_reset()
307 ICPState *icp = ICP(dev); in icp_realize()
366 ICPState *icp = ICP(dev); in icp_unrealize()
387 .instance_size = sizeof(ICPState),
[all …]
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/hw/intc/
H A Dxics.c131 static void icp_check_ipi(ICPState *icp) in icp_check_ipi()
149 void icp_resend(ICPState *icp) in icp_resend()
195 uint32_t icp_accept(ICPState *icp) in icp_accept()
262 ICPState *icp = opaque; in icp_dispatch_pre_save()
274 ICPState *icp = opaque; in icp_dispatch_post_load()
292 VMSTATE_UINT32(xirr, ICPState),
294 VMSTATE_UINT8(mfrr, ICPState),
301 ICPState *icp = ICP(dev); in icp_reset()
320 ICPState *icp = ICP(dev); in icp_realize()
367 ICPState *icp = ICP(dev); in icp_unrealize()
[all …]
H A Dxics_pnv.c36 ICPState *icp = ICP(opaque); in pnv_icp_read()
99 ICPState *icp = ICP(opaque); in pnv_icp_write()
164 ICPState *icp = ICP(dev); in pnv_icp_realize()
/dports/www/squid/squid-4.15/src/tests/
H A Dstub_icp.cc22 ICPState::ICPState(icp_common_t &aHeader, HttpRequest *aRequest) STUB
23 ICPState::~ICPState() STUB
/dports/www/squid/squid-4.15/src/
H A DICP.h67 class ICPState
71 ICPState(icp_common_t &aHeader, HttpRequest *aRequest);
72 virtual ~ICPState();

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