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Searched refs:ICR_ADDR4 (Results 1 – 25 of 63) sorted by relevance

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/dports/sysutils/u-boot-chip/u-boot-2021.07/drivers/mtd/nand/raw/
H A Dlpc32xx_nand_mlc.c63 #define ICR_ADDR4 0x00000002 /* configure for 4-word addrs */ macro
129 writel(ICR_LARGE_BLOCKS | ICR_ADDR4, in lpc32xx_nand_init()
/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/drivers/mtd/nand/raw/
H A Dlpc32xx_nand_mlc.c62 #define ICR_ADDR4 0x00000002 /* configure for 4-word addrs */ macro
128 writel(ICR_LARGE_BLOCKS | ICR_ADDR4, in lpc32xx_nand_init()
/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/drivers/mtd/nand/raw/
H A Dlpc32xx_nand_mlc.c62 #define ICR_ADDR4 0x00000002 /* configure for 4-word addrs */ macro
128 writel(ICR_LARGE_BLOCKS | ICR_ADDR4, in lpc32xx_nand_init()
/dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/drivers/mtd/nand/raw/
H A Dlpc32xx_nand_mlc.c63 #define ICR_ADDR4 0x00000002 /* configure for 4-word addrs */ macro
129 writel(ICR_LARGE_BLOCKS | ICR_ADDR4, in lpc32xx_nand_init()
/dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/drivers/mtd/nand/raw/
H A Dlpc32xx_nand_mlc.c63 #define ICR_ADDR4 0x00000002 /* configure for 4-word addrs */ macro
129 writel(ICR_LARGE_BLOCKS | ICR_ADDR4, in lpc32xx_nand_init()
/dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/drivers/mtd/nand/raw/
H A Dlpc32xx_nand_mlc.c63 #define ICR_ADDR4 0x00000002 /* configure for 4-word addrs */ macro
129 writel(ICR_LARGE_BLOCKS | ICR_ADDR4, in lpc32xx_nand_init()
/dports/sysutils/u-boot-olinuxino-lime2-emmc/u-boot-2021.07/drivers/mtd/nand/raw/
H A Dlpc32xx_nand_mlc.c63 #define ICR_ADDR4 0x00000002 /* configure for 4-word addrs */ macro
129 writel(ICR_LARGE_BLOCKS | ICR_ADDR4, in lpc32xx_nand_init()
/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot/drivers/mtd/nand/raw/
H A Dlpc32xx_nand_mlc.c62 #define ICR_ADDR4 0x00000002 /* configure for 4-word addrs */ macro
128 writel(ICR_LARGE_BLOCKS | ICR_ADDR4, in lpc32xx_nand_init()
/dports/sysutils/u-boot-cubieboard2/u-boot-2021.07/drivers/mtd/nand/raw/
H A Dlpc32xx_nand_mlc.c63 #define ICR_ADDR4 0x00000002 /* configure for 4-word addrs */ macro
129 writel(ICR_LARGE_BLOCKS | ICR_ADDR4, in lpc32xx_nand_init()
/dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/drivers/mtd/nand/raw/
H A Dlpc32xx_nand_mlc.c63 #define ICR_ADDR4 0x00000002 /* configure for 4-word addrs */ macro
129 writel(ICR_LARGE_BLOCKS | ICR_ADDR4, in lpc32xx_nand_init()
/dports/sysutils/u-boot-firefly-rk3399/u-boot-2021.07/drivers/mtd/nand/raw/
H A Dlpc32xx_nand_mlc.c63 #define ICR_ADDR4 0x00000002 /* configure for 4-word addrs */ macro
129 writel(ICR_LARGE_BLOCKS | ICR_ADDR4, in lpc32xx_nand_init()
/dports/sysutils/u-boot-sinovoip-bpi-m3/u-boot-2021.07/drivers/mtd/nand/raw/
H A Dlpc32xx_nand_mlc.c63 #define ICR_ADDR4 0x00000002 /* configure for 4-word addrs */ macro
129 writel(ICR_LARGE_BLOCKS | ICR_ADDR4, in lpc32xx_nand_init()
/dports/sysutils/u-boot-a13-olinuxino/u-boot-2021.07/drivers/mtd/nand/raw/
H A Dlpc32xx_nand_mlc.c63 #define ICR_ADDR4 0x00000002 /* configure for 4-word addrs */ macro
129 writel(ICR_LARGE_BLOCKS | ICR_ADDR4, in lpc32xx_nand_init()
/dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/drivers/mtd/nand/raw/
H A Dlpc32xx_nand_mlc.c63 #define ICR_ADDR4 0x00000002 /* configure for 4-word addrs */ macro
129 writel(ICR_LARGE_BLOCKS | ICR_ADDR4, in lpc32xx_nand_init()
/dports/sysutils/u-boot-sopine/u-boot-2021.07/drivers/mtd/nand/raw/
H A Dlpc32xx_nand_mlc.c63 #define ICR_ADDR4 0x00000002 /* configure for 4-word addrs */ macro
129 writel(ICR_LARGE_BLOCKS | ICR_ADDR4, in lpc32xx_nand_init()
/dports/sysutils/u-boot-qemu-arm64/u-boot-2021.07/drivers/mtd/nand/raw/
H A Dlpc32xx_nand_mlc.c63 #define ICR_ADDR4 0x00000002 /* configure for 4-word addrs */ macro
129 writel(ICR_LARGE_BLOCKS | ICR_ADDR4, in lpc32xx_nand_init()
/dports/sysutils/u-boot-rpi/u-boot-2021.07/drivers/mtd/nand/raw/
H A Dlpc32xx_nand_mlc.c63 #define ICR_ADDR4 0x00000002 /* configure for 4-word addrs */ macro
129 writel(ICR_LARGE_BLOCKS | ICR_ADDR4, in lpc32xx_nand_init()
/dports/sysutils/u-boot-nanopi-r4s/u-boot-2021.07/drivers/mtd/nand/raw/
H A Dlpc32xx_nand_mlc.c63 #define ICR_ADDR4 0x00000002 /* configure for 4-word addrs */ macro
129 writel(ICR_LARGE_BLOCKS | ICR_ADDR4, in lpc32xx_nand_init()
/dports/sysutils/u-boot-nanopi-neo/u-boot-2021.07/drivers/mtd/nand/raw/
H A Dlpc32xx_nand_mlc.c63 #define ICR_ADDR4 0x00000002 /* configure for 4-word addrs */ macro
129 writel(ICR_LARGE_BLOCKS | ICR_ADDR4, in lpc32xx_nand_init()
/dports/sysutils/u-boot-nanopi-m1plus/u-boot-2021.07/drivers/mtd/nand/raw/
H A Dlpc32xx_nand_mlc.c63 #define ICR_ADDR4 0x00000002 /* configure for 4-word addrs */ macro
129 writel(ICR_LARGE_BLOCKS | ICR_ADDR4, in lpc32xx_nand_init()
/dports/sysutils/u-boot-beaglebone/u-boot-2021.07/drivers/mtd/nand/raw/
H A Dlpc32xx_nand_mlc.c63 #define ICR_ADDR4 0x00000002 /* configure for 4-word addrs */ macro
129 writel(ICR_LARGE_BLOCKS | ICR_ADDR4, in lpc32xx_nand_init()
/dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot/drivers/mtd/nand/raw/
H A Dlpc32xx_nand_mlc.c62 #define ICR_ADDR4 0x00000002 /* configure for 4-word addrs */ macro
128 writel(ICR_LARGE_BLOCKS | ICR_ADDR4, in lpc32xx_nand_init()
/dports/sysutils/u-boot-clearfog/u-boot-2021.07/drivers/mtd/nand/raw/
H A Dlpc32xx_nand_mlc.c63 #define ICR_ADDR4 0x00000002 /* configure for 4-word addrs */ macro
129 writel(ICR_LARGE_BLOCKS | ICR_ADDR4, in lpc32xx_nand_init()
/dports/sysutils/u-boot-cubieboard/u-boot-2021.07/drivers/mtd/nand/raw/
H A Dlpc32xx_nand_mlc.c63 #define ICR_ADDR4 0x00000002 /* configure for 4-word addrs */ macro
129 writel(ICR_LARGE_BLOCKS | ICR_ADDR4, in lpc32xx_nand_init()
/dports/sysutils/u-boot-pandaboard/u-boot-2021.07/drivers/mtd/nand/raw/
H A Dlpc32xx_nand_mlc.c63 #define ICR_ADDR4 0x00000002 /* configure for 4-word addrs */ macro
129 writel(ICR_LARGE_BLOCKS | ICR_ADDR4, in lpc32xx_nand_init()

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