| /dports/sysutils/u-boot-utilite/u-boot-2015.07/drivers/i2c/ |
| H A D | mv_i2c.c | 67 writel(readl(&base->icr) & ~(ICR_SCLE | ICR_IUE), &base->icr); in i2c_board_init()
110 writel(readl(&base->icr) & ~ICR_IUE, &base->icr); /* disable unit */ in i2c_reset()
113 writel(readl(&base->icr) & ~ICR_IUE, &base->icr); /* disable unit */ in i2c_reset()
120 writel(readl(&base->icr) | ICR_IUE, &base->icr); /* enable unit */ in i2c_reset()
|
| /dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot-sam460ex/arch/arm/cpu/pxa/ |
| H A D | i2c.c | 96 ICR &= ~ICR_IUE; /* disable unit */ in i2c_reset()
99 ICR &= ~ICR_IUE; /* disable unit */ in i2c_reset()
108 ICR |= ICR_IUE; /* enable unit */ in i2c_reset()
|
| /dports/emulators/qemu5/qemu-5.2.0/roms/u-boot-sam460ex/arch/arm/cpu/pxa/ |
| H A D | i2c.c | 96 ICR &= ~ICR_IUE; /* disable unit */ in i2c_reset()
99 ICR &= ~ICR_IUE; /* disable unit */ in i2c_reset()
108 ICR |= ICR_IUE; /* enable unit */ in i2c_reset()
|
| /dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot-sam460ex/arch/arm/cpu/pxa/ |
| H A D | i2c.c | 96 ICR &= ~ICR_IUE; /* disable unit */ in i2c_reset()
99 ICR &= ~ICR_IUE; /* disable unit */ in i2c_reset()
108 ICR |= ICR_IUE; /* enable unit */ in i2c_reset()
|
| /dports/emulators/qemu-powernv/qemu-powernv-3.0.50/roms/u-boot-sam460ex/arch/arm/cpu/pxa/ |
| H A D | i2c.c | 96 ICR &= ~ICR_IUE; /* disable unit */ in i2c_reset()
99 ICR &= ~ICR_IUE; /* disable unit */ in i2c_reset()
108 ICR |= ICR_IUE; /* enable unit */ in i2c_reset()
|
| /dports/emulators/qemu42/qemu-4.2.1/roms/u-boot-sam460ex/arch/arm/cpu/pxa/ |
| H A D | i2c.c | 96 ICR &= ~ICR_IUE; /* disable unit */ in i2c_reset()
99 ICR &= ~ICR_IUE; /* disable unit */ in i2c_reset()
108 ICR |= ICR_IUE; /* enable unit */ in i2c_reset()
|
| /dports/emulators/qemu/qemu-6.2.0/roms/u-boot-sam460ex/arch/arm/cpu/pxa/ |
| H A D | i2c.c | 96 ICR &= ~ICR_IUE; /* disable unit */ in i2c_reset()
99 ICR &= ~ICR_IUE; /* disable unit */ in i2c_reset()
108 ICR |= ICR_IUE; /* enable unit */ in i2c_reset()
|
| /dports/emulators/qemu60/qemu-6.0.0/roms/u-boot-sam460ex/arch/arm/cpu/pxa/ |
| H A D | i2c.c | 96 ICR &= ~ICR_IUE; /* disable unit */ in i2c_reset()
99 ICR &= ~ICR_IUE; /* disable unit */ in i2c_reset()
108 ICR |= ICR_IUE; /* enable unit */ in i2c_reset()
|
| /dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/drivers/i2c/ |
| H A D | mv_i2c.c | 74 writel(readl(&base->icr) & ~ICR_IUE, &base->icr); /* disable unit */ in i2c_reset()
77 writel(readl(&base->icr) & ~ICR_IUE, &base->icr); /* disable unit */ in i2c_reset()
85 writel(readl(&base->icr) | ICR_IUE, &base->icr); /* enable unit */ in i2c_reset()
388 writel(readl(&base->icr) & ~(ICR_SCLE | ICR_IUE), &base->icr); in i2c_board_init()
|
| /dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/drivers/i2c/ |
| H A D | mv_i2c.c | 74 writel(readl(&base->icr) & ~ICR_IUE, &base->icr); /* disable unit */ in i2c_reset()
77 writel(readl(&base->icr) & ~ICR_IUE, &base->icr); /* disable unit */ in i2c_reset()
85 writel(readl(&base->icr) | ICR_IUE, &base->icr); /* enable unit */ in i2c_reset()
388 writel(readl(&base->icr) & ~(ICR_SCLE | ICR_IUE), &base->icr); in i2c_board_init()
|
| /dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/drivers/i2c/ |
| H A D | mv_i2c.c | 76 writel(readl(&base->icr) & ~ICR_IUE, &base->icr); /* disable unit */ in i2c_reset()
79 writel(readl(&base->icr) & ~ICR_IUE, &base->icr); /* disable unit */ in i2c_reset()
87 writel(readl(&base->icr) | ICR_IUE, &base->icr); /* enable unit */ in i2c_reset()
390 writel(readl(&base->icr) & ~(ICR_SCLE | ICR_IUE), &base->icr); in i2c_board_init()
|
| /dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/drivers/i2c/ |
| H A D | mv_i2c.c | 76 writel(readl(&base->icr) & ~ICR_IUE, &base->icr); /* disable unit */ in i2c_reset()
79 writel(readl(&base->icr) & ~ICR_IUE, &base->icr); /* disable unit */ in i2c_reset()
87 writel(readl(&base->icr) | ICR_IUE, &base->icr); /* enable unit */ in i2c_reset()
390 writel(readl(&base->icr) & ~(ICR_SCLE | ICR_IUE), &base->icr); in i2c_board_init()
|
| /dports/sysutils/u-boot-olinuxino-lime2-emmc/u-boot-2021.07/drivers/i2c/ |
| H A D | mv_i2c.c | 76 writel(readl(&base->icr) & ~ICR_IUE, &base->icr); /* disable unit */ in i2c_reset()
79 writel(readl(&base->icr) & ~ICR_IUE, &base->icr); /* disable unit */ in i2c_reset()
87 writel(readl(&base->icr) | ICR_IUE, &base->icr); /* enable unit */ in i2c_reset()
390 writel(readl(&base->icr) & ~(ICR_SCLE | ICR_IUE), &base->icr); in i2c_board_init()
|
| /dports/sysutils/u-boot-chip/u-boot-2021.07/drivers/i2c/ |
| H A D | mv_i2c.c | 76 writel(readl(&base->icr) & ~ICR_IUE, &base->icr); /* disable unit */ in i2c_reset()
79 writel(readl(&base->icr) & ~ICR_IUE, &base->icr); /* disable unit */ in i2c_reset()
87 writel(readl(&base->icr) | ICR_IUE, &base->icr); /* enable unit */ in i2c_reset()
390 writel(readl(&base->icr) & ~(ICR_SCLE | ICR_IUE), &base->icr); in i2c_board_init()
|
| /dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot/drivers/i2c/ |
| H A D | mv_i2c.c | 74 writel(readl(&base->icr) & ~ICR_IUE, &base->icr); /* disable unit */
77 writel(readl(&base->icr) & ~ICR_IUE, &base->icr); /* disable unit */
85 writel(readl(&base->icr) | ICR_IUE, &base->icr); /* enable unit */
388 writel(readl(&base->icr) & ~(ICR_SCLE | ICR_IUE), &base->icr);
|
| /dports/sysutils/u-boot-cubieboard2/u-boot-2021.07/drivers/i2c/ |
| H A D | mv_i2c.c | 76 writel(readl(&base->icr) & ~ICR_IUE, &base->icr); /* disable unit */ in i2c_reset()
79 writel(readl(&base->icr) & ~ICR_IUE, &base->icr); /* disable unit */ in i2c_reset()
87 writel(readl(&base->icr) | ICR_IUE, &base->icr); /* enable unit */ in i2c_reset()
390 writel(readl(&base->icr) & ~(ICR_SCLE | ICR_IUE), &base->icr); in i2c_board_init()
|
| /dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/drivers/i2c/ |
| H A D | mv_i2c.c | 76 writel(readl(&base->icr) & ~ICR_IUE, &base->icr); /* disable unit */ in i2c_reset()
79 writel(readl(&base->icr) & ~ICR_IUE, &base->icr); /* disable unit */ in i2c_reset()
87 writel(readl(&base->icr) | ICR_IUE, &base->icr); /* enable unit */ in i2c_reset()
390 writel(readl(&base->icr) & ~(ICR_SCLE | ICR_IUE), &base->icr); in i2c_board_init()
|
| /dports/sysutils/u-boot-firefly-rk3399/u-boot-2021.07/drivers/i2c/ |
| H A D | mv_i2c.c | 76 writel(readl(&base->icr) & ~ICR_IUE, &base->icr); /* disable unit */ in i2c_reset()
79 writel(readl(&base->icr) & ~ICR_IUE, &base->icr); /* disable unit */ in i2c_reset()
87 writel(readl(&base->icr) | ICR_IUE, &base->icr); /* enable unit */ in i2c_reset()
390 writel(readl(&base->icr) & ~(ICR_SCLE | ICR_IUE), &base->icr); in i2c_board_init()
|
| /dports/sysutils/u-boot-sinovoip-bpi-m3/u-boot-2021.07/drivers/i2c/ |
| H A D | mv_i2c.c | 76 writel(readl(&base->icr) & ~ICR_IUE, &base->icr); /* disable unit */ in i2c_reset()
79 writel(readl(&base->icr) & ~ICR_IUE, &base->icr); /* disable unit */ in i2c_reset()
87 writel(readl(&base->icr) | ICR_IUE, &base->icr); /* enable unit */ in i2c_reset()
390 writel(readl(&base->icr) & ~(ICR_SCLE | ICR_IUE), &base->icr); in i2c_board_init()
|
| /dports/sysutils/u-boot-a13-olinuxino/u-boot-2021.07/drivers/i2c/ |
| H A D | mv_i2c.c | 76 writel(readl(&base->icr) & ~ICR_IUE, &base->icr); /* disable unit */ in i2c_reset()
79 writel(readl(&base->icr) & ~ICR_IUE, &base->icr); /* disable unit */ in i2c_reset()
87 writel(readl(&base->icr) | ICR_IUE, &base->icr); /* enable unit */ in i2c_reset()
390 writel(readl(&base->icr) & ~(ICR_SCLE | ICR_IUE), &base->icr); in i2c_board_init()
|
| /dports/sysutils/u-boot-sopine/u-boot-2021.07/drivers/i2c/ |
| H A D | mv_i2c.c | 76 writel(readl(&base->icr) & ~ICR_IUE, &base->icr); /* disable unit */ in i2c_reset()
79 writel(readl(&base->icr) & ~ICR_IUE, &base->icr); /* disable unit */ in i2c_reset()
87 writel(readl(&base->icr) | ICR_IUE, &base->icr); /* enable unit */ in i2c_reset()
390 writel(readl(&base->icr) & ~(ICR_SCLE | ICR_IUE), &base->icr); in i2c_board_init()
|
| /dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/drivers/i2c/ |
| H A D | mv_i2c.c | 76 writel(readl(&base->icr) & ~ICR_IUE, &base->icr); /* disable unit */ in i2c_reset()
79 writel(readl(&base->icr) & ~ICR_IUE, &base->icr); /* disable unit */ in i2c_reset()
87 writel(readl(&base->icr) | ICR_IUE, &base->icr); /* enable unit */ in i2c_reset()
390 writel(readl(&base->icr) & ~(ICR_SCLE | ICR_IUE), &base->icr); in i2c_board_init()
|
| /dports/sysutils/u-boot-rpi/u-boot-2021.07/drivers/i2c/ |
| H A D | mv_i2c.c | 76 writel(readl(&base->icr) & ~ICR_IUE, &base->icr); /* disable unit */ in i2c_reset()
79 writel(readl(&base->icr) & ~ICR_IUE, &base->icr); /* disable unit */ in i2c_reset()
87 writel(readl(&base->icr) | ICR_IUE, &base->icr); /* enable unit */ in i2c_reset()
390 writel(readl(&base->icr) & ~(ICR_SCLE | ICR_IUE), &base->icr); in i2c_board_init()
|
| /dports/sysutils/u-boot-nanopi-r4s/u-boot-2021.07/drivers/i2c/ |
| H A D | mv_i2c.c | 76 writel(readl(&base->icr) & ~ICR_IUE, &base->icr); /* disable unit */ in i2c_reset()
79 writel(readl(&base->icr) & ~ICR_IUE, &base->icr); /* disable unit */ in i2c_reset()
87 writel(readl(&base->icr) | ICR_IUE, &base->icr); /* enable unit */ in i2c_reset()
390 writel(readl(&base->icr) & ~(ICR_SCLE | ICR_IUE), &base->icr); in i2c_board_init()
|
| /dports/sysutils/u-boot-nanopi-m1plus/u-boot-2021.07/drivers/i2c/ |
| H A D | mv_i2c.c | 76 writel(readl(&base->icr) & ~ICR_IUE, &base->icr); /* disable unit */ in i2c_reset()
79 writel(readl(&base->icr) & ~ICR_IUE, &base->icr); /* disable unit */ in i2c_reset()
87 writel(readl(&base->icr) | ICR_IUE, &base->icr); /* enable unit */ in i2c_reset()
390 writel(readl(&base->icr) & ~(ICR_SCLE | ICR_IUE), &base->icr); in i2c_board_init()
|