1 /*------------------------------------------------------------------------- 2 mc68hc908apxx.h - register declarations for Motorola MC68HC908AP16/32/64 3 4 Copyright (C) 2004, Lucas Loizaga <lucas.loizaga AT ingenieria-inversa.com.ar> 5 6 Based on mc68hc908gp32.h, 7 Written By - Juan Gonzalez <juan AT iearobotics.com> 8 9 This library is free software; you can redistribute it and/or modify it 10 under the terms of the GNU General Public License as published by the 11 Free Software Foundation; either version 2, or (at your option) any 12 later version. 13 14 This library is distributed in the hope that it will be useful, 15 but WITHOUT ANY WARRANTY; without even the implied warranty of 16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 GNU General Public License for more details. 18 19 You should have received a copy of the GNU General Public License 20 along with this library; see the file COPYING. If not, write to the 21 Free Software Foundation, 51 Franklin Street, Fifth Floor, Boston, 22 MA 02110-1301, USA. 23 24 As a special exception, if you link this library with other files, 25 some of which are compiled with SDCC, to produce an executable, 26 this library does not by itself cause the resulting executable to 27 be covered by the GNU General Public License. This exception does 28 not however invalidate any other reasons why the executable file 29 might be covered by the GNU General Public License. 30 -------------------------------------------------------------------------*/ 31 32 #ifndef MC68HC908APXX_H 33 #define MC68HC908APXX_H 34 35 #ifndef _UINT8 36 #define _UINT8 unsigned char 37 #endif 38 #ifndef _UINT16 39 #define _UINT16 unsigned int 40 #endif 41 #ifndef _VOLDATA 42 #define _VOLDATA volatile __data 43 #endif 44 #ifndef _VOLXDATA 45 #define _VOLXDATA volatile __xdata 46 #endif 47 48 struct __hc08_bits 49 { 50 unsigned int bit0:1; 51 unsigned int bit1:1; 52 unsigned int bit2:1; 53 unsigned int bit3:1; 54 unsigned int bit4:1; 55 unsigned int bit5:1; 56 unsigned int bit6:1; 57 unsigned int bit7:1; 58 }; 59 60 61 _VOLDATA _UINT8 __at 0x00 PTA; /* Port A Data Register */ 62 #define PORTA PTA /* Alias for PTA */ 63 #define PTA0 ((struct __hc08_bits *)(&PTA))->bit0 64 #define PTA1 ((struct __hc08_bits *)(&PTA))->bit1 65 #define PTA2 ((struct __hc08_bits *)(&PTA))->bit2 66 #define PTA3 ((struct __hc08_bits *)(&PTA))->bit3 67 #define PTA4 ((struct __hc08_bits *)(&PTA))->bit4 68 #define PTA5 ((struct __hc08_bits *)(&PTA))->bit5 69 #define PTA6 ((struct __hc08_bits *)(&PTA))->bit6 70 #define PTA7 ((struct __hc08_bits *)(&PTA))->bit7 71 72 _VOLDATA _UINT8 __at 0x01 PTB; /* Port B Data Register */ 73 #define PORTB PTB /* Alias for PTB */ 74 #define PTB0 ((struct __hc08_bits *)(&PTB))->bit0 75 #define PTB1 ((struct __hc08_bits *)(&PTB))->bit1 76 #define PTB2 ((struct __hc08_bits *)(&PTB))->bit2 77 #define PTB3 ((struct __hc08_bits *)(&PTB))->bit3 78 #define PTB4 ((struct __hc08_bits *)(&PTB))->bit4 79 #define PTB5 ((struct __hc08_bits *)(&PTB))->bit5 80 #define PTB6 ((struct __hc08_bits *)(&PTB))->bit6 81 #define PTB7 ((struct __hc08_bits *)(&PTB))->bit7 82 83 _VOLDATA _UINT8 __at 0x02 PTC; /* Port C Data Register */ 84 #define PORTC PTC /* Alias for PTC */ 85 #define PTC0 ((struct __hc08_bits *)(&PTC))->bit0 86 #define PTC1 ((struct __hc08_bits *)(&PTC))->bit1 87 #define PTC2 ((struct __hc08_bits *)(&PTC))->bit2 88 #define PTC3 ((struct __hc08_bits *)(&PTC))->bit3 89 #define PTC4 ((struct __hc08_bits *)(&PTC))->bit4 90 #define PTC5 ((struct __hc08_bits *)(&PTC))->bit5 91 #define PTC6 ((struct __hc08_bits *)(&PTC))->bit6 92 #define PTC7 ((struct __hc08_bits *)(&PTC))->bit7 93 94 _VOLDATA _UINT8 __at 0x03 PTD; /* Port D Data Register */ 95 #define PORTD PTD /* Alias for PTD */ 96 #define PTD0 ((struct __hc08_bits *)(&PTD))->bit0 97 #define PTD1 ((struct __hc08_bits *)(&PTD))->bit1 98 #define PTD2 ((struct __hc08_bits *)(&PTD))->bit2 99 #define PTD3 ((struct __hc08_bits *)(&PTD))->bit3 100 #define PTD4 ((struct __hc08_bits *)(&PTD))->bit4 101 #define PTD5 ((struct __hc08_bits *)(&PTD))->bit5 102 #define PTD6 ((struct __hc08_bits *)(&PTD))->bit6 103 #define PTD7 ((struct __hc08_bits *)(&PTD))->bit7 104 105 _VOLDATA _UINT8 __at 0x04 DDRA; /* Data Direction Register A */ 106 #define DDRA0 ((struct __hc08_bits *)(&DDRA))->bit0 107 #define DDRA1 ((struct __hc08_bits *)(&DDRA))->bit1 108 #define DDRA2 ((struct __hc08_bits *)(&DDRA))->bit2 109 #define DDRA3 ((struct __hc08_bits *)(&DDRA))->bit3 110 #define DDRA4 ((struct __hc08_bits *)(&DDRA))->bit4 111 #define DDRA5 ((struct __hc08_bits *)(&DDRA))->bit5 112 #define DDRA6 ((struct __hc08_bits *)(&DDRA))->bit6 113 #define DDRA7 ((struct __hc08_bits *)(&DDRA))->bit7 114 115 _VOLDATA _UINT8 __at 0x05 DDRB; /* Data Direction Register B */ 116 #define DDRB0 ((struct __hc08_bits *)(&DDRB))->bit0 117 #define DDRB1 ((struct __hc08_bits *)(&DDRB))->bit1 118 #define DDRB2 ((struct __hc08_bits *)(&DDRB))->bit2 119 #define DDRB3 ((struct __hc08_bits *)(&DDRB))->bit3 120 #define DDRB4 ((struct __hc08_bits *)(&DDRB))->bit4 121 #define DDRB5 ((struct __hc08_bits *)(&DDRB))->bit5 122 #define DDRB6 ((struct __hc08_bits *)(&DDRB))->bit6 123 #define DDRB7 ((struct __hc08_bits *)(&DDRB))->bit7 124 125 _VOLDATA _UINT8 __at 0x06 DDRC; /* Data Direction Register C */ 126 #define DDRC0 ((struct __hc08_bits *)(&DDRC))->bit0 127 #define DDRC1 ((struct __hc08_bits *)(&DDRC))->bit1 128 #define DDRC2 ((struct __hc08_bits *)(&DDRC))->bit2 129 #define DDRC3 ((struct __hc08_bits *)(&DDRC))->bit3 130 #define DDRC4 ((struct __hc08_bits *)(&DDRC))->bit4 131 #define DDRC5 ((struct __hc08_bits *)(&DDRC))->bit5 132 #define DDRC6 ((struct __hc08_bits *)(&DDRC))->bit6 133 #define DDRC7 ((struct __hc08_bits *)(&DDRC))->bit7 134 135 _VOLDATA _UINT8 __at 0x07 DDRD; /* Data Direction Register D */ 136 #define DDRD0 ((struct __hc08_bits *)(&DDRD))->bit0 137 #define DDRD1 ((struct __hc08_bits *)(&DDRD))->bit1 138 #define DDRD2 ((struct __hc08_bits *)(&DDRD))->bit2 139 #define DDRD3 ((struct __hc08_bits *)(&DDRD))->bit3 140 #define DDRD4 ((struct __hc08_bits *)(&DDRD))->bit4 141 #define DDRD5 ((struct __hc08_bits *)(&DDRD))->bit5 142 #define DDRD6 ((struct __hc08_bits *)(&DDRD))->bit6 143 #define DDRD7 ((struct __hc08_bits *)(&DDRD))->bit7 144 145 _VOLDATA _UINT8 __at 0x0C LEDA; /* PORTA Led Control Register */ 146 #define LEDA0 ((struct __hc08_bits *)(&LEDA))->bit0 147 #define LEDA1 ((struct __hc08_bits *)(&LEDA))->bit1 148 #define LEDA2 ((struct __hc08_bits *)(&LEDA))->bit2 149 #define LEDA3 ((struct __hc08_bits *)(&LEDA))->bit3 150 #define LEDA4 ((struct __hc08_bits *)(&LEDA))->bit4 151 #define LEDA5 ((struct __hc08_bits *)(&LEDA))->bit5 152 #define LEDA6 ((struct __hc08_bits *)(&LEDA))->bit6 153 #define LEDA7 ((struct __hc08_bits *)(&LEDA))->bit7 154 155 _VOLDATA _UINT8 __at 0x10 SPCR; /* SPI Control Register */ 156 #define SPRIE ((struct __hc08_bits *)(&SPCR))->bit7 157 #define DMAS ((struct __hc08_bits *)(&SPCR))->bit6 158 #define SPMSTR ((struct __hc08_bits *)(&SPCR))->bit5 159 #define CPOL ((struct __hc08_bits *)(&SPCR))->bit4 160 #define CPHA ((struct __hc08_bits *)(&SPCR))->bit3 161 #define SPWOM ((struct __hc08_bits *)(&SPCR))->bit2 162 #define SPE ((struct __hc08_bits *)(&SPCR))->bit1 163 #define SPTIE ((struct __hc08_bits *)(&SPCR))->bit0 164 165 _VOLDATA _UINT8 __at 0x11 SPSCR; /* SPI Status and Control Register */ 166 #define SPRF ((struct __hc08_bits *)(&SPSCR))->bit7 167 #define ERRIE ((struct __hc08_bits *)(&SPSCR))->bit6 168 #define OVRF ((struct __hc08_bits *)(&SPSCR))->bit5 169 #define MODF ((struct __hc08_bits *)(&SPSCR))->bit4 170 #define SPTE ((struct __hc08_bits *)(&SPSCR))->bit3 171 #define MODFEN ((struct __hc08_bits *)(&SPSCR))->bit2 172 #define SPR1 ((struct __hc08_bits *)(&SPSCR))->bit1 173 #define SPR0 ((struct __hc08_bits *)(&SPSCR))->bit0 174 175 _VOLDATA _UINT8 __at 0x12 SPDR; /* SPI Data Register */ 176 177 178 _VOLDATA _UINT8 __at 0x13 SCC1; /* SCI Control Register 1 */ 179 #define LOOPS ((struct __hc08_bits *)(&SCC1))->bit7 180 #define ENSCI ((struct __hc08_bits *)(&SCC1))->bit6 181 #define TXINV ((struct __hc08_bits *)(&SCC1))->bit5 182 #define M ((struct __hc08_bits *)(&SCC1))->bit4 183 #define WAKE ((struct __hc08_bits *)(&SCC1))->bit3 184 #define ILTY ((struct __hc08_bits *)(&SCC1))->bit2 185 #define PEN ((struct __hc08_bits *)(&SCC1))->bit1 186 #define PTY ((struct __hc08_bits *)(&SCC1))->bit0 187 188 189 _VOLDATA _UINT8 __at 0x14 SCC2; /* SCI Control Register 2 */ 190 #define SCTIE ((struct __hc08_bits *)(&SCC2))->bit7 191 #define TCIE ((struct __hc08_bits *)(&SCC2))->bit6 192 #define SCRIE ((struct __hc08_bits *)(&SCC2))->bit5 193 #define ILIE ((struct __hc08_bits *)(&SCC2))->bit4 194 #define TE ((struct __hc08_bits *)(&SCC2))->bit3 195 #define RE ((struct __hc08_bits *)(&SCC2))->bit2 196 #define WRU ((struct __hc08_bits *)(&SCC2))->bit1 197 #define SBK ((struct __hc08_bits *)(&SCC2))->bit0 198 199 _VOLDATA _UINT8 __at 0x15 SCC3; /* SCI Control Register 3 */ 200 #define SCC3_R8 ((struct __hc08_bits *)(&SCC3))->bit7 201 #define SCC3_T8 ((struct __hc08_bits *)(&SCC3))->bit6 202 #define DMARE ((struct __hc08_bits *)(&SCC3))->bit5 203 #define DMATE ((struct __hc08_bits *)(&SCC3))->bit4 204 #define ORIE ((struct __hc08_bits *)(&SCC3))->bit3 205 #define NEIE ((struct __hc08_bits *)(&SCC3))->bit2 206 #define FEIE ((struct __hc08_bits *)(&SCC3))->bit1 207 #define PEIE ((struct __hc08_bits *)(&SCC3))->bit0 208 209 _VOLDATA _UINT8 __at 0x16 SCS1; /* SCI Status Register 1 */ 210 #define SCTE ((struct __hc08_bits *)(&SCS1))->bit7 211 #define TC ((struct __hc08_bits *)(&SCS1))->bit6 212 #define SCRF ((struct __hc08_bits *)(&SCS1))->bit5 213 #define IDLE ((struct __hc08_bits *)(&SCS1))->bit4 214 #define OR ((struct __hc08_bits *)(&SCS1))->bit3 215 #define NF ((struct __hc08_bits *)(&SCS1))->bit2 216 #define FE ((struct __hc08_bits *)(&SCS1))->bit1 217 #define PE ((struct __hc08_bits *)(&SCS1))->bit0 218 219 _VOLDATA _UINT8 __at 0x17 SCS2; /* SCI Status Register 2 */ 220 #define RPF ((struct __hc08_bits *)(&SCS2))->bit0 221 #define BKF ((struct __hc08_bits *)(&SCS2))->bit1 222 /* Bits 2-7 not implemented */ 223 224 _VOLDATA _UINT8 __at 0x18 SCDR; /* SCI Data Register */ 225 226 _VOLDATA _UINT8 __at 0x19 SCBR; /* SCI Baud Rate Register */ 227 #define SCP1 ((struct __hc08_bits *)(&SCBR))->bit5 228 #define SCP0 ((struct __hc08_bits *)(&SCBR))->bit4 229 #define R ((struct __hc08_bits *)(&SCBR))->bit3 230 #define SCR2 ((struct __hc08_bits *)(&SCBR))->bit2 231 #define SCR1 ((struct __hc08_bits *)(&SCBR))->bit1 232 #define SCR0 ((struct __hc08_bits *)(&SCBR))->bit0 233 /*-- Bits 6 and 7 do not exist */ 234 235 _VOLDATA _UINT8 __at 0x1a INTKBSCR; /* Keyboard Status and Control Register */ 236 #define KEYF ((struct __hc08_bits *)(&INTKBSCR))->bit3 237 #define ACKK ((struct __hc08_bits *)(&INTKBSCR))->bit2 238 #define IMASKK ((struct __hc08_bits *)(&INTKBSCR))->bit1 239 #define MODEK ((struct __hc08_bits *)(&INTKBSCR))->bit0 240 /*-- Bits 4-7 do not exist */ 241 242 _VOLDATA _UINT8 __at 0x1b INTKBIER; /* Keyboard Interrupt Enable Register */ 243 #define KBIE7 ((struct __hc08_bits *)(&INTKBIER))->bit7 244 #define KBIE6 ((struct __hc08_bits *)(&INTKBIER))->bit6 245 #define KBIE5 ((struct __hc08_bits *)(&INTKBIER))->bit5 246 #define KBIE4 ((struct __hc08_bits *)(&INTKBIER))->bit4 247 #define KBIE3 ((struct __hc08_bits *)(&INTKBIER))->bit3 248 #define KBIE2 ((struct __hc08_bits *)(&INTKBIER))->bit2 249 #define KBIE1 ((struct __hc08_bits *)(&INTKBIER))->bit1 250 #define KBIE0 ((struct __hc08_bits *)(&INTKBIER))->bit0 251 252 _VOLDATA _UINT8 __at 0x1C INTSCR2; /* Keyboard Status and Control Register */ 253 #define PUC0ENB ((struct __hc08_bits *)(&INTSCR2))->bit6 254 #define IRQF2 ((struct __hc08_bits *)(&INTSCR2))->bit3 255 #define ACK2 ((struct __hc08_bits *)(&INTSCR2))->bit2 256 #define IMASK2 ((struct __hc08_bits *)(&INTSCR2))->bit1 257 #define MODE2 ((struct __hc08_bits *)(&INTSCR2))->bit0 258 259 _VOLDATA _UINT8 __at 0x1D CONFIG2; /* Configuration Register 2 */ 260 /* CONFIG2 is one-time writeble, so can't use bitfields */ 261 262 263 _VOLDATA _UINT8 __at 0x1E INTSCR1; /* IRQ status/control */ 264 #define IRQF1 ((struct __hc08_bits *)(&INTSCR1))->bit3 265 #define ACK1 ((struct __hc08_bits *)(&INTSCR1))->bit2 266 #define IMASK1 ((struct __hc08_bits *)(&INTSCR1))->bit1 267 #define MODE1 ((struct __hc08_bits *)(&INTSCR1))->bit0 268 /* Bits 4-7 unimplemented */ 269 270 _VOLDATA _UINT8 __at 0x1f CONFIG1; /* Configuration Register 1 */ 271 /* CONFIG1 is one-time writeable, so can't use bitfields */ 272 273 _VOLDATA _UINT8 __at 0x20 T1SC; /* TIM 1 Status and Control */ 274 #define PS0 ((struct __hc08_bits *)(&T1SC))->bit0 275 #define PS1 ((struct __hc08_bits *)(&T1SC))->bit1 276 #define PS2 ((struct __hc08_bits *)(&T1SC))->bit2 277 #define TRST ((struct __hc08_bits *)(&T1SC))->bit4 278 #define TSTOP ((struct __hc08_bits *)(&T1SC))->bit5 279 #define TOIE ((struct __hc08_bits *)(&T1SC))->bit6 280 #define TOF ((struct __hc08_bits *)(&T1SC))->bit7 281 282 _VOLDATA _UINT16 __at 0x21 T1CNT; /* TIM1 Counter High & Low Registers */ 283 _VOLDATA _UINT8 __at 0x21 T1CNTH; /* TIM1 Counter Register High */ 284 _VOLDATA _UINT8 __at 0x22 T1CNTL; /* TIM1 Counter Register Low */ 285 286 _VOLDATA _UINT16 __at 0x23 T1MOD; /* TIM1 Counter Modulo High & Low Registers */ 287 _VOLDATA _UINT8 __at 0x23 T1MODH; /* TIM1 Counter Modulo Register High */ 288 _VOLDATA _UINT8 __at 0x24 T1MODL; /* TIM1 Counter Modulo Register Low */ 289 290 _VOLDATA _UINT8 __at 0x25 T1SC0; /* TIM1 Channel 0 Status and Control Register */ 291 #define CH0MAX ((struct __hc08_bits *)(&T1SC0))->bit0 292 #define TOV0 ((struct __hc08_bits *)(&T1SC0))->bit1 293 #define ELS0A ((struct __hc08_bits *)(&T1SC0))->bit2 294 #define ELS0B ((struct __hc08_bits *)(&T1SC0))->bit3 295 #define MS0A ((struct __hc08_bits *)(&T1SC0))->bit4 296 #define MS0B ((struct __hc08_bits *)(&T1SC0))->bit5 297 #define CH0IE ((struct __hc08_bits *)(&T1SC0))->bit6 298 #define CH0F ((struct __hc08_bits *)(&T1SC0))->bit7 299 300 _VOLDATA _UINT16 __at 0x26 T1CH0; /* TIM1 Channel 0 High & Low Registers */ 301 _VOLDATA _UINT8 __at 0x26 T1CH0H; /* TIM1 Channel 0 Register High */ 302 _VOLDATA _UINT8 __at 0x27 T1CH0L; /* TIM1 Channel 0 Register Low */ 303 304 _VOLDATA _UINT8 __at 0x28 T1SC1; /* TIM1 Channel 1 Status and Control Register */ 305 #define CH1MAX ((struct __hc08_bits *)(&T1SC1))->bit0 306 #define TOV1 ((struct __hc08_bits *)(&T1SC1))->bit1 307 #define ELS1A ((struct __hc08_bits *)(&T1SC1))->bit2 308 #define ELS1B ((struct __hc08_bits *)(&T1SC1))->bit3 309 #define MS1A ((struct __hc08_bits *)(&T1SC1))->bit4 310 #define CH1IE ((struct __hc08_bits *)(&T1SC1))->bit6 311 #define CH1F ((struct __hc08_bits *)(&T1SC1))->bit7 312 313 _VOLDATA _UINT16 __at 0x29 T1CH1; /* TIM1 Channel 1 High & Low Registers */ 314 _VOLDATA _UINT8 __at 0x29 T1CH1H; /* TIM1 Channel 1 Register High */ 315 _VOLDATA _UINT8 __at 0x2A T1CH1L; /* TIM1 Channel 1 Register Low */ 316 317 /*------------------*/ 318 /* TIM 2 REGISTERS */ 319 /*------------------*/ 320 321 _VOLDATA _UINT8 __at 0x2B T2SC; /* TIM 2 Status and Control */ 322 #define PS0_2 ((struct __hc08_bits *)(&T2SC))->bit0 323 #define PS1_2 ((struct __hc08_bits *)(&T2SC))->bit1 324 #define PS2_2 ((struct __hc08_bits *)(&T2SC))->bit2 325 #define TRST_2 ((struct __hc08_bits *)(&T2SC))->bit4 326 #define TSTOP_2 ((struct __hc08_bits *)(&T2SC))->bit5 327 #define TOIE_2 ((struct __hc08_bits *)(&T2SC))->bit6 328 #define TOF_2 ((struct __hc08_bits *)(&T2SC))->bit7 329 330 _VOLDATA _UINT16 __at 0x2C T2CNT; /* TIM2 Counter High & Low Registers */ 331 _VOLDATA _UINT8 __at 0x2C T2CNTH; /* TIM2 Counter Register High */ 332 _VOLDATA _UINT8 __at 0x2D T2CNTL; /* TIM2 Counter Register Low */ 333 334 _VOLDATA _UINT16 __at 0x2E T2MOD; /* TIM2 Counter Modulo High & Low Registers */ 335 _VOLDATA _UINT8 __at 0x2E T2MODH; /* TIM2 Counter Modulo Register High */ 336 _VOLDATA _UINT8 __at 0x2F T2MODL; /* TIM2 Counter Modulo Register Low */ 337 338 _VOLDATA _UINT8 __at 0x30 T2SC0; /* TIM2 Channel 0 Status and Control Register */ 339 #define CH0MAX_2 ((struct __hc08_bits *)(&T2SC0))->bit0 340 #define TOV0_2 ((struct __hc08_bits *)(&T2SC0))->bit1 341 #define ELS0A_2 ((struct __hc08_bits *)(&T2SC0))->bit2 342 #define ELS0B_2 ((struct __hc08_bits *)(&T2SC0))->bit3 343 #define MS0A_2 ((struct __hc08_bits *)(&T2SC0))->bit4 344 #define MS0B_2 ((struct __hc08_bits *)(&T2SC0))->bit5 345 #define CH0IE_2 ((struct __hc08_bits *)(&T2SC0))->bit6 346 #define CH0F_2 ((struct __hc08_bits *)(&T2SC0))->bit7 347 348 _VOLDATA _UINT16 __at 0x31 T2CH0; /* TIM2 Channel 0 High & Low Registers */ 349 _VOLDATA _UINT8 __at 0x31 T2CH0H; /* TIM2 Channel 0 Register High */ 350 _VOLDATA _UINT8 __at 0x32 T2CH0L; /* TIM2 Channel 0 Register Low */ 351 352 _VOLDATA _UINT8 __at 0x33 T2SC1; /* TIM2 Channel 1 Status and Control Register */ 353 #define CH1MAX_2 ((struct __hc08_bits *)(&T2SC1))->bit0 354 #define TOV1_2 ((struct __hc08_bits *)(&T2SC1))->bit1 355 #define ELS1A_2 ((struct __hc08_bits *)(&T2SC1))->bit2 356 #define ELS1B_2 ((struct __hc08_bits *)(&T2SC1))->bit3 357 #define MS1A_2 ((struct __hc08_bits *)(&T2SC1))->bit4 358 #define CH1IE_2 ((struct __hc08_bits *)(&T2SC1))->bit6 359 #define CH1F_2 ((struct __hc08_bits *)(&T2SC1))->bit7 360 361 _VOLDATA _UINT16 __at 0x34 T2CH1; /* TIM2 Channel 1 High & Low Registers */ 362 _VOLDATA _UINT8 __at 0x34 T2CH1H; /* TIM2 Channel 1 Register High */ 363 _VOLDATA _UINT8 __at 0x35 T2CH1L; /* TIM2 Channel 1 Register Low */ 364 365 _VOLDATA _UINT8 __at 0x36 PCTL; /* PLL Control Register */ 366 #define PLLIE ((struct __hc08_bits *)(&PCTL))->bit7 367 #define PLLF ((struct __hc08_bits *)(&PCTL))->bit6 368 #define PLLON ((struct __hc08_bits *)(&PCTL))->bit5 369 #define BCS ((struct __hc08_bits *)(&PCTL))->bit4 370 #define PRE1 ((struct __hc08_bits *)(&PCTL))->bit3 371 #define PRE0 ((struct __hc08_bits *)(&PCTL))->bit2 372 #define VPR1 ((struct __hc08_bits *)(&PCTL))->bit1 373 #define VPR0 ((struct __hc08_bits *)(&PCTL))->bit0 374 375 _VOLDATA _UINT8 __at 0x37 PBWC; /* PLL Bandwidth Control Register */ 376 #define AUTO ((struct __hc08_bits *)(&PBWC))->bit7 377 #define LOCK ((struct __hc08_bits *)(&PBWC))->bit6 378 #define ACQ ((struct __hc08_bits *)(&PBWC))->bit5 379 /* Bits 1-4, Unimplemented */ 380 /* Bit 0, Reserved */ 381 382 _VOLDATA _UINT8 __at 0x38 PMSH; /* PLL Multiplier Select High */ 383 #define MUL11 ((struct __hc08_bits *)(&PMSH))->bit3 384 #define MUL10 ((struct __hc08_bits *)(&PMSH))->bit2 385 #define MUL9 ((struct __hc08_bits *)(&PMSH))->bit1 386 #define MUL8 ((struct __hc08_bits *)(&PMSH))->bit0 387 /* Bits 4-7 unimplemented */ 388 389 _VOLDATA _UINT8 __at 0x39 PMSL; /* PLL Multiplir Select Low */ 390 #define MUL7 ((struct __hc08_bits *)(&PMSL))->bit7 391 #define MUL6 ((struct __hc08_bits *)(&PMSL))->bit6 392 #define MUL5 ((struct __hc08_bits *)(&PMSL))->bit5 393 #define MUL4 ((struct __hc08_bits *)(&PMSL))->bit4 394 #define MUL3 ((struct __hc08_bits *)(&PMSL))->bit3 395 #define MUL2 ((struct __hc08_bits *)(&PMSL))->bit2 396 #define MUL1 ((struct __hc08_bits *)(&PMSL))->bit1 397 #define MUL0 ((struct __hc08_bits *)(&PMSL))->bit0 398 399 _VOLDATA _UINT8 __at 0x3a PMRS; /* PLL VCO Select Range */ 400 #define VRS7 ((struct __hc08_bits *)(&PMRS))->bit7 401 #define VRS6 ((struct __hc08_bits *)(&PMRS))->bit6 402 #define VRS5 ((struct __hc08_bits *)(&PMRS))->bit5 403 #define VRS4 ((struct __hc08_bits *)(&PMRS))->bit4 404 #define VRS3 ((struct __hc08_bits *)(&PMRS))->bit3 405 #define VRS2 ((struct __hc08_bits *)(&PMRS))->bit2 406 #define VRS1 ((struct __hc08_bits *)(&PMRS))->bit1 407 #define VRS0 ((struct __hc08_bits *)(&PMRS))->bit0 408 409 _VOLDATA _UINT8 __at 0x3b PMDS; /* PLL Reference Divider Select Register */ 410 #define RDS3 ((struct __hc08_bits *)(&PMDS))->bit3 411 #define RDS2 ((struct __hc08_bits *)(&PMDS))->bit2 412 #define RDS1 ((struct __hc08_bits *)(&PMDS))->bit1 413 #define RDS0 ((struct __hc08_bits *)(&PMDS))->bit0 414 /* Bits 4-7 unimplemented */ 415 416 417 418 _VOLDATA _UINT8 __at 0x40 IRSCC1; /* SCI Control Register 1 */ 419 #define LOOPS_IR ((struct __hc08_bits *)(&IRSCC1))->bit7 420 #define ENSCI_IR ((struct __hc08_bits *)(&IRSCC1))->bit6 421 #define TXINV_IR ((struct __hc08_bits *)(&IRSCC1))->bit5 422 #define M_IR ((struct __hc08_bits *)(&IRSCC1))->bit4 423 #define WAKE_IR ((struct __hc08_bits *)(&IRSCC1))->bit3 424 #define ILTY_IR ((struct __hc08_bits *)(&IRSCC1))->bit2 425 #define PEN_IR ((struct __hc08_bits *)(&IRSCC1))->bit1 426 #define PTY_IR ((struct __hc08_bits *)(&IRSCC1))->bit0 427 428 429 _VOLDATA _UINT8 __at 0x41 IRSCC2; /* SCI Control Register 2 */ 430 #define SCTIE_IR ((struct __hc08_bits *)(&IRSCC2))->bit7 431 #define TCIE_IR ((struct __hc08_bits *)(&IRSCC2))->bit6 432 #define SCRIE_IR ((struct __hc08_bits *)(&IRSCC2))->bit5 433 #define ILIE_IR ((struct __hc08_bits *)(&IRSCC2))->bit4 434 #define TE_IR ((struct __hc08_bits *)(&IRSCC2))->bit3 435 #define RE_IR ((struct __hc08_bits *)(&IRSCC2))->bit2 436 #define WRU_IR ((struct __hc08_bits *)(&IRSCC2))->bit1 437 #define SBK_IR ((struct __hc08_bits *)(&IRSCC2))->bit0 438 439 _VOLDATA _UINT8 __at 0x42 IRSCC3; /* SCI Control Register 3 */ 440 #define SCC3_R8_IR ((struct __hc08_bits *)(&IRSCC3))->bit7 441 #define SCC3_T8_IR ((struct __hc08_bits *)(&IRSCC3))->bit6 442 #define DMARE_IR ((struct __hc08_bits *)(&IRSCC3))->bit5 443 #define DMATE_IR ((struct __hc08_bits *)(&IRSCC3))->bit4 444 #define ORIE_IR ((struct __hc08_bits *)(&IRSCC3))->bit3 445 #define NEIE_IR ((struct __hc08_bits *)(&IRSCC3))->bit2 446 #define FEIE_IR ((struct __hc08_bits *)(&IRSCC3))->bit1 447 #define PEIE_IR ((struct __hc08_bits *)(&IRSCC3))->bit0 448 449 _VOLDATA _UINT8 __at 0x43 IRSCS1; /* SCI Status Register 1 */ 450 #define SCTE_IR ((struct __hc08_bits *)(&IRSCS1))->bit7 451 #define TC_IR ((struct __hc08_bits *)(&IRSCS1))->bit6 452 #define SCRF_IR ((struct __hc08_bits *)(&IRSCS1))->bit5 453 #define IDLE_IR ((struct __hc08_bits *)(&IRSCS1))->bit4 454 #define OR_IR ((struct __hc08_bits *)(&IRSCS1))->bit3 455 #define NF_IR ((struct __hc08_bits *)(&IRSCS1))->bit2 456 #define FE_IR ((struct __hc08_bits *)(&IRSCS1))->bit1 457 #define PE_IR ((struct __hc08_bits *)(&IRSCS1))->bit0 458 459 _VOLDATA _UINT8 __at 0x44 IRSCS2; /* SCI Status Register 2 */ 460 #define RPF_IR ((struct __hc08_bits *)(&IRSCS2))->bit0 461 #define BKF_IR ((struct __hc08_bits *)(&IRSCS2))->bit1 462 /* Bits 2-7 not implemented */ 463 464 _VOLDATA _UINT8 __at 0x45 IRSCDR; /* SCI Data Register */ 465 466 _VOLDATA _UINT8 __at 0x46 IRSCBR; /* SCI Baud Rate Register */ 467 #define CKS_IR ((struct __hc08_bits *)(&IRSCBR))->bit7 468 #define SCP1_IR ((struct __hc08_bits *)(&IRSCBR))->bit5 469 #define SCP0_IR ((struct __hc08_bits *)(&IRSCBR))->bit4 470 #define SCR2_IR ((struct __hc08_bits *)(&IRSCBR))->bit2 471 #define SCR1_IR ((struct __hc08_bits *)(&IRSCBR))->bit1 472 #define SCR0_IR ((struct __hc08_bits *)(&IRSCBR))->bit0 473 474 _VOLDATA _UINT8 __at 0x47 IRSCIRCR; /* SCI Baud Rate Register */ 475 #define TNP1_IR ((struct __hc08_bits *)(&IRSCIRCR))->bit2 476 #define TNP0_IR ((struct __hc08_bits *)(&IRSCIRCR))->bit1 477 #define IREN_IR ((struct __hc08_bits *)(&IRSCIRCR))->bit0 478 479 480 481 _VOLDATA _UINT8 __at 0x48 MMADR; /* MMIIC Address Register. */ 482 #define MMAD7 ((struct __hc08_bits *)(&MMADR))->bit7 483 #define MMAD6 ((struct __hc08_bits *)(&MMADR))->bit6 484 #define MMAD5 ((struct __hc08_bits *)(&MMADR))->bit5 485 #define MMAD4 ((struct __hc08_bits *)(&MMADR))->bit4 486 #define MMAD3 ((struct __hc08_bits *)(&MMADR))->bit3 487 #define MMAD2 ((struct __hc08_bits *)(&MMADR))->bit2 488 #define MMAD1 ((struct __hc08_bits *)(&MMADR))->bit1 489 #define MMEXTAD ((struct __hc08_bits *)(&MMADR))->bit0 490 491 492 _VOLDATA _UINT8 __at 0x49 MMCR1; /* MMIIC Control Register 1. */ 493 #define MMEN ((struct __hc08_bits *)(&MMCR1))->bit7 494 #define MMIEN ((struct __hc08_bits *)(&MMCR1))->bit6 495 #define MMCLRBB ((struct __hc08_bits *)(&MMCR1))->bit5 496 #define MMTXAK ((struct __hc08_bits *)(&MMCR1))->bit3 497 #define REPSEN ((struct __hc08_bits *)(&MMCR1))->bit2 498 #define MMCRCBYTE ((struct __hc08_bits *)(&MMCR1))->bit1 499 500 501 _VOLDATA _UINT8 __at 0x4a MMCR2; /* MMIIC Control Register 2. */ 502 #define MMALIF ((struct __hc08_bits *)(&MMCR2))->bit7 503 #define MMNAKIF ((struct __hc08_bits *)(&MMCR2))->bit6 504 #define MMBB ((struct __hc08_bits *)(&MMCR2))->bit5 505 #define MMAST ((struct __hc08_bits *)(&MMCR2))->bit4 506 #define MMRW ((struct __hc08_bits *)(&MMCR2))->bit3 507 #define MMCRCEF ((struct __hc08_bits *)(&MMCR2))->bit0 508 509 510 _VOLDATA _UINT8 __at 0x4B MMSR; /* MMIIC Status Register. */ 511 #define MMRXIF ((struct __hc08_bits *)(&MMSR))->bit7 512 #define MMTXIF ((struct __hc08_bits *)(&MMSR))->bit6 513 #define MMATCH ((struct __hc08_bits *)(&MMSR))->bit5 514 #define MMSRW ((struct __hc08_bits *)(&MMSR))->bit4 515 #define MMRXAK ((struct __hc08_bits *)(&MMSR))->bit3 516 #define MMCRCBF ((struct __hc08_bits *)(&MMSR))->bit2 517 #define MMTXBE ((struct __hc08_bits *)(&MMSR))->bit1 518 #define MMRXBF ((struct __hc08_bits *)(&MMSR))->bit0 519 520 _VOLDATA _UINT8 __at 0x4C MMDTR; /* MMIIC Data Transmit Register */ 521 _VOLDATA _UINT8 __at 0x4D MMDRR; /* MMIIC Data Receive Register */ 522 _VOLDATA _UINT8 __at 0x4E MMCRDR; /* MMIIC CRC Data Register */ 523 524 525 _VOLDATA _UINT8 __at 0x4F MMFDR; /* MMIIC Frecuency Divider Register */ 526 #define MMBR2 ((struct __hc08_bits *)(&MMFDR))->bit2 527 #define MMBR1 ((struct __hc08_bits *)(&MMFDR))->bit1 528 #define MMBR0 ((struct __hc08_bits *)(&MMFDR))->bit0 529 530 531 _VOLDATA _UINT8 __at 0x51 TBCR; /* Time Base Module Control */ 532 #define TBIF ((struct __hc08_bits *)(&TBCR))->bit7 533 #define TBR2 ((struct __hc08_bits *)(&TBCR))->bit6 534 #define TBR1 ((struct __hc08_bits *)(&TBCR))->bit5 535 #define TBR0 ((struct __hc08_bits *)(&TBCR))->bit4 536 #define TACK ((struct __hc08_bits *)(&TBCR))->bit3 537 #define TBIE ((struct __hc08_bits *)(&TBCR))->bit2 538 #define TBON ((struct __hc08_bits *)(&TBCR))->bit1 539 /* Bit 0 Reserved */ 540 541 542 543 _VOLDATA _UINT8 __at 0x57 ADSCR; /* Analog-to-Digital Status and Control Reg. */ 544 #define COCO ((struct __hc08_bits *)(&ADSCR))->bit7 545 #define AIEN ((struct __hc08_bits *)(&ADSCR))->bit6 546 #define ADCO ((struct __hc08_bits *)(&ADSCR))->bit5 547 #define ADCH4 ((struct __hc08_bits *)(&ADSCR))->bit4 548 #define ADCH3 ((struct __hc08_bits *)(&ADSCR))->bit3 549 #define ADCH2 ((struct __hc08_bits *)(&ADSCR))->bit2 550 #define ADCH1 ((struct __hc08_bits *)(&ADSCR))->bit1 551 #define ADCH0 ((struct __hc08_bits *)(&ADSCR))->bit0 552 553 _VOLDATA _UINT8 __at 0x58 ADCLK; /* Analog-to-Digital Clock */ 554 #define ADIV2 ((struct __hc08_bits *)(&ADCLK))->bit7 555 #define ADIV1 ((struct __hc08_bits *)(&ADCLK))->bit6 556 #define ADIV0 ((struct __hc08_bits *)(&ADCLK))->bit5 557 #define ADICLK ((struct __hc08_bits *)(&ADCLK))->bit4 558 #define ADMODE1 ((struct __hc08_bits *)(&ADCLK))->bit3 559 #define ADMODE0 ((struct __hc08_bits *)(&ADCLK))->bit2 560 561 _VOLDATA _UINT8 __at 0x59 ADRH0; /* Analog-to-Digital Data Register */ 562 _VOLDATA _UINT8 __at 0x5a ADRL0; /* Analog-to-Digital Data Register */ 563 _VOLDATA _UINT8 __at 0x5b ADRL1; /* Analog-to-Digital Data Register */ 564 _VOLDATA _UINT8 __at 0x5c ADRL2; /* Analog-to-Digital Data Register */ 565 _VOLDATA _UINT8 __at 0x5d ADRL3; /* Analog-to-Digital Data Register */ 566 567 _VOLDATA _UINT8 __at 0x5e ADASCR; /* ADC Auto Scan Control */ 568 #define ASCAN ((struct __hc08_bits *)(&ADCLK))->bit0 569 #define AUTO0 ((struct __hc08_bits *)(&ADCLK))->bit1 570 #define AUTO1 ((struct __hc08_bits *)(&ADCLK))->bit2 571 572 573 _VOLXDATA _UINT8 __at 0xfe00 SBSR; /* SIM Break Status Register */ 574 #define SBSW ((struct __hc08_bits *)(&SBSR))->bit1 575 576 _VOLXDATA _UINT8 __at 0xfe01 SRSR; /* SIM Reset Status Register */ 577 #define LVI ((struct __hc08_bits *)(&SRSR))->bit1 578 #define MODRST ((struct __hc08_bits *)(&SRSR))->bit2 579 #define ILAD ((struct __hc08_bits *)(&SRSR))->bit3 580 #define ILOP ((struct __hc08_bits *)(&SRSR))->bit4 581 #define COP ((struct __hc08_bits *)(&SRSR))->bit5 582 #define PIN ((struct __hc08_bits *)(&SRSR))->bit6 583 #define POR ((struct __hc08_bits *)(&SRSR))->bit7 584 /* Bit 0 unimplemented */ 585 586 587 _VOLXDATA _UINT8 __at 0xfe03 SBFCR; /* SIM Break Flag Control Register */ 588 #define BFCE ((struct __hc08_bits *)(&BFCR))->bit7 589 590 _VOLXDATA _UINT8 __at 0xfe04 INT1; /* Interrupt Status Register 1 */ 591 #define IF1 ((struct __hc08_bits *)(&INT1))->bit2 592 #define IF2 ((struct __hc08_bits *)(&INT1))->bit3 593 #define IF3 ((struct __hc08_bits *)(&INT1))->bit4 594 #define IF4 ((struct __hc08_bits *)(&INT1))->bit5 595 #define IF5 ((struct __hc08_bits *)(&INT1))->bit6 596 #define IF6 ((struct __hc08_bits *)(&INT1))->bit7 597 /* Bits 0-1 Reserved */ 598 599 _VOLXDATA _UINT8 __at 0xfe05 INT2; /* Interrupt Status Register 2 */ 600 #define IF14 ((struct __hc08_bits *)(&INT2))->bit7 601 #define IF13 ((struct __hc08_bits *)(&INT2))->bit6 602 #define IF12 ((struct __hc08_bits *)(&INT2))->bit5 603 #define IF11 ((struct __hc08_bits *)(&INT2))->bit4 604 #define IF10 ((struct __hc08_bits *)(&INT2))->bit3 605 #define IF9 ((struct __hc08_bits *)(&INT2))->bit2 606 #define IF8 ((struct __hc08_bits *)(&INT2))->bit1 607 #define IF7 ((struct __hc08_bits *)(&INT2))->bit0 608 609 _VOLXDATA _UINT8 __at 0xfe06 INT3; /* Interrupt Status Register 3 */ 610 #define IF21 ((struct __hc08_bits *)(&INT3))->bit6 611 #define IF20 ((struct __hc08_bits *)(&INT3))->bit5 612 #define IF19 ((struct __hc08_bits *)(&INT3))->bit4 613 #define IF18 ((struct __hc08_bits *)(&INT3))->bit3 614 #define IF17 ((struct __hc08_bits *)(&INT3))->bit2 615 #define IF16 ((struct __hc08_bits *)(&INT3))->bit1 616 #define IF15 ((struct __hc08_bits *)(&INT3))->bit0 617 618 _VOLXDATA _UINT8 __at 0xfe08 FLCR; /* FLASH Control Register */ 619 #define PGM ((struct __hc08_bits *)(&FLCR))->bit0 620 #define ERASE ((struct __hc08_bits *)(&FLCR))->bit1 621 #define MASS ((struct __hc08_bits *)(&FLCR))->bit2 622 #define HVEN ((struct __hc08_bits *)(&FLCR))->bit3 623 624 625 _VOLXDATA _UINT8 __at 0xfe09 FLBPR; /* FLASH Block Protect Register */ 626 #define BPR0 ((struct __hc08_bits *)(&FLBPR))->bit0 627 #define BPR1 ((struct __hc08_bits *)(&FLBPR))->bit1 628 #define BPR2 ((struct __hc08_bits *)(&FLBPR))->bit2 629 #define BPR3 ((struct __hc08_bits *)(&FLBPR))->bit3 630 #define BPR4 ((struct __hc08_bits *)(&FLBPR))->bit4 631 #define BPR5 ((struct __hc08_bits *)(&FLBPR))->bit5 632 #define BPR6 ((struct __hc08_bits *)(&FLBPR))->bit6 633 #define BPR7 ((struct __hc08_bits *)(&FLBPR))->bit7 634 635 636 _VOLXDATA _UINT16 __at 0xfe0C BRK; /* Break Address High & Low Registers */ 637 _VOLXDATA _UINT8 __at 0xfe0C BRKH; /* Break Address High Register */ 638 _VOLXDATA _UINT8 __at 0xfe0D BRKL; /* Break Address Low Register */ 639 640 _VOLXDATA _UINT8 __at 0xfe0b BRKSCR; /* Break Status and Control Register */ 641 #define BRKA ((struct __hc08_bits *)(&BRKSCR))->bit6 642 #define BRKE ((struct __hc08_bits *)(&BRKSCR))->bit7 643 644 _VOLXDATA _UINT8 __at 0xfe0c LVISR; /* Low voltage detect */ 645 #define LVIOUT ((struct __hc08_bits *)(&LVISR))->bit7 646 647 648 _VOLXDATA _UINT8 __at 0xffff COPCTL; /* COP Control Register */ 649 650 #endif 651