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Searched refs:IMM4 (Results 1 – 25 of 138) sorted by relevance

123456

/dports/lang/gnatdroid-binutils-x86/binutils-2.27/opcodes/
H A Dh8500-opc.h140 #define IMM4 34 macro
229 {12,'-','I','!','!',O_TRAPA|O_UNSZ,"trapa",1,{IMM4,0},2, {{0x08,0xff,0 },{0x10,0xf0,IMM4 }}},
1161 {139,'b','E','I','E',O_BTST|O_WORD,"btst.w",2,{IMM4,RN},2, {{0xa8,0xf8,RN },{0xf0,0xf0,IMM4 }}},
1172 {140,'b','E','I','E',O_BTST|O_BYTE,"btst.b",2,{IMM4,RN},2, {{0xa0,0xf8,RN },{0xf0,0xf0,IMM4 }}},
1192 {141,'b','E','I','E',O_BTST|O_UNSZ,"btst",2,{IMM4,RN},2, {{0xa8,0xf8,RN },{0xf0,0xf0,IMM4 }}},
1212 {148,'b','E','I','E',O_BSET|O_WORD,"bset.w",2,{IMM4,RN},2, {{0xa8,0xf8,RN },{0xc0,0xf0,IMM4 }}},
1228 {149,'b','E','I','E',O_BSET|O_BYTE,"bset.b",2,{IMM4,RN},2, {{0xa0,0xf8,RN },{0xc0,0xf0,IMM4 }}},
1243 {150,'b','E','I','E',O_BSET|O_UNSZ,"bset",2,{IMM4,RN},2, {{0xa8,0xf8,RN },{0xc0,0xf0,IMM4 }}},
1306 {163,'b','E','I','E',O_BNOT|O_UNSZ,"bnot",2,{IMM4,RN},2, {{0xa8,0xf8,RN },{0xe0,0xf0,IMM4 }}},
1410 {205,'b','E','I','E',O_BCLR|O_UNSZ,"bclr",2,{IMM4,RN},2, {{0xa8,0xf8,RN },{0xd0,0xf0,IMM4 }}},
[all …]
/dports/devel/zpu-gcc/zpu-toolchain-1.0/toolchain/binutils/opcodes/
H A Dh8500-opc.h140 #define IMM4 34 macro
229 {12,'-','I','!','!',O_TRAPA|O_UNSZ,"trapa",1,{IMM4,0},2, {{0x08,0xff,0 },{0x10,0xf0,IMM4 }}},
1161 {139,'b','E','I','E',O_BTST|O_WORD,"btst.w",2,{IMM4,RN},2, {{0xa8,0xf8,RN },{0xf0,0xf0,IMM4 }}},
1172 {140,'b','E','I','E',O_BTST|O_BYTE,"btst.b",2,{IMM4,RN},2, {{0xa0,0xf8,RN },{0xf0,0xf0,IMM4 }}},
1192 {141,'b','E','I','E',O_BTST|O_UNSZ,"btst",2,{IMM4,RN},2, {{0xa8,0xf8,RN },{0xf0,0xf0,IMM4 }}},
1212 {148,'b','E','I','E',O_BSET|O_WORD,"bset.w",2,{IMM4,RN},2, {{0xa8,0xf8,RN },{0xc0,0xf0,IMM4 }}},
1228 {149,'b','E','I','E',O_BSET|O_BYTE,"bset.b",2,{IMM4,RN},2, {{0xa0,0xf8,RN },{0xc0,0xf0,IMM4 }}},
1243 {150,'b','E','I','E',O_BSET|O_UNSZ,"bset",2,{IMM4,RN},2, {{0xa8,0xf8,RN },{0xc0,0xf0,IMM4 }}},
1306 {163,'b','E','I','E',O_BNOT|O_UNSZ,"bnot",2,{IMM4,RN},2, {{0xa8,0xf8,RN },{0xe0,0xf0,IMM4 }}},
1410 {205,'b','E','I','E',O_BCLR|O_UNSZ,"bclr",2,{IMM4,RN},2, {{0xa8,0xf8,RN },{0xd0,0xf0,IMM4 }}},
[all …]
/dports/devel/avr-gdb/gdb-7.3.1/opcodes/
H A Dh8500-opc.h140 #define IMM4 34 macro
229 {12,'-','I','!','!',O_TRAPA|O_UNSZ,"trapa",1,{IMM4,0},2, {{0x08,0xff,0 },{0x10,0xf0,IMM4 }}},
1161 {139,'b','E','I','E',O_BTST|O_WORD,"btst.w",2,{IMM4,RN},2, {{0xa8,0xf8,RN },{0xf0,0xf0,IMM4 }}},
1172 {140,'b','E','I','E',O_BTST|O_BYTE,"btst.b",2,{IMM4,RN},2, {{0xa0,0xf8,RN },{0xf0,0xf0,IMM4 }}},
1192 {141,'b','E','I','E',O_BTST|O_UNSZ,"btst",2,{IMM4,RN},2, {{0xa8,0xf8,RN },{0xf0,0xf0,IMM4 }}},
1212 {148,'b','E','I','E',O_BSET|O_WORD,"bset.w",2,{IMM4,RN},2, {{0xa8,0xf8,RN },{0xc0,0xf0,IMM4 }}},
1228 {149,'b','E','I','E',O_BSET|O_BYTE,"bset.b",2,{IMM4,RN},2, {{0xa0,0xf8,RN },{0xc0,0xf0,IMM4 }}},
1243 {150,'b','E','I','E',O_BSET|O_UNSZ,"bset",2,{IMM4,RN},2, {{0xa8,0xf8,RN },{0xc0,0xf0,IMM4 }}},
1306 {163,'b','E','I','E',O_BNOT|O_UNSZ,"bnot",2,{IMM4,RN},2, {{0xa8,0xf8,RN },{0xe0,0xf0,IMM4 }}},
1410 {205,'b','E','I','E',O_BCLR|O_UNSZ,"bclr",2,{IMM4,RN},2, {{0xa8,0xf8,RN },{0xd0,0xf0,IMM4 }}},
[all …]
/dports/lang/gnatdroid-binutils/binutils-2.27/opcodes/
H A Dh8500-opc.h140 #define IMM4 34 macro
229 {12,'-','I','!','!',O_TRAPA|O_UNSZ,"trapa",1,{IMM4,0},2, {{0x08,0xff,0 },{0x10,0xf0,IMM4 }}},
1161 {139,'b','E','I','E',O_BTST|O_WORD,"btst.w",2,{IMM4,RN},2, {{0xa8,0xf8,RN },{0xf0,0xf0,IMM4 }}},
1172 {140,'b','E','I','E',O_BTST|O_BYTE,"btst.b",2,{IMM4,RN},2, {{0xa0,0xf8,RN },{0xf0,0xf0,IMM4 }}},
1192 {141,'b','E','I','E',O_BTST|O_UNSZ,"btst",2,{IMM4,RN},2, {{0xa8,0xf8,RN },{0xf0,0xf0,IMM4 }}},
1212 {148,'b','E','I','E',O_BSET|O_WORD,"bset.w",2,{IMM4,RN},2, {{0xa8,0xf8,RN },{0xc0,0xf0,IMM4 }}},
1228 {149,'b','E','I','E',O_BSET|O_BYTE,"bset.b",2,{IMM4,RN},2, {{0xa0,0xf8,RN },{0xc0,0xf0,IMM4 }}},
1243 {150,'b','E','I','E',O_BSET|O_UNSZ,"bset",2,{IMM4,RN},2, {{0xa8,0xf8,RN },{0xc0,0xf0,IMM4 }}},
1306 {163,'b','E','I','E',O_BNOT|O_UNSZ,"bnot",2,{IMM4,RN},2, {{0xa8,0xf8,RN },{0xe0,0xf0,IMM4 }}},
1410 {205,'b','E','I','E',O_BCLR|O_UNSZ,"bclr",2,{IMM4,RN},2, {{0xa8,0xf8,RN },{0xd0,0xf0,IMM4 }}},
[all …]
/dports/devel/gdb761/gdb-7.6.1/opcodes/
H A Dh8500-opc.h140 #define IMM4 34 macro
229 {12,'-','I','!','!',O_TRAPA|O_UNSZ,"trapa",1,{IMM4,0},2, {{0x08,0xff,0 },{0x10,0xf0,IMM4 }}},
1161 {139,'b','E','I','E',O_BTST|O_WORD,"btst.w",2,{IMM4,RN},2, {{0xa8,0xf8,RN },{0xf0,0xf0,IMM4 }}},
1172 {140,'b','E','I','E',O_BTST|O_BYTE,"btst.b",2,{IMM4,RN},2, {{0xa0,0xf8,RN },{0xf0,0xf0,IMM4 }}},
1192 {141,'b','E','I','E',O_BTST|O_UNSZ,"btst",2,{IMM4,RN},2, {{0xa8,0xf8,RN },{0xf0,0xf0,IMM4 }}},
1212 {148,'b','E','I','E',O_BSET|O_WORD,"bset.w",2,{IMM4,RN},2, {{0xa8,0xf8,RN },{0xc0,0xf0,IMM4 }}},
1228 {149,'b','E','I','E',O_BSET|O_BYTE,"bset.b",2,{IMM4,RN},2, {{0xa0,0xf8,RN },{0xc0,0xf0,IMM4 }}},
1243 {150,'b','E','I','E',O_BSET|O_UNSZ,"bset",2,{IMM4,RN},2, {{0xa8,0xf8,RN },{0xc0,0xf0,IMM4 }}},
1306 {163,'b','E','I','E',O_BNOT|O_UNSZ,"bnot",2,{IMM4,RN},2, {{0xa8,0xf8,RN },{0xe0,0xf0,IMM4 }}},
1410 {205,'b','E','I','E',O_BCLR|O_UNSZ,"bclr",2,{IMM4,RN},2, {{0xa8,0xf8,RN },{0xd0,0xf0,IMM4 }}},
[all …]
/dports/devel/tigcc/tigcc-0.96.b8_10/gnu/binutils-2.16.1/opcodes/
H A Dh8500-opc.h140 #define IMM4 34 macro
229 {12,'-','I','!','!',O_TRAPA|O_UNSZ,"trapa",1,{IMM4,0},2, {{0x08,0xff,0 },{0x10,0xf0,IMM4 }}},
1161 {139,'b','E','I','E',O_BTST|O_WORD,"btst.w",2,{IMM4,RN},2, {{0xa8,0xf8,RN },{0xf0,0xf0,IMM4 }}},
1172 {140,'b','E','I','E',O_BTST|O_BYTE,"btst.b",2,{IMM4,RN},2, {{0xa0,0xf8,RN },{0xf0,0xf0,IMM4 }}},
1192 {141,'b','E','I','E',O_BTST|O_UNSZ,"btst",2,{IMM4,RN},2, {{0xa8,0xf8,RN },{0xf0,0xf0,IMM4 }}},
1212 {148,'b','E','I','E',O_BSET|O_WORD,"bset.w",2,{IMM4,RN},2, {{0xa8,0xf8,RN },{0xc0,0xf0,IMM4 }}},
1228 {149,'b','E','I','E',O_BSET|O_BYTE,"bset.b",2,{IMM4,RN},2, {{0xa0,0xf8,RN },{0xc0,0xf0,IMM4 }}},
1243 {150,'b','E','I','E',O_BSET|O_UNSZ,"bset",2,{IMM4,RN},2, {{0xa8,0xf8,RN },{0xc0,0xf0,IMM4 }}},
1306 {163,'b','E','I','E',O_BNOT|O_UNSZ,"bnot",2,{IMM4,RN},2, {{0xa8,0xf8,RN },{0xe0,0xf0,IMM4 }}},
1410 {205,'b','E','I','E',O_BCLR|O_UNSZ,"bclr",2,{IMM4,RN},2, {{0xa8,0xf8,RN },{0xd0,0xf0,IMM4 }}},
[all …]
/dports/devel/zpu-binutils/zpu-toolchain-1.0/toolchain/binutils/opcodes/
H A Dh8500-opc.h140 #define IMM4 34 macro
229 {12,'-','I','!','!',O_TRAPA|O_UNSZ,"trapa",1,{IMM4,0},2, {{0x08,0xff,0 },{0x10,0xf0,IMM4 }}},
1161 {139,'b','E','I','E',O_BTST|O_WORD,"btst.w",2,{IMM4,RN},2, {{0xa8,0xf8,RN },{0xf0,0xf0,IMM4 }}},
1172 {140,'b','E','I','E',O_BTST|O_BYTE,"btst.b",2,{IMM4,RN},2, {{0xa0,0xf8,RN },{0xf0,0xf0,IMM4 }}},
1192 {141,'b','E','I','E',O_BTST|O_UNSZ,"btst",2,{IMM4,RN},2, {{0xa8,0xf8,RN },{0xf0,0xf0,IMM4 }}},
1212 {148,'b','E','I','E',O_BSET|O_WORD,"bset.w",2,{IMM4,RN},2, {{0xa8,0xf8,RN },{0xc0,0xf0,IMM4 }}},
1228 {149,'b','E','I','E',O_BSET|O_BYTE,"bset.b",2,{IMM4,RN},2, {{0xa0,0xf8,RN },{0xc0,0xf0,IMM4 }}},
1243 {150,'b','E','I','E',O_BSET|O_UNSZ,"bset",2,{IMM4,RN},2, {{0xa8,0xf8,RN },{0xc0,0xf0,IMM4 }}},
1306 {163,'b','E','I','E',O_BNOT|O_UNSZ,"bnot",2,{IMM4,RN},2, {{0xa8,0xf8,RN },{0xe0,0xf0,IMM4 }}},
1410 {205,'b','E','I','E',O_BCLR|O_UNSZ,"bclr",2,{IMM4,RN},2, {{0xa8,0xf8,RN },{0xd0,0xf0,IMM4 }}},
[all …]
/dports/devel/djgpp-binutils/binutils-2.17/opcodes/
H A Dh8500-opc.h140 #define IMM4 34 macro
229 {12,'-','I','!','!',O_TRAPA|O_UNSZ,"trapa",1,{IMM4,0},2, {{0x08,0xff,0 },{0x10,0xf0,IMM4 }}},
1161 {139,'b','E','I','E',O_BTST|O_WORD,"btst.w",2,{IMM4,RN},2, {{0xa8,0xf8,RN },{0xf0,0xf0,IMM4 }}},
1172 {140,'b','E','I','E',O_BTST|O_BYTE,"btst.b",2,{IMM4,RN},2, {{0xa0,0xf8,RN },{0xf0,0xf0,IMM4 }}},
1192 {141,'b','E','I','E',O_BTST|O_UNSZ,"btst",2,{IMM4,RN},2, {{0xa8,0xf8,RN },{0xf0,0xf0,IMM4 }}},
1212 {148,'b','E','I','E',O_BSET|O_WORD,"bset.w",2,{IMM4,RN},2, {{0xa8,0xf8,RN },{0xc0,0xf0,IMM4 }}},
1228 {149,'b','E','I','E',O_BSET|O_BYTE,"bset.b",2,{IMM4,RN},2, {{0xa0,0xf8,RN },{0xc0,0xf0,IMM4 }}},
1243 {150,'b','E','I','E',O_BSET|O_UNSZ,"bset",2,{IMM4,RN},2, {{0xa8,0xf8,RN },{0xc0,0xf0,IMM4 }}},
1306 {163,'b','E','I','E',O_BNOT|O_UNSZ,"bnot",2,{IMM4,RN},2, {{0xa8,0xf8,RN },{0xe0,0xf0,IMM4 }}},
1410 {205,'b','E','I','E',O_BCLR|O_UNSZ,"bclr",2,{IMM4,RN},2, {{0xa8,0xf8,RN },{0xd0,0xf0,IMM4 }}},
[all …]
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/test/MC/AArch64/
H A Dshift_extend_op_w_symbol.s10 .equ IMM4, 4 define
15 add w4, w5, w6, uxth #IMM4
17 add w7, w8, w9, uxtw #IMM4
18 add x1, x2, x3, uxtx #IMM4
27 add w4, w5, w6, sxth #IMM4
30 add x1, x2, x3, sxtx #IMM4
/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/test/MC/AArch64/
H A Dshift_extend_op_w_symbol.s10 .equ IMM4, 4 define
15 add w4, w5, w6, uxth #IMM4
17 add w7, w8, w9, uxtw #IMM4
18 add x1, x2, x3, uxtx #IMM4
27 add w4, w5, w6, sxth #IMM4
30 add x1, x2, x3, sxtx #IMM4
/dports/devel/llvm10/llvm-10.0.1.src/test/MC/AArch64/
H A Dshift_extend_op_w_symbol.s10 .equ IMM4, 4 define
15 add w4, w5, w6, uxth #IMM4
17 add w7, w8, w9, uxtw #IMM4
18 add x1, x2, x3, uxtx #IMM4
27 add w4, w5, w6, sxth #IMM4
30 add x1, x2, x3, sxtx #IMM4
/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/MC/AArch64/
H A Dshift_extend_op_w_symbol.s10 .equ IMM4, 4 define
15 add w4, w5, w6, uxth #IMM4
17 add w7, w8, w9, uxtw #IMM4
18 add x1, x2, x3, uxtx #IMM4
27 add w4, w5, w6, sxth #IMM4
30 add x1, x2, x3, sxtx #IMM4
/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/test/MC/AArch64/
H A Dshift_extend_op_w_symbol.s10 .equ IMM4, 4 define
15 add w4, w5, w6, uxth #IMM4
17 add w7, w8, w9, uxtw #IMM4
18 add x1, x2, x3, uxtx #IMM4
27 add w4, w5, w6, sxth #IMM4
30 add x1, x2, x3, sxtx #IMM4
/dports/devel/llvm11/llvm-11.0.1.src/test/MC/AArch64/
H A Dshift_extend_op_w_symbol.s10 .equ IMM4, 4 define
15 add w4, w5, w6, uxth #IMM4
17 add w7, w8, w9, uxtw #IMM4
18 add x1, x2, x3, uxtx #IMM4
27 add w4, w5, w6, sxth #IMM4
30 add x1, x2, x3, sxtx #IMM4
/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/test/MC/AArch64/
H A Dshift_extend_op_w_symbol.s10 .equ IMM4, 4 define
15 add w4, w5, w6, uxth #IMM4
17 add w7, w8, w9, uxtw #IMM4
18 add x1, x2, x3, uxtx #IMM4
27 add w4, w5, w6, sxth #IMM4
30 add x1, x2, x3, sxtx #IMM4
/dports/devel/llvm90/llvm-9.0.1.src/test/MC/AArch64/
H A Dshift_extend_op_w_symbol.s10 .equ IMM4, 4 define
15 add w4, w5, w6, uxth #IMM4
17 add w7, w8, w9, uxtw #IMM4
18 add x1, x2, x3, uxtx #IMM4
27 add w4, w5, w6, sxth #IMM4
30 add x1, x2, x3, sxtx #IMM4
/dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/test/MC/AArch64/
H A Dshift_extend_op_w_symbol.s10 .equ IMM4, 4 define
15 add w4, w5, w6, uxth #IMM4
17 add w7, w8, w9, uxtw #IMM4
18 add x1, x2, x3, uxtx #IMM4
27 add w4, w5, w6, sxth #IMM4
30 add x1, x2, x3, sxtx #IMM4
/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/test/MC/AArch64/
H A Dshift_extend_op_w_symbol.s10 .equ IMM4, 4 define
15 add w4, w5, w6, uxth #IMM4
17 add w7, w8, w9, uxtw #IMM4
18 add x1, x2, x3, uxtx #IMM4
27 add w4, w5, w6, sxth #IMM4
30 add x1, x2, x3, sxtx #IMM4
/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/test/MC/AArch64/
H A Dshift_extend_op_w_symbol.s10 .equ IMM4, 4 define
15 add w4, w5, w6, uxth #IMM4
17 add w7, w8, w9, uxtw #IMM4
18 add x1, x2, x3, uxtx #IMM4
27 add w4, w5, w6, sxth #IMM4
30 add x1, x2, x3, sxtx #IMM4
/dports/devel/llvm80/llvm-8.0.1.src/test/MC/AArch64/
H A Dshift_extend_op_w_symbol.s10 .equ IMM4, 4 define
15 add w4, w5, w6, uxth #IMM4
17 add w7, w8, w9, uxtw #IMM4
18 add x1, x2, x3, uxtx #IMM4
27 add w4, w5, w6, sxth #IMM4
30 add x1, x2, x3, sxtx #IMM4
/dports/graphics/llvm-mesa/llvm-13.0.1.src/test/MC/AArch64/
H A Dshift_extend_op_w_symbol.s10 .equ IMM4, 4 define
15 add w4, w5, w6, uxth #IMM4
17 add w7, w8, w9, uxtw #IMM4
18 add x1, x2, x3, uxtx #IMM4
27 add w4, w5, w6, sxth #IMM4
30 add x1, x2, x3, sxtx #IMM4
/dports/devel/llvm70/llvm-7.0.1.src/test/MC/AArch64/
H A Dshift_extend_op_w_symbol.s10 .equ IMM4, 4 define
15 add w4, w5, w6, uxth #IMM4
17 add w7, w8, w9, uxtw #IMM4
18 add x1, x2, x3, uxtx #IMM4
27 add w4, w5, w6, sxth #IMM4
30 add x1, x2, x3, sxtx #IMM4
/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/test/MC/AArch64/
H A Dshift_extend_op_w_symbol.s10 .equ IMM4, 4 define
15 add w4, w5, w6, uxth #IMM4
17 add w7, w8, w9, uxtw #IMM4
18 add x1, x2, x3, uxtx #IMM4
27 add w4, w5, w6, sxth #IMM4
30 add x1, x2, x3, sxtx #IMM4
/dports/devel/avr-gdb/gdb-7.3.1/sim/mn10300/
H A Dam33.igen5224 temp >>= IMM4;
5450 temp >>= IMM4;
5717 temp >>= IMM4;
5993 temp >>= IMM4;
6259 temp >>= IMM4;
6473 temp >>= IMM4;
6726 temp >>= IMM4;
6988 temp >>= IMM4;
7260 temp >>= IMM4;
7588 temp >>= IMM4;
[all …]
/dports/devel/gdb761/gdb-7.6.1/sim/mn10300/
H A Dam33.igen5224 temp >>= IMM4;
5450 temp >>= IMM4;
5717 temp >>= IMM4;
5993 temp >>= IMM4;
6259 temp >>= IMM4;
6473 temp >>= IMM4;
6726 temp >>= IMM4;
6988 temp >>= IMM4;
7260 temp >>= IMM4;
7588 temp >>= IMM4;
[all …]

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