/dports/devel/tinygo/tinygo-0.14.1/src/device/riscv/ |
H A D | csr.go | 80 INSTRETH CSR = 0xC82 // Upper 32 bits of INSTRET, RV32I only. const
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/dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/lib/Target/RISCV/ |
H A D | RISCVSystemOperands.td | 118 def INSTRETH : SysReg<"instreth", 0xC82>;
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H A D | RISCVInstrInfo.td | 659 def : InstAlias<"rdinstreth $rd", (CSRRS GPR:$rd, INSTRETH.Encoding, X0)>;
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/dports/devel/llvm10/llvm-10.0.1.src/lib/Target/RISCV/ |
H A D | RISCVSystemOperands.td | 118 def INSTRETH : SysReg<"instreth", 0xC82>;
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H A D | RISCVInstrInfo.td | 659 def : InstAlias<"rdinstreth $rd", (CSRRS GPR:$rd, INSTRETH.Encoding, X0)>;
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/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/ |
H A D | RISCVSystemOperands.td | 118 def INSTRETH : SysReg<"instreth", 0xC82>;
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H A D | RISCVInstrInfo.td | 659 def : InstAlias<"rdinstreth $rd", (CSRRS GPR:$rd, INSTRETH.Encoding, X0)>;
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/dports/devel/llvm90/llvm-9.0.1.src/lib/Target/RISCV/ |
H A D | RISCVSystemOperands.td | 118 def INSTRETH : SysReg<"instreth", 0xC82>;
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H A D | RISCVInstrInfo.td | 627 def : InstAlias<"rdinstreth $rd", (CSRRS GPR:$rd, INSTRETH.Encoding, X0)>;
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/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/lib/Target/RISCV/ |
H A D | RISCVSystemOperands.td | 125 def INSTRETH : SysReg<"instreth", 0xC82>;
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H A D | RISCVInstrInfo.td | 716 def : InstAlias<"rdinstreth $rd", (CSRRS GPR:$rd, INSTRETH.Encoding, X0)>;
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/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/lib/Target/RISCV/ |
H A D | RISCVSystemOperands.td | 125 def INSTRETH : SysReg<"instreth", 0xC82>;
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H A D | RISCVInstrInfo.td | 711 def : InstAlias<"rdinstreth $rd", (CSRRS GPR:$rd, INSTRETH.Encoding, X0)>;
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/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/lib/Target/RISCV/ |
H A D | RISCVSystemOperands.td | 138 def INSTRETH : SysReg<"instreth", 0xC82>;
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/dports/graphics/llvm-mesa/llvm-13.0.1.src/lib/Target/RISCV/ |
H A D | RISCVSystemOperands.td | 138 def INSTRETH : SysReg<"instreth", 0xC82>;
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/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/lib/Target/RISCV/ |
H A D | RISCVSystemOperands.td | 125 def INSTRETH : SysReg<"instreth", 0xC82>;
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H A D | RISCVInstrInfo.td | 734 def : InstAlias<"rdinstreth $rd", (CSRRS GPR:$rd, INSTRETH.Encoding, X0)>;
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/dports/devel/llvm11/llvm-11.0.1.src/lib/Target/RISCV/ |
H A D | RISCVSystemOperands.td | 125 def INSTRETH : SysReg<"instreth", 0xC82>;
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H A D | RISCVInstrInfo.td | 703 def : InstAlias<"rdinstreth $rd", (CSRRS GPR:$rd, INSTRETH.Encoding, X0)>;
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/dports/lang/rust/rustc-1.58.1-src/src/llvm-project/llvm/lib/Target/RISCV/ |
H A D | RISCVSystemOperands.td | 138 def INSTRETH : SysReg<"instreth", 0xC82>;
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/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/lib/Target/RISCV/ |
H A D | RISCVSystemOperands.td | 138 def INSTRETH : SysReg<"instreth", 0xC82>;
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/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/lib/Target/RISCV/ |
H A D | RISCVSystemOperands.td | 138 def INSTRETH : SysReg<"instreth", 0xC82>;
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/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/lib/Target/RISCV/ |
H A D | RISCVSystemOperands.td | 125 def INSTRETH : SysReg<"instreth", 0xC82>;
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H A D | RISCVInstrInfo.td | 734 def : InstAlias<"rdinstreth $rd", (CSRRS GPR:$rd, INSTRETH.Encoding, X0)>;
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/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/lib/Target/RISCV/ |
H A D | RISCVSystemOperands.td | 138 def INSTRETH : SysReg<"instreth", 0xC82>;
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