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Searched refs:INTEL_INFO (Results 1 – 25 of 147) sorted by relevance

123456

/dports/multimedia/libv4l/linux-5.13-rc2/drivers/gpu/drm/i915/
H A Di915_drv.h1259 INTEL_INFO(dev_priv)->gen == (n))
1368 INTEL_INFO(dev_priv)->gt == 1)
1394 INTEL_INFO(dev_priv)->gt == 3)
1398 INTEL_INFO(dev_priv)->gt == 3)
1400 INTEL_INFO(dev_priv)->gt == 1)
1413 INTEL_INFO(dev_priv)->gt == 2)
1415 INTEL_INFO(dev_priv)->gt == 3)
1417 INTEL_INFO(dev_priv)->gt == 4)
1419 INTEL_INFO(dev_priv)->gt == 2)
1421 INTEL_INFO(dev_priv)->gt == 3)
[all …]
/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/gpu/drm/i915/
H A Di915_drv.h1259 INTEL_INFO(dev_priv)->gen == (n))
1368 INTEL_INFO(dev_priv)->gt == 1)
1394 INTEL_INFO(dev_priv)->gt == 3)
1398 INTEL_INFO(dev_priv)->gt == 3)
1400 INTEL_INFO(dev_priv)->gt == 1)
1413 INTEL_INFO(dev_priv)->gt == 2)
1415 INTEL_INFO(dev_priv)->gt == 3)
1417 INTEL_INFO(dev_priv)->gt == 4)
1419 INTEL_INFO(dev_priv)->gt == 2)
1421 INTEL_INFO(dev_priv)->gt == 3)
[all …]
/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/gpu/drm/i915/
H A Di915_drv.h1259 INTEL_INFO(dev_priv)->gen == (n))
1368 INTEL_INFO(dev_priv)->gt == 1)
1394 INTEL_INFO(dev_priv)->gt == 3)
1398 INTEL_INFO(dev_priv)->gt == 3)
1400 INTEL_INFO(dev_priv)->gt == 1)
1413 INTEL_INFO(dev_priv)->gt == 2)
1415 INTEL_INFO(dev_priv)->gt == 3)
1417 INTEL_INFO(dev_priv)->gt == 4)
1419 INTEL_INFO(dev_priv)->gt == 2)
1421 INTEL_INFO(dev_priv)->gt == 3)
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/dports/misc/rump/buildrump.sh-b914579/src/sys/external/bsd/drm2/dist/drm/i915/
H A Di915_drv.h2027 #define INTEL_INFO(dev) (&to_i915(dev)->info) macro
2031 #define IS_I85X(dev) (INTEL_INFO(dev)->is_i85x)
2040 #define IS_G4X(dev) (INTEL_INFO(dev)->is_g4x)
2044 #define IS_G33(dev) (INTEL_INFO(dev)->is_g33)
2079 #define IS_GEN2(dev) (INTEL_INFO(dev)->gen == 2)
2080 #define IS_GEN3(dev) (INTEL_INFO(dev)->gen == 3)
2081 #define IS_GEN4(dev) (INTEL_INFO(dev)->gen == 4)
2082 #define IS_GEN5(dev) (INTEL_INFO(dev)->gen == 5)
2083 #define IS_GEN6(dev) (INTEL_INFO(dev)->gen == 6)
2132 #define HAS_FBC(dev) (INTEL_INFO(dev)->has_fbc)
[all …]
H A Di915_ums.c127 if (INTEL_INFO(dev)->gen >= 4 && !HAS_PCH_SPLIT(dev)) in i915_save_display_reg()
165 if (INTEL_INFO(dev)->gen >= 4) { in i915_save_display_reg()
222 if (INTEL_INFO(dev)->gen >= 4) { in i915_save_display_reg()
230 switch (INTEL_INFO(dev)->gen) { in i915_save_display_reg()
274 if (INTEL_INFO(dev)->gen <= 4) in i915_save_display_reg()
285 if (INTEL_INFO(dev)->gen >= 4) in i915_save_display_reg()
300 if (INTEL_INFO(dev)->gen <= 4) in i915_restore_display_reg()
313 if (INTEL_INFO(dev)->gen >= 4) in i915_restore_display_reg()
331 switch (INTEL_INFO(dev)->gen) { in i915_restore_display_reg()
432 if (INTEL_INFO(dev)->gen >= 4) { in i915_restore_display_reg()
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H A Dintel_ringbuffer.c609 if (INTEL_INFO(dev)->gen >= 4 && INTEL_INFO(dev)->gen < 7) in init_render_ring()
618 if (INTEL_INFO(dev)->gen >= 6) in init_render_ring()
622 if (INTEL_INFO(dev)->gen == 6) in init_render_ring()
631 if (INTEL_INFO(dev)->gen >= 5) { in init_render_ring()
654 if (INTEL_INFO(dev)->gen >= 6) in init_render_ring()
670 if (INTEL_INFO(dev)->gen >= 5) { in render_ring_cleanup()
1039 if (INTEL_INFO(dev)->gen >= 6 && INTEL_INFO(dev)->gen < 8) { in intel_ring_setup_status_page()
1983 if (INTEL_INFO(dev)->gen == 6) in intel_init_render_ring_buffer()
2016 if (INTEL_INFO(dev)->gen < 4) in intel_init_render_ring_buffer()
2091 if (INTEL_INFO(dev)->gen < 4) in intel_render_ring_init_dri()
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H A Di915_gem_tiling.c97 } else if (INTEL_INFO(dev)->gen >= 6) { in i915_gem_detect_bit_6_swizzle()
222 if (INTEL_INFO(dev)->gen >= 7) { in i915_tiling_ok()
225 } else if (INTEL_INFO(dev)->gen >= 4) { in i915_tiling_ok()
245 if (INTEL_INFO(dev)->gen >= 4) { in i915_tiling_ok()
267 if (INTEL_INFO(obj->base.dev)->gen >= 4) in i915_gem_object_fence_ok()
270 if (INTEL_INFO(obj->base.dev)->gen == 3) { in i915_gem_object_fence_ok()
H A Di915_suspend.c197 if (INTEL_INFO(dev)->gen <= 4) in i915_save_display()
240 if (HAS_FBC(dev) && INTEL_INFO(dev)->gen <= 4 && !IS_G4X(dev)) in i915_save_display()
253 if (INTEL_INFO(dev)->gen <= 4) in i915_restore_display()
264 else if (INTEL_INFO(dev)->gen <= 4 && IS_MOBILE(dev) && !IS_I830(dev)) in i915_restore_display()
295 if (HAS_FBC(dev) && INTEL_INFO(dev)->gen <= 4 && !IS_G4X(dev)) in i915_restore_display()
334 if (INTEL_INFO(dev)->gen < 7) in i915_save_state()
380 if (INTEL_INFO(dev)->gen < 7) in i915_restore_state()
H A Di915_gpu_error.c255 if (INTEL_INFO(dev)->gen >= 4) { in i915_ring_error_state()
262 if (INTEL_INFO(dev)->gen >= 6) { in i915_ring_error_state()
280 if (INTEL_INFO(dev)->gen >= 8) { in i915_ring_error_state()
374 if (INTEL_INFO(dev)->gen >= 6) { in i915_error_state_to_str()
379 if (INTEL_INFO(dev)->gen == 7) in i915_error_state_to_str()
760 switch (INTEL_INFO(dev)->gen) { in i915_gem_record_fences()
792 if (INTEL_INFO(dev)->gen >= 6) { in i915_record_ring_state()
809 if (INTEL_INFO(dev)->gen >= 4) { in i915_record_ring_state()
816 if (INTEL_INFO(dev)->gen >= 8) in i915_record_ring_state()
1108 if (INTEL_INFO(dev)->gen >= 7) in i915_capture_reg_state()
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H A Di915_dma.c115 if (INTEL_INFO(dev)->gen >= 4) in i915_write_hws_pga()
414 if (INTEL_INFO(dev)->gen >= 4) { in i915_emit_box()
527 if (INTEL_INFO(dev)->gen >= 4) { in i915_dispatch_batchbuffer()
1012 value = INTEL_INFO(dev)->gen >= 4; in i915_getparam()
1205 if (INTEL_INFO(dev)->gen >= 4) in intel_alloc_mchbar_resource()
1231 if (INTEL_INFO(dev)->gen >= 4) in intel_alloc_mchbar_resource()
1417 if (INTEL_INFO(dev)->num_pipes == 0) { in i915_load_modeset_init()
1573 (INTEL_INFO(dev)->gen == 7 || INTEL_INFO(dev)->gen == 8) && in intel_device_info_runtime_init()
1800 if (INTEL_INFO(dev)->num_pipes) { in i915_driver_load()
1801 ret = drm_vblank_init(dev, INTEL_INFO(dev)->num_pipes); in i915_driver_load()
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H A Dintel_pm.c1835 if (INTEL_INFO(dev)->gen >= 8) in ilk_display_fifo_size()
1882 if (INTEL_INFO(dev)->gen >= 8) in ilk_plane_wm_max()
1907 if (INTEL_INFO(dev)->gen >= 7) in ilk_cursor_wm_max()
1917 if (INTEL_INFO(dev)->gen >= 8) in ilk_fbc_wm_max()
2056 if (INTEL_INFO(dev)->gen == 5) in intel_fixup_spr_wm_latency()
2063 if (INTEL_INFO(dev)->gen == 5) in intel_fixup_cur_wm_latency()
3285 if (INTEL_INFO(dev)->gen < 5) in intel_enable_rc6()
3293 if (INTEL_INFO(dev)->gen == 5) in intel_enable_rc6()
3995 if (INTEL_INFO(dev)->gen != 5) in i915_chipset_val()
4203 if (INTEL_INFO(dev)->gen != 5) in i915_update_gfx_val()
[all …]
H A Di915_irq.c615 if (INTEL_INFO(dev)->gen >= 4) in i915_enable_asle_pipestat()
739 if (INTEL_INFO(dev)->gen >= 8) { in ilk_pipe_in_vblank_locked()
1560 if (INTEL_INFO(dev)->gen >= 3) in i9xx_pipe_crc_irq_handler()
1982 if (INTEL_INFO(dev)->gen >= 6) in ironlake_irq_handler()
1992 if (INTEL_INFO(dev)->gen >= 7) in ironlake_irq_handler()
2000 if (INTEL_INFO(dev)->gen >= 6) { in ironlake_irq_handler()
2316 if (INTEL_INFO(dev)->gen < 4) { in i915_report_and_clear_eir()
2432 if (INTEL_INFO(dev)->gen >= 4) { in i915_pageflip_stall_check()
2463 if (INTEL_INFO(dev)->gen >= 4) in i915_enable_vblank()
2471 if (INTEL_INFO(dev)->gen == 3) in i915_enable_vblank()
[all …]
H A Di915_gem_execbuffer.c300 if (INTEL_INFO(dev)->gen >= 8) { in relocate_entry_cpu()
343 if (INTEL_INFO(dev)->gen >= 8) { in relocate_entry_gtt()
444 obj->base.size - (INTEL_INFO(dev)->gen >= 8 ? 8 : 4))) { in i915_gem_execbuffer_relocate_entry()
592 bool has_fenced_gpu_access = INTEL_INFO(ring->dev)->gen < 4; in i915_gem_execbuffer_reserve_vma()
682 bool has_fenced_gpu_access = INTEL_INFO(ring->dev)->gen < 4; in i915_gem_execbuffer_reserve()
1149 if (INTEL_INFO(dev)->gen < 4) in i915_gem_do_execbuffer()
1152 if (INTEL_INFO(dev)->gen > 5 && in i915_gem_do_execbuffer()
1157 if (INTEL_INFO(dev)->gen >= 6) in i915_gem_do_execbuffer()
1177 if (INTEL_INFO(dev)->gen >= 5) { in i915_gem_do_execbuffer()
1425 if (INTEL_INFO(dev)->gen < 4) in i915_gem_execbuffer()
/dports/x11-drivers/xf86-video-intel/xf86-video-intel-31486f40f8e8f8923ca0799aea84b58799754564/src/uxa/
H A Dintel_video_overlay.c160 } else if (attribute == intel_xv_Gamma0 && (INTEL_INFO(intel)->gen >= 030)) { in intel_video_overlay_set_port_attribute()
162 } else if (attribute == intel_xv_Gamma1 && (INTEL_INFO(intel)->gen >= 030)) { in intel_video_overlay_set_port_attribute()
164 } else if (attribute == intel_xv_Gamma2 && (INTEL_INFO(intel)->gen >= 030)) { in intel_video_overlay_set_port_attribute()
166 } else if (attribute == intel_xv_Gamma3 && (INTEL_INFO(intel)->gen >= 030)) { in intel_video_overlay_set_port_attribute()
168 } else if (attribute == intel_xv_Gamma4 && (INTEL_INFO(intel)->gen >= 030)) { in intel_video_overlay_set_port_attribute()
170 } else if (attribute == intel_xv_Gamma5 && (INTEL_INFO(intel)->gen >= 030)) { in intel_video_overlay_set_port_attribute()
183 attribute == intel_xv_Gamma5) && (INTEL_INFO(intel)->gen >= 030)) { in intel_video_overlay_set_port_attribute()
483 if (INTEL_INFO(intel)->gen >= 030) in intel_video_overlay_setup_image()
492 if (INTEL_INFO(intel)->gen >= 030) { in intel_video_overlay_setup_image()
542 if (INTEL_INFO(intel)->gen >= 030) { in intel_video_overlay_setup_image()
H A Dintel_uxa_video.c170 if (full_height && INTEL_INFO(intel)->gen < 040) in intel_wait_for_scanline()
176 if (full_height && INTEL_INFO(intel)->gen >= 040) in intel_wait_for_scanline()
181 if (full_height && INTEL_INFO(intel)->gen >= 040) in intel_wait_for_scanline()
285 if (crtc && adaptor_priv->SyncToVblank != 0 && INTEL_INFO(intel)->gen < 060) { in intel_uxa_video_put_image_textured()
289 if (INTEL_INFO(intel)->gen >= 060) { in intel_uxa_video_put_image_textured()
294 } else if (INTEL_INFO(intel)->gen >= 040) { in intel_uxa_video_put_image_textured()
H A Dintel_memory.c98 if (INTEL_INFO(intel)->gen >= 040 || intel->has_relaxed_fencing) { in intel_get_fence_size()
131 if (INTEL_INFO(intel)->gen >= 040) in intel_get_fence_pitch()
172 INTEL_INFO(intel)->gen); in intel_set_gem_max_sizes()
206 if (INTEL_INFO(intel)->gen < 040) { in intel_compute_size()
H A Dintel_batchbuffer.c188 if ((INTEL_INFO(intel)->gen >= 0100)) { in intel_batch_emit_flush()
196 } else if ((INTEL_INFO(intel)->gen >= 060)) { in intel_batch_emit_flush()
205 if ((INTEL_INFO(intel)->gen == 060)) { in intel_batch_emit_flush()
221 if (INTEL_INFO(intel)->gen >= 040) in intel_batch_emit_flush()
249 INTEL_INFO(intel)->gen >= 060) { in intel_batch_submit()
H A Dintel_uxa.c259 int len = INTEL_INFO(intel)->gen >= 0100 ? 7 : 6; in intel_uxa_solid()
412 if (INTEL_INFO(intel)->gen >= 040) { in intel_uxa_copy()
450 if (INTEL_INFO(intel)->gen >= 060) { in intel_uxa_done()
580 if (INTEL_INFO(intel)->gen >= 040) in intel_get_tile_width()
1247 if (INTEL_INFO(intel)->gen >= 040) { in intel_limits_init()
1310 if (INTEL_INFO(intel)->gen >= 040 && INTEL_INFO(intel)->gen < 0100) in intel_uxa_init()
1355 } else if (INTEL_INFO(intel)->gen < 030) { in intel_uxa_init()
1365 } else if (INTEL_INFO(intel)->gen < 040) { in intel_uxa_init()
1375 } else if (INTEL_INFO(intel)->gen < 0100) { in intel_uxa_init()
1386 if (INTEL_INFO(intel)->gen < 050) { in intel_uxa_init()
[all …]
H A Dintel.h315 #define INTEL_INFO(intel) ((intel)->info) macro
316 #define IS_GENx(intel, X) (INTEL_INFO(intel)->gen >= 8*(X) && INTEL_INFO(intel)->gen < 8*((X)+1))
324 #define IS_HSW(intel) (INTEL_INFO(intel)->gen == 075)
337 #define SUPPORTS_YTILING(pI810) (INTEL_INFO(intel)->gen >= 040)
338 #define HAS_BLT(pI810) (INTEL_INFO(intel)->gen >= 060)
H A Dintel_hwmc.c78 if (INTEL_INFO(intel)->gen >= 045) in create_context()
82 contextRec->i965.is_g4x = INTEL_INFO(intel)->gen == 045; in create_context()
235 } else if (INTEL_INFO(intel)->gen >= 045) { in intel_xvmc_adaptor_init()
H A Dintel_video.c191 INTEL_INFO(intel)->gen >= 030 && in intel_video_init()
192 INTEL_INFO(intel)->gen < 0100) { in intel_video_init()
280 } else if (attribute == intel_xv_Gamma0 && (INTEL_INFO(intel)->gen >= 030)) { in intel_video_get_port_attribute()
282 } else if (attribute == intel_xv_Gamma1 && (INTEL_INFO(intel)->gen >= 030)) { in intel_video_get_port_attribute()
284 } else if (attribute == intel_xv_Gamma2 && (INTEL_INFO(intel)->gen >= 030)) { in intel_video_get_port_attribute()
286 } else if (attribute == intel_xv_Gamma3 && (INTEL_INFO(intel)->gen >= 030)) { in intel_video_get_port_attribute()
288 } else if (attribute == intel_xv_Gamma4 && (INTEL_INFO(intel)->gen >= 030)) { in intel_video_get_port_attribute()
290 } else if (attribute == intel_xv_Gamma5 && (INTEL_INFO(intel)->gen >= 030)) { in intel_video_get_port_attribute()
568 if (INTEL_INFO(intel)->gen >= 040) in intel_setup_dst_params()
H A Dintel_driver.c247 if (level < 3 || INTEL_INFO(intel)->gen < 040) in intel_check_dri_option()
287 if ((INTEL_INFO(intel)->gen == 060)) { in intel_init_bufmgr()
364 if (INTEL_INFO(intel)->gen == -1) in can_accelerate_blt()
374 if (INTEL_INFO(intel)->gen == 060) { in can_accelerate_blt()
389 if (INTEL_INFO(intel)->gen >= 060) { in can_accelerate_blt()
545 intel->has_relaxed_fencing = INTEL_INFO(intel)->gen >= 033; in I830PreInit()
1007 if (INTEL_INFO(intel)->gen >= 040) in I830ScreenInit()
1178 if (INTEL_INFO(intel)->gen >= 040 && INTEL_INFO(intel)->gen < 0100) in I830CloseScreen()
H A Di965_render.c1059 if (INTEL_INFO(intel)->gen < 070) in i965_create_sampler_state()
1422 if (INTEL_INFO(intel)->gen < 070) in i965_set_picture_surface_state()
1576 if (INTEL_INFO(intel)->gen >= 045) in i965_emit_composite_state()
1756 if (INTEL_INFO(intel)->gen >= 060) in i965_composite_check_aperture()
2187 if (INTEL_INFO(intel)->gen >= 070) in i965_select_vertex_buffer()
2207 if (INTEL_INFO(intel)->gen >= 050) in i965_select_vertex_buffer()
2258 if (INTEL_INFO(intel)->gen >= 060) in i965_composite()
2304 if (INTEL_INFO(intel)->gen < 050) { in i965_composite()
2361 if (INTEL_INFO(intel)->gen >= 060) in gen4_render_state_init()
2625 if (INTEL_INFO(intel)->gen >= 070) in gen6_composite_sampler_state_pointers()
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/dports/multimedia/libv4l/linux-5.13-rc2/drivers/gpu/drm/i915/display/
H A Dintel_color.c1300 degamma_length = INTEL_INFO(dev_priv)->color.degamma_lut_size; in check_luts()
1301 gamma_length = INTEL_INFO(dev_priv)->color.gamma_lut_size; in check_luts()
1302 degamma_tests = INTEL_INFO(dev_priv)->color.degamma_lut_tests; in check_luts()
1303 gamma_tests = INTEL_INFO(dev_priv)->color.gamma_lut_tests; in check_luts()
1830 int i, lut_size = INTEL_INFO(dev_priv)->color.gamma_lut_size; in i965_read_lut_10p6()
1873 int i, lut_size = INTEL_INFO(dev_priv)->color.gamma_lut_size; in chv_read_cgm_gamma()
1934 int i, lut_size = INTEL_INFO(dev_priv)->color.gamma_lut_size; in ilk_read_lut_10()
1985 int lut_size = INTEL_INFO(dev_priv)->color.gamma_lut_size; in bdw_read_lut_10()
2038 int i, lut_size = INTEL_INFO(dev_priv)->color.gamma_lut_size; in icl_read_lut_multi_segment()
2153 INTEL_INFO(dev_priv)->color.degamma_lut_size, in intel_color_init()
[all …]
/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/gpu/drm/i915/display/
H A Dintel_color.c1300 degamma_length = INTEL_INFO(dev_priv)->color.degamma_lut_size; in check_luts()
1301 gamma_length = INTEL_INFO(dev_priv)->color.gamma_lut_size; in check_luts()
1302 degamma_tests = INTEL_INFO(dev_priv)->color.degamma_lut_tests; in check_luts()
1303 gamma_tests = INTEL_INFO(dev_priv)->color.gamma_lut_tests; in check_luts()
1830 int i, lut_size = INTEL_INFO(dev_priv)->color.gamma_lut_size; in i965_read_lut_10p6()
1873 int i, lut_size = INTEL_INFO(dev_priv)->color.gamma_lut_size; in chv_read_cgm_gamma()
1934 int i, lut_size = INTEL_INFO(dev_priv)->color.gamma_lut_size; in ilk_read_lut_10()
1985 int lut_size = INTEL_INFO(dev_priv)->color.gamma_lut_size; in bdw_read_lut_10()
2038 int i, lut_size = INTEL_INFO(dev_priv)->color.gamma_lut_size; in icl_read_lut_multi_segment()
2153 INTEL_INFO(dev_priv)->color.degamma_lut_size, in intel_color_init()
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