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Searched refs:IODA2_TVT_TABLE_ADDR (Results 1 – 25 of 28) sorted by relevance

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/dports/emulators/qemu42/qemu-4.2.1/roms/skiboot/include/
H A Dphb3-regs.h336 #define IODA2_TVT_TABLE_ADDR PPC_BITMASK(0,47) macro
/dports/emulators/qemu5/qemu-5.2.0/roms/skiboot/include/
H A Dphb3-regs.h336 #define IODA2_TVT_TABLE_ADDR PPC_BITMASK(0,47) macro
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/roms/skiboot/include/
H A Dphb3-regs.h336 #define IODA2_TVT_TABLE_ADDR PPC_BITMASK(0,47) macro
/dports/emulators/qemu-utils/qemu-4.2.1/roms/skiboot/include/
H A Dphb3-regs.h336 #define IODA2_TVT_TABLE_ADDR PPC_BITMASK(0,47) macro
/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/skiboot/include/
H A Dphb3-regs.h336 #define IODA2_TVT_TABLE_ADDR PPC_BITMASK(0,47) macro
/dports/emulators/qemu/qemu-6.2.0/roms/skiboot/include/
H A Dphb3-regs.h322 #define IODA2_TVT_TABLE_ADDR PPC_BITMASK(0,47) macro
/dports/emulators/qemu60/qemu-6.0.0/roms/skiboot/include/
H A Dphb3-regs.h336 #define IODA2_TVT_TABLE_ADDR PPC_BITMASK(0,47) macro
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/include/hw/pci-host/
H A Dpnv_phb3_regs.h369 #define IODA2_TVT_TABLE_ADDR PPC_BITMASK(0, 47) macro
/dports/emulators/qemu/qemu-6.2.0/include/hw/pci-host/
H A Dpnv_phb3_regs.h379 #define IODA2_TVT_TABLE_ADDR PPC_BITMASK(0, 47) macro
/dports/emulators/qemu60/qemu-6.0.0/include/hw/pci-host/
H A Dpnv_phb3_regs.h379 #define IODA2_TVT_TABLE_ADDR PPC_BITMASK(0, 47) macro
/dports/emulators/qemu5/qemu-5.2.0/include/hw/pci-host/
H A Dpnv_phb3_regs.h379 #define IODA2_TVT_TABLE_ADDR PPC_BITMASK(0, 47) macro
/dports/emulators/qemu-guest-agent/qemu-5.0.1/include/hw/pci-host/
H A Dpnv_phb3_regs.h379 #define IODA2_TVT_TABLE_ADDR PPC_BITMASK(0, 47)
/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/include/hw/pci-host/
H A Dpnv_phb3_regs.h379 #define IODA2_TVT_TABLE_ADDR PPC_BITMASK(0, 47) macro
/dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/include/hw/pci-host/
H A Dpnv_phb3_regs.h379 #define IODA2_TVT_TABLE_ADDR PPC_BITMASK(0, 47) macro
/dports/emulators/qemu/qemu-6.2.0/hw/pci-host/
H A Dpnv_phb3.c739 uint64_t tta = GETFIELD(IODA2_TVT_TABLE_ADDR, tve); in pnv_phb3_translate_tve()
/dports/emulators/qemu60/qemu-6.0.0/hw/pci-host/
H A Dpnv_phb3.c739 uint64_t tta = GETFIELD(IODA2_TVT_TABLE_ADDR, tve); in pnv_phb3_translate_tve()
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/hw/pci-host/
H A Dpnv_phb3.c730 uint64_t tta = GETFIELD(IODA2_TVT_TABLE_ADDR, tve); in pnv_phb3_translate_tve()
/dports/emulators/qemu5/qemu-5.2.0/hw/pci-host/
H A Dpnv_phb3.c739 uint64_t tta = GETFIELD(IODA2_TVT_TABLE_ADDR, tve); in pnv_phb3_translate_tve()
/dports/emulators/qemu-guest-agent/qemu-5.0.1/hw/pci-host/
H A Dpnv_phb3.c738 uint64_t tta = GETFIELD(IODA2_TVT_TABLE_ADDR, tve); in pnv_phb3_translate_tve()
/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/hw/pci-host/
H A Dpnv_phb3.c739 uint64_t tta = GETFIELD(IODA2_TVT_TABLE_ADDR, tve); in pnv_phb3_translate_tve()
/dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/hw/pci-host/
H A Dpnv_phb3.c738 uint64_t tta = GETFIELD(IODA2_TVT_TABLE_ADDR, tve); in pnv_phb3_translate_tve()
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/roms/skiboot/hw/
H A Dphb3.c1123 data64 = SETFIELD(IODA2_TVT_TABLE_ADDR, 0ul, tce_table_addr >> 12); in phb3_map_pe_dma_window()
/dports/emulators/qemu42/qemu-4.2.1/roms/skiboot/hw/
H A Dphb3.c1156 data64 = SETFIELD(IODA2_TVT_TABLE_ADDR, 0ul, tce_table_addr >> 12); in phb3_map_pe_dma_window()
/dports/emulators/qemu5/qemu-5.2.0/roms/skiboot/hw/
H A Dphb3.c1156 data64 = SETFIELD(IODA2_TVT_TABLE_ADDR, 0ul, tce_table_addr >> 12); in phb3_map_pe_dma_window()
/dports/emulators/qemu-utils/qemu-4.2.1/roms/skiboot/hw/
H A Dphb3.c1156 data64 = SETFIELD(IODA2_TVT_TABLE_ADDR, 0ul, tce_table_addr >> 12); in phb3_map_pe_dma_window()

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