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/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/test/ThinLTO/X86/
H A Dcfi-unsat.ll60 ; CHECK-IR0: define weak_odr i32 @test
61 ; CHECK-IR0-NEXT: entry:
62 ; CHECK-IR0-NEXT: %0 = bitcast
63 ; CHECK-IR0-NEXT: %vtable5 =
65 ; CHECK-IR0-NEXT: unreachable
66 ; CHECK-IR0-NEXT: }
68 ; CHECK-IR0-NEXT: entry:
69 ; CHECK-IR0-NEXT: %0 = bitcast
70 ; CHECK-IR0-NEXT: %vtable5 =
72 ; CHECK-IR0-NEXT: unreachable
[all …]
/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/ThinLTO/X86/
H A Dcfi-unsat.ll60 ; CHECK-IR0: define weak_odr i32 @test
61 ; CHECK-IR0-NEXT: entry:
62 ; CHECK-IR0-NEXT: %0 = bitcast
63 ; CHECK-IR0-NEXT: %vtable5 =
65 ; CHECK-IR0-NEXT: unreachable
66 ; CHECK-IR0-NEXT: }
68 ; CHECK-IR0-NEXT: entry:
69 ; CHECK-IR0-NEXT: %0 = bitcast
70 ; CHECK-IR0-NEXT: %vtable5 =
72 ; CHECK-IR0-NEXT: unreachable
[all …]
/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/test/ThinLTO/X86/
H A Dcfi-unsat.ll60 ; CHECK-IR0: define weak_odr i32 @test
61 ; CHECK-IR0-NEXT: entry:
62 ; CHECK-IR0-NEXT: %0 = bitcast
63 ; CHECK-IR0-NEXT: %vtable5 =
65 ; CHECK-IR0-NEXT: unreachable
66 ; CHECK-IR0-NEXT: }
68 ; CHECK-IR0-NEXT: entry:
69 ; CHECK-IR0-NEXT: %0 = bitcast
70 ; CHECK-IR0-NEXT: %vtable5 =
72 ; CHECK-IR0-NEXT: unreachable
[all …]
/dports/devel/llvm11/llvm-11.0.1.src/test/ThinLTO/X86/
H A Dcfi-unsat.ll60 ; CHECK-IR0: define weak_odr i32 @test
61 ; CHECK-IR0-NEXT: entry:
62 ; CHECK-IR0-NEXT: %0 = bitcast
63 ; CHECK-IR0-NEXT: %vtable5 =
65 ; CHECK-IR0-NEXT: unreachable
66 ; CHECK-IR0-NEXT: }
68 ; CHECK-IR0-NEXT: entry:
69 ; CHECK-IR0-NEXT: %0 = bitcast
70 ; CHECK-IR0-NEXT: %vtable5 =
72 ; CHECK-IR0-NEXT: unreachable
[all …]
/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/test/ThinLTO/X86/
H A Dcfi-unsat.ll60 ; CHECK-IR0: define weak_odr i32 @test
61 ; CHECK-IR0-NEXT: entry:
62 ; CHECK-IR0-NEXT: %0 = bitcast
63 ; CHECK-IR0-NEXT: %vtable5 =
65 ; CHECK-IR0-NEXT: unreachable
66 ; CHECK-IR0-NEXT: }
68 ; CHECK-IR0-NEXT: entry:
69 ; CHECK-IR0-NEXT: %0 = bitcast
70 ; CHECK-IR0-NEXT: %vtable5 =
72 ; CHECK-IR0-NEXT: unreachable
[all …]
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/test/ThinLTO/X86/
H A Dcfi-unsat.ll60 ; CHECK-IR0: define weak_odr i32 @test
61 ; CHECK-IR0-NEXT: entry:
62 ; CHECK-IR0-NEXT: %0 = bitcast
63 ; CHECK-IR0-NEXT: %vtable5 =
65 ; CHECK-IR0-NEXT: unreachable
66 ; CHECK-IR0-NEXT: }
68 ; CHECK-IR0-NEXT: entry:
69 ; CHECK-IR0-NEXT: %0 = bitcast
70 ; CHECK-IR0-NEXT: %vtable5 =
72 ; CHECK-IR0-NEXT: unreachable
[all …]
/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/test/ThinLTO/X86/
H A Dcfi-unsat.ll60 ; CHECK-IR0: define weak_odr i32 @test
61 ; CHECK-IR0-NEXT: entry:
62 ; CHECK-IR0-NEXT: %0 = bitcast
63 ; CHECK-IR0-NEXT: %vtable5 =
65 ; CHECK-IR0-NEXT: unreachable
66 ; CHECK-IR0-NEXT: }
68 ; CHECK-IR0-NEXT: entry:
69 ; CHECK-IR0-NEXT: %0 = bitcast
70 ; CHECK-IR0-NEXT: %vtable5 =
72 ; CHECK-IR0-NEXT: unreachable
[all …]
/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/test/ThinLTO/X86/
H A Dcfi-unsat.ll60 ; CHECK-IR0: define weak_odr i32 @test
61 ; CHECK-IR0-NEXT: entry:
62 ; CHECK-IR0-NEXT: %0 = bitcast
63 ; CHECK-IR0-NEXT: %vtable5 =
65 ; CHECK-IR0-NEXT: unreachable
66 ; CHECK-IR0-NEXT: }
68 ; CHECK-IR0-NEXT: entry:
69 ; CHECK-IR0-NEXT: %0 = bitcast
70 ; CHECK-IR0-NEXT: %vtable5 =
72 ; CHECK-IR0-NEXT: unreachable
[all …]
/dports/graphics/llvm-mesa/llvm-13.0.1.src/test/ThinLTO/X86/
H A Dcfi-unsat.ll60 ; CHECK-IR0: define weak_odr i32 @test
61 ; CHECK-IR0-NEXT: entry:
62 ; CHECK-IR0-NEXT: %0 = bitcast
63 ; CHECK-IR0-NEXT: %vtable5 =
65 ; CHECK-IR0-NEXT: unreachable
66 ; CHECK-IR0-NEXT: }
68 ; CHECK-IR0-NEXT: entry:
69 ; CHECK-IR0-NEXT: %0 = bitcast
70 ; CHECK-IR0-NEXT: %vtable5 =
72 ; CHECK-IR0-NEXT: unreachable
[all …]
/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/test/ThinLTO/X86/
H A Dcfi-unsat.ll60 ; CHECK-IR0: define weak_odr i32 @test
61 ; CHECK-IR0-NEXT: entry:
62 ; CHECK-IR0-NEXT: %0 = bitcast
63 ; CHECK-IR0-NEXT: %vtable5 =
65 ; CHECK-IR0-NEXT: unreachable
66 ; CHECK-IR0-NEXT: }
68 ; CHECK-IR0-NEXT: entry:
69 ; CHECK-IR0-NEXT: %0 = bitcast
70 ; CHECK-IR0-NEXT: %vtable5 =
72 ; CHECK-IR0-NEXT: unreachable
[all …]
/dports/devel/binutils/binutils-2.37/gas/testsuite/gas/tic4x/
H A Daddressing.s84 ldi *+AR0(IR0),R0 ; with predisplacement add
85 ldi *-AR0(IR0),R0 ; with predisplacement subtract
86 ldi *++AR0(IR0),R0 ; with predisplacement add and modify
88 ldi *AR0++(IR0),R0 ; with postdisplacement add and modify
197 addf3 *+AR0(IR0),R0,R0; with predisplacement add
198 addf3 *-AR0(IR0),R0,R0; with predisplacement subtract
199 addf3 *++AR0(IR0),R0,R0; with predisplacement add and modify
220 addf3 R0,*+AR0(IR0),R0; with predisplacement add
221 addf3 R0,*-AR0(IR0),R0; with predisplacement subtract
222 addf3 R0,*++AR0(IR0),R0; with predisplacement add and modify
[all …]
/dports/devel/tigcc/tigcc-0.96.b8_10/gnu/binutils-2.16.1/gas/testsuite/gas/tic4x/
H A Daddressing.s84 ldi *+AR0(IR0),R0 ; with predisplacement add
85 ldi *-AR0(IR0),R0 ; with predisplacement subtract
86 ldi *++AR0(IR0),R0 ; with predisplacement add and modify
88 ldi *AR0++(IR0),R0 ; with postdisplacement add and modify
197 addf3 *+AR0(IR0),R0,R0; with predisplacement add
198 addf3 *-AR0(IR0),R0,R0; with predisplacement subtract
199 addf3 *++AR0(IR0),R0,R0; with predisplacement add and modify
220 addf3 R0,*+AR0(IR0),R0; with predisplacement add
221 addf3 R0,*-AR0(IR0),R0; with predisplacement subtract
222 addf3 R0,*++AR0(IR0),R0; with predisplacement add and modify
[all …]
/dports/lang/gnatdroid-binutils-x86/binutils-2.27/gas/testsuite/gas/tic4x/
H A Daddressing.s84 ldi *+AR0(IR0),R0 ; with predisplacement add
85 ldi *-AR0(IR0),R0 ; with predisplacement subtract
86 ldi *++AR0(IR0),R0 ; with predisplacement add and modify
88 ldi *AR0++(IR0),R0 ; with postdisplacement add and modify
197 addf3 *+AR0(IR0),R0,R0; with predisplacement add
198 addf3 *-AR0(IR0),R0,R0; with predisplacement subtract
199 addf3 *++AR0(IR0),R0,R0; with predisplacement add and modify
220 addf3 R0,*+AR0(IR0),R0; with predisplacement add
221 addf3 R0,*-AR0(IR0),R0; with predisplacement subtract
222 addf3 R0,*++AR0(IR0),R0; with predisplacement add and modify
[all …]
/dports/devel/arm-elf-binutils/binutils-2.37/gas/testsuite/gas/tic4x/
H A Daddressing.s84 ldi *+AR0(IR0),R0 ; with predisplacement add
85 ldi *-AR0(IR0),R0 ; with predisplacement subtract
86 ldi *++AR0(IR0),R0 ; with predisplacement add and modify
88 ldi *AR0++(IR0),R0 ; with postdisplacement add and modify
197 addf3 *+AR0(IR0),R0,R0; with predisplacement add
198 addf3 *-AR0(IR0),R0,R0; with predisplacement subtract
199 addf3 *++AR0(IR0),R0,R0; with predisplacement add and modify
220 addf3 R0,*+AR0(IR0),R0; with predisplacement add
221 addf3 R0,*-AR0(IR0),R0; with predisplacement subtract
222 addf3 R0,*++AR0(IR0),R0; with predisplacement add and modify
[all …]
/dports/devel/zpu-gcc/zpu-toolchain-1.0/toolchain/binutils/gas/testsuite/gas/tic4x/
H A Daddressing.s84 ldi *+AR0(IR0),R0 ; with predisplacement add
85 ldi *-AR0(IR0),R0 ; with predisplacement subtract
86 ldi *++AR0(IR0),R0 ; with predisplacement add and modify
88 ldi *AR0++(IR0),R0 ; with postdisplacement add and modify
197 addf3 *+AR0(IR0),R0,R0; with predisplacement add
198 addf3 *-AR0(IR0),R0,R0; with predisplacement subtract
199 addf3 *++AR0(IR0),R0,R0; with predisplacement add and modify
220 addf3 R0,*+AR0(IR0),R0; with predisplacement add
221 addf3 R0,*-AR0(IR0),R0; with predisplacement subtract
222 addf3 R0,*++AR0(IR0),R0; with predisplacement add and modify
[all …]
/dports/devel/gnulibiberty/binutils-2.37/gas/testsuite/gas/tic4x/
H A Daddressing.s84 ldi *+AR0(IR0),R0 ; with predisplacement add
85 ldi *-AR0(IR0),R0 ; with predisplacement subtract
86 ldi *++AR0(IR0),R0 ; with predisplacement add and modify
88 ldi *AR0++(IR0),R0 ; with postdisplacement add and modify
197 addf3 *+AR0(IR0),R0,R0; with predisplacement add
198 addf3 *-AR0(IR0),R0,R0; with predisplacement subtract
199 addf3 *++AR0(IR0),R0,R0; with predisplacement add and modify
220 addf3 R0,*+AR0(IR0),R0; with predisplacement add
221 addf3 R0,*-AR0(IR0),R0; with predisplacement subtract
222 addf3 R0,*++AR0(IR0),R0; with predisplacement add and modify
[all …]
/dports/lang/gnatdroid-binutils/binutils-2.27/gas/testsuite/gas/tic4x/
H A Daddressing.s84 ldi *+AR0(IR0),R0 ; with predisplacement add
85 ldi *-AR0(IR0),R0 ; with predisplacement subtract
86 ldi *++AR0(IR0),R0 ; with predisplacement add and modify
88 ldi *AR0++(IR0),R0 ; with postdisplacement add and modify
197 addf3 *+AR0(IR0),R0,R0; with predisplacement add
198 addf3 *-AR0(IR0),R0,R0; with predisplacement subtract
199 addf3 *++AR0(IR0),R0,R0; with predisplacement add and modify
220 addf3 R0,*+AR0(IR0),R0; with predisplacement add
221 addf3 R0,*-AR0(IR0),R0; with predisplacement subtract
222 addf3 R0,*++AR0(IR0),R0; with predisplacement add and modify
[all …]
/dports/devel/zpu-binutils/zpu-toolchain-1.0/toolchain/binutils/gas/testsuite/gas/tic4x/
H A Daddressing.s84 ldi *+AR0(IR0),R0 ; with predisplacement add
85 ldi *-AR0(IR0),R0 ; with predisplacement subtract
86 ldi *++AR0(IR0),R0 ; with predisplacement add and modify
88 ldi *AR0++(IR0),R0 ; with postdisplacement add and modify
197 addf3 *+AR0(IR0),R0,R0; with predisplacement add
198 addf3 *-AR0(IR0),R0,R0; with predisplacement subtract
199 addf3 *++AR0(IR0),R0,R0; with predisplacement add and modify
220 addf3 R0,*+AR0(IR0),R0; with predisplacement add
221 addf3 R0,*-AR0(IR0),R0; with predisplacement subtract
222 addf3 R0,*++AR0(IR0),R0; with predisplacement add and modify
[all …]
/dports/devel/djgpp-binutils/binutils-2.17/gas/testsuite/gas/tic4x/
H A Daddressing.s84 ldi *+AR0(IR0),R0 ; with predisplacement add
85 ldi *-AR0(IR0),R0 ; with predisplacement subtract
86 ldi *++AR0(IR0),R0 ; with predisplacement add and modify
88 ldi *AR0++(IR0),R0 ; with postdisplacement add and modify
197 addf3 *+AR0(IR0),R0,R0; with predisplacement add
198 addf3 *-AR0(IR0),R0,R0; with predisplacement subtract
199 addf3 *++AR0(IR0),R0,R0; with predisplacement add and modify
220 addf3 R0,*+AR0(IR0),R0; with predisplacement add
221 addf3 R0,*-AR0(IR0),R0; with predisplacement subtract
222 addf3 R0,*++AR0(IR0),R0; with predisplacement add and modify
[all …]
/dports/devel/py-zope.interface/zope.interface-5.3.0/src/zope/interface/tests/
H A Dtest_adapter.py42 class IR0(Interface): class
44 class IR1(IR0):
207 IR0: 1
213 IR0, # provided
239 IR0: MT({
358 IR0, # provided
543 IR0: 2
560 IR0: 1
590 IR0: 2
616 IR0: 2
[all …]
/dports/emulators/mess/mame-mame0226/src/devices/cpu/psx/
H A Dgte.cpp42 #define IR0 ( m_cp2dr[ 8 ].sw.l ) macro
137 #define MX13( n ) ( n < 3 ? m_cp2cr[ ( n << 3 ) + 1 ].sw.l : IR0 )
499 IR0 = Lm_H( m_mac0, 1 ); in docop2()
522 MAC1 = A1( ( R << 16 ) + ( IR0 * Lm_B1( A1( ( (int64_t) RFC << 12 ) - ( R << 16 ) ), 0 ) ) ); in docop2()
854 IR0 = Lm_H( m_mac0, 1 ); in docop2()
860 MAC1 = A1( IR0 * IR1 ); in docop2()
861 MAC2 = A2( IR0 * IR2 ); in docop2()
862 MAC3 = A3( IR0 * IR3 ); in docop2()
877 MAC1 = A1( gte_shift( MAC1, -m_sf ) + ( IR0 * IR1 ) ); in docop2()
878 MAC2 = A2( gte_shift( MAC2, -m_sf ) + ( IR0 * IR2 ) ); in docop2()
[all …]
/dports/emulators/mame/mame-mame0226/src/devices/cpu/psx/
H A Dgte.cpp42 #define IR0 ( m_cp2dr[ 8 ].sw.l ) macro
137 #define MX13( n ) ( n < 3 ? m_cp2cr[ ( n << 3 ) + 1 ].sw.l : IR0 )
499 IR0 = Lm_H( m_mac0, 1 ); in docop2()
522 MAC1 = A1( ( R << 16 ) + ( IR0 * Lm_B1( A1( ( (int64_t) RFC << 12 ) - ( R << 16 ) ), 0 ) ) ); in docop2()
854 IR0 = Lm_H( m_mac0, 1 ); in docop2()
860 MAC1 = A1( IR0 * IR1 ); in docop2()
861 MAC2 = A2( IR0 * IR2 ); in docop2()
862 MAC3 = A3( IR0 * IR3 ); in docop2()
877 MAC1 = A1( gte_shift( MAC1, -m_sf ) + ( IR0 * IR1 ) ); in docop2()
878 MAC2 = A2( gte_shift( MAC2, -m_sf ) + ( IR0 * IR2 ) ); in docop2()
[all …]
/dports/emulators/pcsxr/pcsxr-codeplex-final/pcsxr/libpcsxcore/
H A Dgte.c34 #define IR0 (psxRegs.CP2D.p[ 8 ].sw.l) macro
129 #define MX13(n) (n < 3 ? psxRegs.CP2C.p[ (n << 3) + 1 ].sw.l : IR0)
499 IR0 = Lm_H(m_mac0, 1); in docop2()
528 MAC1 = A1((R << 16) + (IR0 * Lm_B1(A1(((s64) RFC << 12) - (R << 16)), 0))); in docop2()
889 IR0 = Lm_H(m_mac0, 1); in docop2()
897 MAC1 = A1(IR0 * IR1); in docop2()
898 MAC2 = A2(IR0 * IR2); in docop2()
899 MAC3 = A3(IR0 * IR3); in docop2()
916 MAC1 = A1(gte_shift(MAC1, -m_sf) + (IR0 * IR1)); in docop2()
917 MAC2 = A2(gte_shift(MAC2, -m_sf) + (IR0 * IR2)); in docop2()
[all …]
/dports/games/kodi-addon-game.libretro.beetle-psx/game.libretro.beetle-psx-0.9.44.22-Matrix/depends/common/beetle-psx/mednafen/psx/
H A Dgte.cpp158 #define IR0 IR[0] macro
231 IR0 = 0; in GTE_Power()
472 IR0 = value; in GTE_WriteDR()
629 ret = (int16_t)IR0; in GTE_ReadDR()
1039 mulr[2] = IR0; in MultiplyMatrixByVector()
1242 IR0 = Lm_H(((int64_t)DQB + DQA * h_div_sz) >> 12); in TransformDQ()
1649 MAC[1] = (IR0 * IR1) >> sf; in GPF()
1650 MAC[2] = (IR0 * IR2) >> sf; in GPF()
1651 MAC[3] = (IR0 * IR3) >> sf; in GPF()
1665 MAC[1] = i64_to_i44(0, (int64_t)((uint64_t)(int64_t)MAC[1] << sf) + (IR0 * IR1)) >> sf; in GPL()
[all …]
/dports/games/libretro-beetle_psx/beetle-psx-libretro-3ec155d/mednafen/psx/
H A Dgte.cpp158 #define IR0 IR[0] macro
231 IR0 = 0; in GTE_Power()
472 IR0 = value; in GTE_WriteDR()
629 ret = (int16_t)IR0; in GTE_ReadDR()
1039 mulr[2] = IR0; in MultiplyMatrixByVector()
1242 IR0 = Lm_H(((int64_t)DQB + DQA * h_div_sz) >> 12); in TransformDQ()
1649 MAC[1] = (IR0 * IR1) >> sf; in GPF()
1650 MAC[2] = (IR0 * IR2) >> sf; in GPF()
1651 MAC[3] = (IR0 * IR3) >> sf; in GPF()
1665 MAC[1] = i64_to_i44(0, (int64_t)((uint64_t)(int64_t)MAC[1] << sf) + (IR0 * IR1)) >> sf; in GPL()
[all …]

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