| /dports/security/clamav-lts/clamav-0.103.5/libclamav/c++/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | FastISel.cpp | 311 bool FastISel::SelectBinaryOp(const User *I, unsigned ISDOpcode) { in SelectBinaryOp() argument
325 (ISDOpcode == ISD::AND || ISDOpcode == ISD::OR || in SelectBinaryOp()
326 ISDOpcode == ISD::XOR)) in SelectBinaryOp()
342 ISDOpcode, Op0, Op0IsKill, in SelectBinaryOp()
354 ISDOpcode, Op0, Op0IsKill, CF); in SelectBinaryOp()
371 ISDOpcode, in SelectBinaryOp()
|
| /dports/devel/llvm70/llvm-7.0.1.src/lib/Target/RISCV/ |
| H A D | RISCVInstrInfoM.td | 46 // No ISDOpcode for mulhsu
|
| /dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | FastISel.cpp | 598 bool FastISel::selectBinaryOp(const User *I, unsigned ISDOpcode) { in selectBinaryOp() argument
611 if (VT == MVT::i1 && (ISDOpcode == ISD::AND || ISDOpcode == ISD::OR || in selectBinaryOp()
612 ISDOpcode == ISD::XOR)) in selectBinaryOp()
628 fastEmit_ri_(VT.getSimpleVT(), ISDOpcode, Op1, Op1IsKill, in selectBinaryOp()
648 if (ISDOpcode == ISD::SDIV && isa<BinaryOperator>(I) && in selectBinaryOp()
651 ISDOpcode = ISD::SRA; in selectBinaryOp()
655 if (ISDOpcode == ISD::UREM && isa<BinaryOperator>(I) && in selectBinaryOp()
658 ISDOpcode = ISD::AND; in selectBinaryOp()
661 Register ResultReg = fastEmit_ri_(VT.getSimpleVT(), ISDOpcode, Op0, in selectBinaryOp()
678 ISDOpcode, Op0, Op0IsKill, Op1, Op1IsKill); in selectBinaryOp()
|
| /dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | FastISel.cpp | 598 bool FastISel::selectBinaryOp(const User *I, unsigned ISDOpcode) { in selectBinaryOp() argument
611 if (VT == MVT::i1 && (ISDOpcode == ISD::AND || ISDOpcode == ISD::OR || in selectBinaryOp()
612 ISDOpcode == ISD::XOR)) in selectBinaryOp()
628 fastEmit_ri_(VT.getSimpleVT(), ISDOpcode, Op1, Op1IsKill, in selectBinaryOp()
648 if (ISDOpcode == ISD::SDIV && isa<BinaryOperator>(I) && in selectBinaryOp()
651 ISDOpcode = ISD::SRA; in selectBinaryOp()
655 if (ISDOpcode == ISD::UREM && isa<BinaryOperator>(I) && in selectBinaryOp()
658 ISDOpcode = ISD::AND; in selectBinaryOp()
661 Register ResultReg = fastEmit_ri_(VT.getSimpleVT(), ISDOpcode, Op0, in selectBinaryOp()
678 ISDOpcode, Op0, Op0IsKill, Op1, Op1IsKill); in selectBinaryOp()
|
| /dports/devel/llvm10/llvm-10.0.1.src/lib/CodeGen/SelectionDAG/ |
| H A D | FastISel.cpp | 599 bool FastISel::selectBinaryOp(const User *I, unsigned ISDOpcode) { in selectBinaryOp() argument
612 if (VT == MVT::i1 && (ISDOpcode == ISD::AND || ISDOpcode == ISD::OR || in selectBinaryOp()
613 ISDOpcode == ISD::XOR)) in selectBinaryOp()
629 fastEmit_ri_(VT.getSimpleVT(), ISDOpcode, Op1, Op1IsKill, in selectBinaryOp()
649 if (ISDOpcode == ISD::SDIV && isa<BinaryOperator>(I) && in selectBinaryOp()
652 ISDOpcode = ISD::SRA; in selectBinaryOp()
656 if (ISDOpcode == ISD::UREM && isa<BinaryOperator>(I) && in selectBinaryOp()
659 ISDOpcode = ISD::AND; in selectBinaryOp()
662 unsigned ResultReg = fastEmit_ri_(VT.getSimpleVT(), ISDOpcode, Op0, in selectBinaryOp()
679 ISDOpcode, Op0, Op0IsKill, Op1, Op1IsKill); in selectBinaryOp()
|
| /dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | FastISel.cpp | 452 bool FastISel::selectBinaryOp(const User *I, unsigned ISDOpcode) { in selectBinaryOp() argument
465 if (VT == MVT::i1 && (ISDOpcode == ISD::AND || ISDOpcode == ISD::OR || in selectBinaryOp()
466 ISDOpcode == ISD::XOR)) in selectBinaryOp()
481 fastEmit_ri_(VT.getSimpleVT(), ISDOpcode, Op1, CI->getZExtValue(), in selectBinaryOp()
500 if (ISDOpcode == ISD::SDIV && isa<BinaryOperator>(I) && in selectBinaryOp()
503 ISDOpcode = ISD::SRA; in selectBinaryOp()
507 if (ISDOpcode == ISD::UREM && isa<BinaryOperator>(I) && in selectBinaryOp()
510 ISDOpcode = ISD::AND; in selectBinaryOp()
513 Register ResultReg = fastEmit_ri_(VT.getSimpleVT(), ISDOpcode, Op0, Imm, in selectBinaryOp()
529 ISDOpcode, Op0, Op1); in selectBinaryOp()
|
| /dports/graphics/llvm-mesa/llvm-13.0.1.src/lib/CodeGen/SelectionDAG/ |
| H A D | FastISel.cpp | 452 bool FastISel::selectBinaryOp(const User *I, unsigned ISDOpcode) { in selectBinaryOp() argument
465 if (VT == MVT::i1 && (ISDOpcode == ISD::AND || ISDOpcode == ISD::OR || in selectBinaryOp()
466 ISDOpcode == ISD::XOR)) in selectBinaryOp()
481 fastEmit_ri_(VT.getSimpleVT(), ISDOpcode, Op1, CI->getZExtValue(), in selectBinaryOp()
500 if (ISDOpcode == ISD::SDIV && isa<BinaryOperator>(I) && in selectBinaryOp()
503 ISDOpcode = ISD::SRA; in selectBinaryOp()
507 if (ISDOpcode == ISD::UREM && isa<BinaryOperator>(I) && in selectBinaryOp()
510 ISDOpcode = ISD::AND; in selectBinaryOp()
513 Register ResultReg = fastEmit_ri_(VT.getSimpleVT(), ISDOpcode, Op0, Imm, in selectBinaryOp()
529 ISDOpcode, Op0, Op1); in selectBinaryOp()
|
| /dports/devel/llvm12/llvm-project-12.0.1.src/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | FastISel.cpp | 493 bool FastISel::selectBinaryOp(const User *I, unsigned ISDOpcode) { in selectBinaryOp() argument
506 if (VT == MVT::i1 && (ISDOpcode == ISD::AND || ISDOpcode == ISD::OR || in selectBinaryOp()
507 ISDOpcode == ISD::XOR)) in selectBinaryOp()
523 fastEmit_ri_(VT.getSimpleVT(), ISDOpcode, Op1, Op1IsKill, in selectBinaryOp()
543 if (ISDOpcode == ISD::SDIV && isa<BinaryOperator>(I) && in selectBinaryOp()
546 ISDOpcode = ISD::SRA; in selectBinaryOp()
550 if (ISDOpcode == ISD::UREM && isa<BinaryOperator>(I) && in selectBinaryOp()
553 ISDOpcode = ISD::AND; in selectBinaryOp()
556 Register ResultReg = fastEmit_ri_(VT.getSimpleVT(), ISDOpcode, Op0, in selectBinaryOp()
573 ISDOpcode, Op0, Op0IsKill, Op1, Op1IsKill); in selectBinaryOp()
|
| /dports/devel/llvm11/llvm-11.0.1.src/lib/CodeGen/SelectionDAG/ |
| H A D | FastISel.cpp | 598 bool FastISel::selectBinaryOp(const User *I, unsigned ISDOpcode) { in selectBinaryOp() argument
611 if (VT == MVT::i1 && (ISDOpcode == ISD::AND || ISDOpcode == ISD::OR || in selectBinaryOp()
612 ISDOpcode == ISD::XOR)) in selectBinaryOp()
628 fastEmit_ri_(VT.getSimpleVT(), ISDOpcode, Op1, Op1IsKill, in selectBinaryOp()
648 if (ISDOpcode == ISD::SDIV && isa<BinaryOperator>(I) && in selectBinaryOp()
651 ISDOpcode = ISD::SRA; in selectBinaryOp()
655 if (ISDOpcode == ISD::UREM && isa<BinaryOperator>(I) && in selectBinaryOp()
658 ISDOpcode = ISD::AND; in selectBinaryOp()
661 Register ResultReg = fastEmit_ri_(VT.getSimpleVT(), ISDOpcode, Op0, in selectBinaryOp()
678 ISDOpcode, Op0, Op0IsKill, Op1, Op1IsKill); in selectBinaryOp()
|
| /dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | FastISel.cpp | 584 bool FastISel::selectBinaryOp(const User *I, unsigned ISDOpcode) { in selectBinaryOp() argument
597 if (VT == MVT::i1 && (ISDOpcode == ISD::AND || ISDOpcode == ISD::OR || in selectBinaryOp()
598 ISDOpcode == ISD::XOR)) in selectBinaryOp()
614 fastEmit_ri_(VT.getSimpleVT(), ISDOpcode, Op1, Op1IsKill, in selectBinaryOp()
634 if (ISDOpcode == ISD::SDIV && isa<BinaryOperator>(I) && in selectBinaryOp()
637 ISDOpcode = ISD::SRA; in selectBinaryOp()
641 if (ISDOpcode == ISD::UREM && isa<BinaryOperator>(I) && in selectBinaryOp()
644 ISDOpcode = ISD::AND; in selectBinaryOp()
647 unsigned ResultReg = fastEmit_ri_(VT.getSimpleVT(), ISDOpcode, Op0, in selectBinaryOp()
664 ISDOpcode, Op0, Op0IsKill, Op1, Op1IsKill); in selectBinaryOp()
|
| /dports/lang/rust/rustc-1.58.1-src/src/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | FastISel.cpp | 452 bool FastISel::selectBinaryOp(const User *I, unsigned ISDOpcode) { in selectBinaryOp() argument
465 if (VT == MVT::i1 && (ISDOpcode == ISD::AND || ISDOpcode == ISD::OR || in selectBinaryOp()
466 ISDOpcode == ISD::XOR)) in selectBinaryOp()
481 fastEmit_ri_(VT.getSimpleVT(), ISDOpcode, Op1, CI->getZExtValue(), in selectBinaryOp()
500 if (ISDOpcode == ISD::SDIV && isa<BinaryOperator>(I) && in selectBinaryOp()
503 ISDOpcode = ISD::SRA; in selectBinaryOp()
507 if (ISDOpcode == ISD::UREM && isa<BinaryOperator>(I) && in selectBinaryOp()
510 ISDOpcode = ISD::AND; in selectBinaryOp()
513 Register ResultReg = fastEmit_ri_(VT.getSimpleVT(), ISDOpcode, Op0, Imm, in selectBinaryOp()
529 ISDOpcode, Op0, Op1); in selectBinaryOp()
|
| /dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | FastISel.cpp | 453 bool FastISel::selectBinaryOp(const User *I, unsigned ISDOpcode) { in selectBinaryOp() argument
466 if (VT == MVT::i1 && (ISDOpcode == ISD::AND || ISDOpcode == ISD::OR || in selectBinaryOp()
467 ISDOpcode == ISD::XOR)) in selectBinaryOp()
482 fastEmit_ri_(VT.getSimpleVT(), ISDOpcode, Op1, CI->getZExtValue(), in selectBinaryOp()
501 if (ISDOpcode == ISD::SDIV && isa<BinaryOperator>(I) && in selectBinaryOp()
504 ISDOpcode = ISD::SRA; in selectBinaryOp()
508 if (ISDOpcode == ISD::UREM && isa<BinaryOperator>(I) && in selectBinaryOp()
511 ISDOpcode = ISD::AND; in selectBinaryOp()
514 Register ResultReg = fastEmit_ri_(VT.getSimpleVT(), ISDOpcode, Op0, Imm, in selectBinaryOp()
530 ISDOpcode, Op0, Op1); in selectBinaryOp()
|
| /dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | FastISel.cpp | 452 bool FastISel::selectBinaryOp(const User *I, unsigned ISDOpcode) { in selectBinaryOp() argument
465 if (VT == MVT::i1 && (ISDOpcode == ISD::AND || ISDOpcode == ISD::OR || in selectBinaryOp()
466 ISDOpcode == ISD::XOR)) in selectBinaryOp()
481 fastEmit_ri_(VT.getSimpleVT(), ISDOpcode, Op1, CI->getZExtValue(), in selectBinaryOp()
500 if (ISDOpcode == ISD::SDIV && isa<BinaryOperator>(I) && in selectBinaryOp()
503 ISDOpcode = ISD::SRA; in selectBinaryOp()
507 if (ISDOpcode == ISD::UREM && isa<BinaryOperator>(I) && in selectBinaryOp()
510 ISDOpcode = ISD::AND; in selectBinaryOp()
513 Register ResultReg = fastEmit_ri_(VT.getSimpleVT(), ISDOpcode, Op0, Imm, in selectBinaryOp()
529 ISDOpcode, Op0, Op1); in selectBinaryOp()
|
| /dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | FastISel.cpp | 493 bool FastISel::selectBinaryOp(const User *I, unsigned ISDOpcode) { in selectBinaryOp() argument
506 if (VT == MVT::i1 && (ISDOpcode == ISD::AND || ISDOpcode == ISD::OR || in selectBinaryOp()
507 ISDOpcode == ISD::XOR)) in selectBinaryOp()
523 fastEmit_ri_(VT.getSimpleVT(), ISDOpcode, Op1, Op1IsKill, in selectBinaryOp()
543 if (ISDOpcode == ISD::SDIV && isa<BinaryOperator>(I) && in selectBinaryOp()
546 ISDOpcode = ISD::SRA; in selectBinaryOp()
550 if (ISDOpcode == ISD::UREM && isa<BinaryOperator>(I) && in selectBinaryOp()
553 ISDOpcode = ISD::AND; in selectBinaryOp()
556 Register ResultReg = fastEmit_ri_(VT.getSimpleVT(), ISDOpcode, Op0, in selectBinaryOp()
573 ISDOpcode, Op0, Op0IsKill, Op1, Op1IsKill); in selectBinaryOp()
|
| /dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | FastISel.cpp | 599 bool FastISel::selectBinaryOp(const User *I, unsigned ISDOpcode) { in selectBinaryOp() argument
612 if (VT == MVT::i1 && (ISDOpcode == ISD::AND || ISDOpcode == ISD::OR || in selectBinaryOp()
613 ISDOpcode == ISD::XOR)) in selectBinaryOp()
629 fastEmit_ri_(VT.getSimpleVT(), ISDOpcode, Op1, Op1IsKill, in selectBinaryOp()
649 if (ISDOpcode == ISD::SDIV && isa<BinaryOperator>(I) && in selectBinaryOp()
652 ISDOpcode = ISD::SRA; in selectBinaryOp()
656 if (ISDOpcode == ISD::UREM && isa<BinaryOperator>(I) && in selectBinaryOp()
659 ISDOpcode = ISD::AND; in selectBinaryOp()
662 unsigned ResultReg = fastEmit_ri_(VT.getSimpleVT(), ISDOpcode, Op0, in selectBinaryOp()
679 ISDOpcode, Op0, Op0IsKill, Op1, Op1IsKill); in selectBinaryOp()
|
| /dports/devel/llvm90/llvm-9.0.1.src/lib/CodeGen/SelectionDAG/ |
| H A D | FastISel.cpp | 584 bool FastISel::selectBinaryOp(const User *I, unsigned ISDOpcode) { in selectBinaryOp() argument
597 if (VT == MVT::i1 && (ISDOpcode == ISD::AND || ISDOpcode == ISD::OR || in selectBinaryOp()
598 ISDOpcode == ISD::XOR)) in selectBinaryOp()
614 fastEmit_ri_(VT.getSimpleVT(), ISDOpcode, Op1, Op1IsKill, in selectBinaryOp()
634 if (ISDOpcode == ISD::SDIV && isa<BinaryOperator>(I) && in selectBinaryOp()
637 ISDOpcode = ISD::SRA; in selectBinaryOp()
641 if (ISDOpcode == ISD::UREM && isa<BinaryOperator>(I) && in selectBinaryOp()
644 ISDOpcode = ISD::AND; in selectBinaryOp()
647 unsigned ResultReg = fastEmit_ri_(VT.getSimpleVT(), ISDOpcode, Op0, in selectBinaryOp()
664 ISDOpcode, Op0, Op0IsKill, Op1, Op1IsKill); in selectBinaryOp()
|
| /dports/devel/llvm80/llvm-8.0.1.src/lib/CodeGen/SelectionDAG/ |
| H A D | FastISel.cpp | 585 bool FastISel::selectBinaryOp(const User *I, unsigned ISDOpcode) { in selectBinaryOp() argument
598 if (VT == MVT::i1 && (ISDOpcode == ISD::AND || ISDOpcode == ISD::OR || in selectBinaryOp()
599 ISDOpcode == ISD::XOR)) in selectBinaryOp()
615 fastEmit_ri_(VT.getSimpleVT(), ISDOpcode, Op1, Op1IsKill, in selectBinaryOp()
635 if (ISDOpcode == ISD::SDIV && isa<BinaryOperator>(I) && in selectBinaryOp()
638 ISDOpcode = ISD::SRA; in selectBinaryOp()
642 if (ISDOpcode == ISD::UREM && isa<BinaryOperator>(I) && in selectBinaryOp()
645 ISDOpcode = ISD::AND; in selectBinaryOp()
648 unsigned ResultReg = fastEmit_ri_(VT.getSimpleVT(), ISDOpcode, Op0, in selectBinaryOp()
665 ISDOpcode, Op0, Op0IsKill, Op1, Op1IsKill); in selectBinaryOp()
|
| /dports/devel/llvm13/llvm-project-13.0.1.src/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | FastISel.cpp | 452 bool FastISel::selectBinaryOp(const User *I, unsigned ISDOpcode) { in selectBinaryOp() argument
465 if (VT == MVT::i1 && (ISDOpcode == ISD::AND || ISDOpcode == ISD::OR || in selectBinaryOp()
466 ISDOpcode == ISD::XOR)) in selectBinaryOp()
481 fastEmit_ri_(VT.getSimpleVT(), ISDOpcode, Op1, CI->getZExtValue(), in selectBinaryOp()
500 if (ISDOpcode == ISD::SDIV && isa<BinaryOperator>(I) && in selectBinaryOp()
503 ISDOpcode = ISD::SRA; in selectBinaryOp()
507 if (ISDOpcode == ISD::UREM && isa<BinaryOperator>(I) && in selectBinaryOp()
510 ISDOpcode = ISD::AND; in selectBinaryOp()
513 Register ResultReg = fastEmit_ri_(VT.getSimpleVT(), ISDOpcode, Op0, Imm, in selectBinaryOp()
529 ISDOpcode, Op0, Op1); in selectBinaryOp()
|
| /dports/devel/llvm70/llvm-7.0.1.src/lib/CodeGen/SelectionDAG/ |
| H A D | FastISel.cpp | 574 bool FastISel::selectBinaryOp(const User *I, unsigned ISDOpcode) {
587 if (VT == MVT::i1 && (ISDOpcode == ISD::AND || ISDOpcode == ISD::OR ||
588 ISDOpcode == ISD::XOR))
604 fastEmit_ri_(VT.getSimpleVT(), ISDOpcode, Op1, Op1IsKill,
624 if (ISDOpcode == ISD::SDIV && isa<BinaryOperator>(I) &&
627 ISDOpcode = ISD::SRA;
631 if (ISDOpcode == ISD::UREM && isa<BinaryOperator>(I) &&
634 ISDOpcode = ISD::AND;
637 unsigned ResultReg = fastEmit_ri_(VT.getSimpleVT(), ISDOpcode, Op0,
654 ISDOpcode, Op0, Op0IsKill, Op1, Op1IsKill);
|
| /dports/security/clamav-lts/clamav-0.103.5/libclamav/c++/llvm/include/llvm/CodeGen/ |
| H A D | FastISel.h | 310 bool SelectBinaryOp(const User *I, unsigned ISDOpcode);
|
| /dports/devel/llvm90/llvm-9.0.1.src/lib/Target/RISCV/ |
| H A D | RISCVInstrInfoM.td | 53 // No ISDOpcode for mulhsu
|
| /dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVInstrInfoM.td | 66 // No ISDOpcode for mulhsu
|
| /dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/lib/Target/RISCV/ |
| H A D | RISCVInstrInfoM.td | 66 // No ISDOpcode for mulhsu
|
| /dports/devel/llvm10/llvm-10.0.1.src/lib/Target/RISCV/ |
| H A D | RISCVInstrInfoM.td | 66 // No ISDOpcode for mulhsu
|
| /dports/devel/llvm12/llvm-project-12.0.1.src/llvm/lib/Target/RISCV/ |
| H A D | RISCVInstrInfoM.td | 66 // No ISDOpcode for mulhsu
|