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Searched refs:IX_NPEDL_REG_READ (Results 1 – 21 of 21) sorted by relevance

/dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot-sam460ex/arch/arm/cpu/ixp/npe/
H A DIxNpeDlNpeMgrUtils.c207 IX_NPEDL_REG_READ (npeBaseAddress, IX_NPEDL_REG_OFFSET_EXDATA, &data); in ixNpeDlNpeMgrReadCommandIssue()
348 IX_NPEDL_REG_READ (npeBaseAddress, IX_NPEDL_REG_OFFSET_EXCT, in ixNpeDlNpeMgrDebugInstructionPreExec()
409 IX_NPEDL_REG_READ (npeBaseAddress, IX_NPEDL_REG_OFFSET_WC, &oldWatchcount); in ixNpeDlNpeMgrDebugInstructionExec()
415 IX_NPEDL_REG_READ (npeBaseAddress, IX_NPEDL_REG_OFFSET_WC, in ixNpeDlNpeMgrDebugInstructionExec()
428 IX_NPEDL_REG_READ (npeBaseAddress, IX_NPEDL_REG_OFFSET_WC, in ixNpeDlNpeMgrDebugInstructionExec()
521 IX_NPEDL_REG_READ (npeBaseAddress, IX_NPEDL_REG_OFFSET_EXDATA, regVal); in ixNpeDlNpeMgrLogicalRegRead()
H A DIxNpeDlNpeMgr.c596 IX_NPEDL_REG_READ (npeBaseAddress, IX_NPEDL_REG_OFFSET_CTL, &ixNpeConfigCtrlRegVal); in ixNpeDlNpeMgrNpeReset()
613 IX_NPEDL_REG_READ (npeBaseAddress, IX_NPEDL_REG_OFFSET_WFIFO, in ixNpeDlNpeMgrNpeReset()
622 IX_NPEDL_REG_READ (npeBaseAddress, IX_NPEDL_REG_OFFSET_FIFO, in ixNpeDlNpeMgrNpeReset()
879 IX_NPEDL_REG_READ (npeBaseAddress, regOffset, &regVal); in ixNpeDlNpeMgrBitsSetCheck()
/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot-sam460ex/arch/arm/cpu/ixp/npe/
H A DIxNpeDlNpeMgrUtils.c207 IX_NPEDL_REG_READ (npeBaseAddress, IX_NPEDL_REG_OFFSET_EXDATA, &data); in ixNpeDlNpeMgrReadCommandIssue()
348 IX_NPEDL_REG_READ (npeBaseAddress, IX_NPEDL_REG_OFFSET_EXCT, in ixNpeDlNpeMgrDebugInstructionPreExec()
409 IX_NPEDL_REG_READ (npeBaseAddress, IX_NPEDL_REG_OFFSET_WC, &oldWatchcount); in ixNpeDlNpeMgrDebugInstructionExec()
415 IX_NPEDL_REG_READ (npeBaseAddress, IX_NPEDL_REG_OFFSET_WC, in ixNpeDlNpeMgrDebugInstructionExec()
428 IX_NPEDL_REG_READ (npeBaseAddress, IX_NPEDL_REG_OFFSET_WC, in ixNpeDlNpeMgrDebugInstructionExec()
521 IX_NPEDL_REG_READ (npeBaseAddress, IX_NPEDL_REG_OFFSET_EXDATA, regVal); in ixNpeDlNpeMgrLogicalRegRead()
H A DIxNpeDlNpeMgr.c596 IX_NPEDL_REG_READ (npeBaseAddress, IX_NPEDL_REG_OFFSET_CTL, &ixNpeConfigCtrlRegVal); in ixNpeDlNpeMgrNpeReset()
613 IX_NPEDL_REG_READ (npeBaseAddress, IX_NPEDL_REG_OFFSET_WFIFO, in ixNpeDlNpeMgrNpeReset()
622 IX_NPEDL_REG_READ (npeBaseAddress, IX_NPEDL_REG_OFFSET_FIFO, in ixNpeDlNpeMgrNpeReset()
879 IX_NPEDL_REG_READ (npeBaseAddress, regOffset, &regVal); in ixNpeDlNpeMgrBitsSetCheck()
/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot-sam460ex/arch/arm/cpu/ixp/npe/
H A DIxNpeDlNpeMgrUtils.c207 IX_NPEDL_REG_READ (npeBaseAddress, IX_NPEDL_REG_OFFSET_EXDATA, &data); in ixNpeDlNpeMgrReadCommandIssue()
348 IX_NPEDL_REG_READ (npeBaseAddress, IX_NPEDL_REG_OFFSET_EXCT, in ixNpeDlNpeMgrDebugInstructionPreExec()
409 IX_NPEDL_REG_READ (npeBaseAddress, IX_NPEDL_REG_OFFSET_WC, &oldWatchcount); in ixNpeDlNpeMgrDebugInstructionExec()
415 IX_NPEDL_REG_READ (npeBaseAddress, IX_NPEDL_REG_OFFSET_WC, in ixNpeDlNpeMgrDebugInstructionExec()
428 IX_NPEDL_REG_READ (npeBaseAddress, IX_NPEDL_REG_OFFSET_WC, in ixNpeDlNpeMgrDebugInstructionExec()
521 IX_NPEDL_REG_READ (npeBaseAddress, IX_NPEDL_REG_OFFSET_EXDATA, regVal); in ixNpeDlNpeMgrLogicalRegRead()
H A DIxNpeDlNpeMgr.c596 IX_NPEDL_REG_READ (npeBaseAddress, IX_NPEDL_REG_OFFSET_CTL, &ixNpeConfigCtrlRegVal); in ixNpeDlNpeMgrNpeReset()
613 IX_NPEDL_REG_READ (npeBaseAddress, IX_NPEDL_REG_OFFSET_WFIFO, in ixNpeDlNpeMgrNpeReset()
622 IX_NPEDL_REG_READ (npeBaseAddress, IX_NPEDL_REG_OFFSET_FIFO, in ixNpeDlNpeMgrNpeReset()
879 IX_NPEDL_REG_READ (npeBaseAddress, regOffset, &regVal); in ixNpeDlNpeMgrBitsSetCheck()
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/roms/u-boot-sam460ex/arch/arm/cpu/ixp/npe/
H A DIxNpeDlNpeMgrUtils.c207 IX_NPEDL_REG_READ (npeBaseAddress, IX_NPEDL_REG_OFFSET_EXDATA, &data); in ixNpeDlNpeMgrReadCommandIssue()
348 IX_NPEDL_REG_READ (npeBaseAddress, IX_NPEDL_REG_OFFSET_EXCT, in ixNpeDlNpeMgrDebugInstructionPreExec()
409 IX_NPEDL_REG_READ (npeBaseAddress, IX_NPEDL_REG_OFFSET_WC, &oldWatchcount); in ixNpeDlNpeMgrDebugInstructionExec()
415 IX_NPEDL_REG_READ (npeBaseAddress, IX_NPEDL_REG_OFFSET_WC, in ixNpeDlNpeMgrDebugInstructionExec()
428 IX_NPEDL_REG_READ (npeBaseAddress, IX_NPEDL_REG_OFFSET_WC, in ixNpeDlNpeMgrDebugInstructionExec()
521 IX_NPEDL_REG_READ (npeBaseAddress, IX_NPEDL_REG_OFFSET_EXDATA, regVal); in ixNpeDlNpeMgrLogicalRegRead()
H A DIxNpeDlNpeMgr.c596 IX_NPEDL_REG_READ (npeBaseAddress, IX_NPEDL_REG_OFFSET_CTL, &ixNpeConfigCtrlRegVal); in ixNpeDlNpeMgrNpeReset()
613 IX_NPEDL_REG_READ (npeBaseAddress, IX_NPEDL_REG_OFFSET_WFIFO, in ixNpeDlNpeMgrNpeReset()
622 IX_NPEDL_REG_READ (npeBaseAddress, IX_NPEDL_REG_OFFSET_FIFO, in ixNpeDlNpeMgrNpeReset()
879 IX_NPEDL_REG_READ (npeBaseAddress, regOffset, &regVal); in ixNpeDlNpeMgrBitsSetCheck()
/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot-sam460ex/arch/arm/cpu/ixp/npe/
H A DIxNpeDlNpeMgrUtils.c207 IX_NPEDL_REG_READ (npeBaseAddress, IX_NPEDL_REG_OFFSET_EXDATA, &data); in ixNpeDlNpeMgrReadCommandIssue()
348 IX_NPEDL_REG_READ (npeBaseAddress, IX_NPEDL_REG_OFFSET_EXCT, in ixNpeDlNpeMgrDebugInstructionPreExec()
409 IX_NPEDL_REG_READ (npeBaseAddress, IX_NPEDL_REG_OFFSET_WC, &oldWatchcount); in ixNpeDlNpeMgrDebugInstructionExec()
415 IX_NPEDL_REG_READ (npeBaseAddress, IX_NPEDL_REG_OFFSET_WC, in ixNpeDlNpeMgrDebugInstructionExec()
428 IX_NPEDL_REG_READ (npeBaseAddress, IX_NPEDL_REG_OFFSET_WC, in ixNpeDlNpeMgrDebugInstructionExec()
521 IX_NPEDL_REG_READ (npeBaseAddress, IX_NPEDL_REG_OFFSET_EXDATA, regVal); in ixNpeDlNpeMgrLogicalRegRead()
H A DIxNpeDlNpeMgr.c596 IX_NPEDL_REG_READ (npeBaseAddress, IX_NPEDL_REG_OFFSET_CTL, &ixNpeConfigCtrlRegVal); in ixNpeDlNpeMgrNpeReset()
613 IX_NPEDL_REG_READ (npeBaseAddress, IX_NPEDL_REG_OFFSET_WFIFO, in ixNpeDlNpeMgrNpeReset()
622 IX_NPEDL_REG_READ (npeBaseAddress, IX_NPEDL_REG_OFFSET_FIFO, in ixNpeDlNpeMgrNpeReset()
879 IX_NPEDL_REG_READ (npeBaseAddress, regOffset, &regVal); in ixNpeDlNpeMgrBitsSetCheck()
/dports/emulators/qemu/qemu-6.2.0/roms/u-boot-sam460ex/arch/arm/cpu/ixp/npe/
H A DIxNpeDlNpeMgrUtils.c207 IX_NPEDL_REG_READ (npeBaseAddress, IX_NPEDL_REG_OFFSET_EXDATA, &data); in ixNpeDlNpeMgrReadCommandIssue()
348 IX_NPEDL_REG_READ (npeBaseAddress, IX_NPEDL_REG_OFFSET_EXCT, in ixNpeDlNpeMgrDebugInstructionPreExec()
409 IX_NPEDL_REG_READ (npeBaseAddress, IX_NPEDL_REG_OFFSET_WC, &oldWatchcount); in ixNpeDlNpeMgrDebugInstructionExec()
415 IX_NPEDL_REG_READ (npeBaseAddress, IX_NPEDL_REG_OFFSET_WC, in ixNpeDlNpeMgrDebugInstructionExec()
428 IX_NPEDL_REG_READ (npeBaseAddress, IX_NPEDL_REG_OFFSET_WC, in ixNpeDlNpeMgrDebugInstructionExec()
521 IX_NPEDL_REG_READ (npeBaseAddress, IX_NPEDL_REG_OFFSET_EXDATA, regVal); in ixNpeDlNpeMgrLogicalRegRead()
H A DIxNpeDlNpeMgr.c596 IX_NPEDL_REG_READ (npeBaseAddress, IX_NPEDL_REG_OFFSET_CTL, &ixNpeConfigCtrlRegVal); in ixNpeDlNpeMgrNpeReset()
613 IX_NPEDL_REG_READ (npeBaseAddress, IX_NPEDL_REG_OFFSET_WFIFO, in ixNpeDlNpeMgrNpeReset()
622 IX_NPEDL_REG_READ (npeBaseAddress, IX_NPEDL_REG_OFFSET_FIFO, in ixNpeDlNpeMgrNpeReset()
879 IX_NPEDL_REG_READ (npeBaseAddress, regOffset, &regVal); in ixNpeDlNpeMgrBitsSetCheck()
/dports/emulators/qemu60/qemu-6.0.0/roms/u-boot-sam460ex/arch/arm/cpu/ixp/npe/
H A DIxNpeDlNpeMgrUtils.c207 IX_NPEDL_REG_READ (npeBaseAddress, IX_NPEDL_REG_OFFSET_EXDATA, &data); in ixNpeDlNpeMgrReadCommandIssue()
348 IX_NPEDL_REG_READ (npeBaseAddress, IX_NPEDL_REG_OFFSET_EXCT, in ixNpeDlNpeMgrDebugInstructionPreExec()
409 IX_NPEDL_REG_READ (npeBaseAddress, IX_NPEDL_REG_OFFSET_WC, &oldWatchcount); in ixNpeDlNpeMgrDebugInstructionExec()
415 IX_NPEDL_REG_READ (npeBaseAddress, IX_NPEDL_REG_OFFSET_WC, in ixNpeDlNpeMgrDebugInstructionExec()
428 IX_NPEDL_REG_READ (npeBaseAddress, IX_NPEDL_REG_OFFSET_WC, in ixNpeDlNpeMgrDebugInstructionExec()
521 IX_NPEDL_REG_READ (npeBaseAddress, IX_NPEDL_REG_OFFSET_EXDATA, regVal); in ixNpeDlNpeMgrLogicalRegRead()
H A DIxNpeDlNpeMgr.c596 IX_NPEDL_REG_READ (npeBaseAddress, IX_NPEDL_REG_OFFSET_CTL, &ixNpeConfigCtrlRegVal); in ixNpeDlNpeMgrNpeReset()
613 IX_NPEDL_REG_READ (npeBaseAddress, IX_NPEDL_REG_OFFSET_WFIFO, in ixNpeDlNpeMgrNpeReset()
622 IX_NPEDL_REG_READ (npeBaseAddress, IX_NPEDL_REG_OFFSET_FIFO, in ixNpeDlNpeMgrNpeReset()
879 IX_NPEDL_REG_READ (npeBaseAddress, regOffset, &regVal); in ixNpeDlNpeMgrBitsSetCheck()
/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot-sam460ex/arch/arm/cpu/ixp/npe/include/
H A DIxNpeDlMacros_p.h241 #define IX_NPEDL_REG_READ(base, offset, value) \ macro
405 #define IX_NPEDL_REG_READ(base, offset, value) \ macro
/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot-sam460ex/arch/arm/cpu/ixp/npe/include/
H A DIxNpeDlMacros_p.h241 #define IX_NPEDL_REG_READ(base, offset, value) \
405 #define IX_NPEDL_REG_READ(base, offset, value) \
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/roms/u-boot-sam460ex/arch/arm/cpu/ixp/npe/include/
H A DIxNpeDlMacros_p.h241 #define IX_NPEDL_REG_READ(base, offset, value) \ macro
405 #define IX_NPEDL_REG_READ(base, offset, value) \ macro
/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot-sam460ex/arch/arm/cpu/ixp/npe/include/
H A DIxNpeDlMacros_p.h241 #define IX_NPEDL_REG_READ(base, offset, value) \ macro
405 #define IX_NPEDL_REG_READ(base, offset, value) \ macro
/dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot-sam460ex/arch/arm/cpu/ixp/npe/include/
H A DIxNpeDlMacros_p.h241 #define IX_NPEDL_REG_READ(base, offset, value) \ macro
405 #define IX_NPEDL_REG_READ(base, offset, value) \ macro
/dports/emulators/qemu/qemu-6.2.0/roms/u-boot-sam460ex/arch/arm/cpu/ixp/npe/include/
H A DIxNpeDlMacros_p.h241 #define IX_NPEDL_REG_READ(base, offset, value) \ macro
405 #define IX_NPEDL_REG_READ(base, offset, value) \ macro
/dports/emulators/qemu60/qemu-6.0.0/roms/u-boot-sam460ex/arch/arm/cpu/ixp/npe/include/
H A DIxNpeDlMacros_p.h241 #define IX_NPEDL_REG_READ(base, offset, value) \ macro
405 #define IX_NPEDL_REG_READ(base, offset, value) \ macro