/dports/devel/intel-graphics-compiler/intel-graphics-compiler-igc-1.0.9636/visa/ |
H A D | G4_SendDescs.hpp | 107 struct ImmOff { struct 113 ImmOff(int imm) : is2d(false), immOff(imm) { } in ImmOff() function 114 ImmOff(short immX, short immY) : is2d(true), immOffX(immX), immOffY(immY) { } in ImmOff() argument 115 ImmOff() : ImmOff(0) { } in ImmOff() function 342 ImmOff immOff; 378 ImmOff _immOff,
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/dports/graphics/llvm-mesa/llvm-13.0.1.src/lib/Target/AArch64/ |
H A D | AArch64ISelDAGToDAG.cpp | 1136 static bool isPreferredADD(int64_t ImmOff) { in isPreferredADD() argument 1138 if ((ImmOff & 0xfffffffffffff000LL) == 0x0LL) in isPreferredADD() 1141 if ((ImmOff & 0xffffffffff000fffLL) == 0x0LL) in isPreferredADD() 1143 return (ImmOff & 0xffffffffff00ffffLL) != 0x0LL && in isPreferredADD() 1144 (ImmOff & 0xffffffffffff0fffLL) != 0x0LL; in isPreferredADD() 1179 int64_t ImmOff = (int64_t)cast<ConstantSDNode>(RHS)->getZExtValue(); in SelectAddrModeXRO() local 1184 if ((ImmOff % Size == 0 && ImmOff >= 0 && ImmOff < (0x1000 << Scale)) || in SelectAddrModeXRO() 1185 isPreferredADD(ImmOff) || isPreferredADD(-ImmOff)) in SelectAddrModeXRO() 5038 int64_t ImmOff = C->getSExtValue(); in SelectSVERegRegAddrMode() local 5043 if (ImmOff % Size) in SelectSVERegRegAddrMode() [all …]
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/dports/lang/rust/rustc-1.58.1-src/src/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelDAGToDAG.cpp | 1136 static bool isPreferredADD(int64_t ImmOff) { in isPreferredADD() argument 1138 if ((ImmOff & 0xfffffffffffff000LL) == 0x0LL) in isPreferredADD() 1141 if ((ImmOff & 0xffffffffff000fffLL) == 0x0LL) in isPreferredADD() 1143 return (ImmOff & 0xffffffffff00ffffLL) != 0x0LL && in isPreferredADD() 1144 (ImmOff & 0xffffffffffff0fffLL) != 0x0LL; in isPreferredADD() 1179 int64_t ImmOff = (int64_t)cast<ConstantSDNode>(RHS)->getZExtValue(); in SelectAddrModeXRO() local 1184 if ((ImmOff % Size == 0 && ImmOff >= 0 && ImmOff < (0x1000 << Scale)) || in SelectAddrModeXRO() 1185 isPreferredADD(ImmOff) || isPreferredADD(-ImmOff)) in SelectAddrModeXRO() 5038 int64_t ImmOff = C->getSExtValue(); in SelectSVERegRegAddrMode() local 5043 if (ImmOff % Size) in SelectSVERegRegAddrMode() [all …]
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/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelDAGToDAG.cpp | 1136 static bool isPreferredADD(int64_t ImmOff) { in isPreferredADD() argument 1138 if ((ImmOff & 0xfffffffffffff000LL) == 0x0LL) in isPreferredADD() 1141 if ((ImmOff & 0xffffffffff000fffLL) == 0x0LL) in isPreferredADD() 1143 return (ImmOff & 0xffffffffff00ffffLL) != 0x0LL && in isPreferredADD() 1144 (ImmOff & 0xffffffffffff0fffLL) != 0x0LL; in isPreferredADD() 1179 int64_t ImmOff = (int64_t)cast<ConstantSDNode>(RHS)->getZExtValue(); in SelectAddrModeXRO() local 1184 if ((ImmOff % Size == 0 && ImmOff >= 0 && ImmOff < (0x1000 << Scale)) || in SelectAddrModeXRO() 1185 isPreferredADD(ImmOff) || isPreferredADD(-ImmOff)) in SelectAddrModeXRO() 5037 int64_t ImmOff = C->getSExtValue(); in SelectSVERegRegAddrMode() local 5042 if (ImmOff % Size) in SelectSVERegRegAddrMode() [all …]
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/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelDAGToDAG.cpp | 1136 static bool isPreferredADD(int64_t ImmOff) { in isPreferredADD() argument 1138 if ((ImmOff & 0xfffffffffffff000LL) == 0x0LL) in isPreferredADD() 1141 if ((ImmOff & 0xffffffffff000fffLL) == 0x0LL) in isPreferredADD() 1143 return (ImmOff & 0xffffffffff00ffffLL) != 0x0LL && in isPreferredADD() 1144 (ImmOff & 0xffffffffffff0fffLL) != 0x0LL; in isPreferredADD() 1179 int64_t ImmOff = (int64_t)cast<ConstantSDNode>(RHS)->getZExtValue(); in SelectAddrModeXRO() local 1184 if ((ImmOff % Size == 0 && ImmOff >= 0 && ImmOff < (0x1000 << Scale)) || in SelectAddrModeXRO() 1185 isPreferredADD(ImmOff) || isPreferredADD(-ImmOff)) in SelectAddrModeXRO() 5038 int64_t ImmOff = C->getSExtValue(); in SelectSVERegRegAddrMode() local 5043 if (ImmOff % Size) in SelectSVERegRegAddrMode() [all …]
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/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelDAGToDAG.cpp | 1136 static bool isPreferredADD(int64_t ImmOff) { in isPreferredADD() argument 1138 if ((ImmOff & 0xfffffffffffff000LL) == 0x0LL) in isPreferredADD() 1141 if ((ImmOff & 0xffffffffff000fffLL) == 0x0LL) in isPreferredADD() 1143 return (ImmOff & 0xffffffffff00ffffLL) != 0x0LL && in isPreferredADD() 1144 (ImmOff & 0xffffffffffff0fffLL) != 0x0LL; in isPreferredADD() 1179 int64_t ImmOff = (int64_t)cast<ConstantSDNode>(RHS)->getZExtValue(); in SelectAddrModeXRO() local 1184 if ((ImmOff % Size == 0 && ImmOff >= 0 && ImmOff < (0x1000 << Scale)) || in SelectAddrModeXRO() 1185 isPreferredADD(ImmOff) || isPreferredADD(-ImmOff)) in SelectAddrModeXRO() 5038 int64_t ImmOff = C->getSExtValue(); in SelectSVERegRegAddrMode() local 5043 if (ImmOff % Size) in SelectSVERegRegAddrMode() [all …]
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/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelDAGToDAG.cpp | 1136 static bool isPreferredADD(int64_t ImmOff) { 1138 if ((ImmOff & 0xfffffffffffff000LL) == 0x0LL) 1141 if ((ImmOff & 0xffffffffff000fffLL) == 0x0LL) 1143 return (ImmOff & 0xffffffffff00ffffLL) != 0x0LL && 1144 (ImmOff & 0xffffffffffff0fffLL) != 0x0LL; 1179 int64_t ImmOff = (int64_t)cast<ConstantSDNode>(RHS)->getZExtValue(); 1184 if ((ImmOff % Size == 0 && ImmOff >= 0 && ImmOff < (0x1000 << Scale)) || 1185 isPreferredADD(ImmOff) || isPreferredADD(-ImmOff)) 5038 int64_t ImmOff = C->getSExtValue(); 5043 if (ImmOff % Size) [all …]
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/dports/devel/llvm90/llvm-9.0.1.src/lib/Target/AArch64/ |
H A D | AArch64ISelDAGToDAG.cpp | 972 static bool isPreferredADD(int64_t ImmOff) { in isPreferredADD() argument 974 if ((ImmOff & 0xfffffffffffff000LL) == 0x0LL) in isPreferredADD() 977 if ((ImmOff & 0xffffffffff000fffLL) == 0x0LL) in isPreferredADD() 979 return (ImmOff & 0xffffffffff00ffffLL) != 0x0LL && in isPreferredADD() 980 (ImmOff & 0xffffffffffff0fffLL) != 0x0LL; in isPreferredADD() 1015 int64_t ImmOff = (int64_t)cast<ConstantSDNode>(RHS)->getZExtValue(); in SelectAddrModeXRO() local 1020 if ((ImmOff % Size == 0 && ImmOff >= 0 && ImmOff < (0x1000 << Scale)) || in SelectAddrModeXRO() 1021 isPreferredADD(ImmOff) || isPreferredADD(-ImmOff)) in SelectAddrModeXRO()
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/dports/devel/llvm80/llvm-8.0.1.src/lib/Target/AArch64/ |
H A D | AArch64ISelDAGToDAG.cpp | 941 static bool isPreferredADD(int64_t ImmOff) { in isPreferredADD() argument 943 if ((ImmOff & 0xfffffffffffff000LL) == 0x0LL) in isPreferredADD() 946 if ((ImmOff & 0xffffffffff000fffLL) == 0x0LL) in isPreferredADD() 948 return (ImmOff & 0xffffffffff00ffffLL) != 0x0LL && in isPreferredADD() 949 (ImmOff & 0xffffffffffff0fffLL) != 0x0LL; in isPreferredADD() 984 int64_t ImmOff = (int64_t)cast<ConstantSDNode>(RHS)->getZExtValue(); in SelectAddrModeXRO() local 989 if ((ImmOff % Size == 0 && ImmOff >= 0 && ImmOff < (0x1000 << Scale)) || in SelectAddrModeXRO() 990 isPreferredADD(ImmOff) || isPreferredADD(-ImmOff)) in SelectAddrModeXRO()
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/dports/devel/llvm70/llvm-7.0.1.src/lib/Target/AArch64/ |
H A D | AArch64ISelDAGToDAG.cpp | 941 static bool isPreferredADD(int64_t ImmOff) { 943 if ((ImmOff & 0xfffffffffffff000LL) == 0x0LL) 946 if ((ImmOff & 0xffffffffff000fffLL) == 0x0LL) 948 return (ImmOff & 0xffffffffff00ffffLL) != 0x0LL && 949 (ImmOff & 0xffffffffffff0fffLL) != 0x0LL; 984 int64_t ImmOff = (int64_t)cast<ConstantSDNode>(RHS)->getZExtValue(); 989 if ((ImmOff % Size == 0 && ImmOff >= 0 && ImmOff < (0x1000 << Scale)) || 990 isPreferredADD(ImmOff) || isPreferredADD(-ImmOff))
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/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/lib/Target/AArch64/GISel/ |
H A D | AArch64InstructionSelector.cpp | 5149 int64_t ImmOff = ValAndVReg->Value; in selectAddrModeXRO() local 5153 if (ImmOff % SizeInBytes == 0 && ImmOff >= 0 && in selectAddrModeXRO() 5154 ImmOff < (0x1000 << Scale)) in selectAddrModeXRO() 5158 auto isPreferredADD = [](int64_t ImmOff) { in selectAddrModeXRO() argument 5160 if ((ImmOff & 0xfffffffffffff000LL) == 0x0LL) in selectAddrModeXRO() 5164 if ((ImmOff & 0xffffffffff000fffLL) != 0x0LL) in selectAddrModeXRO() 5170 return (ImmOff & 0xffffffffff00ffffLL) != 0x0LL && in selectAddrModeXRO() 5171 (ImmOff & 0xffffffffffff0fffLL) != 0x0LL; in selectAddrModeXRO() 5175 if (isPreferredADD(ImmOff) || isPreferredADD(-ImmOff)) in selectAddrModeXRO()
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/dports/devel/llvm10/llvm-10.0.1.src/lib/Target/AArch64/ |
H A D | AArch64ISelDAGToDAG.cpp | 1029 static bool isPreferredADD(int64_t ImmOff) { in isPreferredADD() argument 1031 if ((ImmOff & 0xfffffffffffff000LL) == 0x0LL) in isPreferredADD() 1034 if ((ImmOff & 0xffffffffff000fffLL) == 0x0LL) in isPreferredADD() 1036 return (ImmOff & 0xffffffffff00ffffLL) != 0x0LL && in isPreferredADD() 1037 (ImmOff & 0xffffffffffff0fffLL) != 0x0LL; in isPreferredADD() 1072 int64_t ImmOff = (int64_t)cast<ConstantSDNode>(RHS)->getZExtValue(); in SelectAddrModeXRO() local 1077 if ((ImmOff % Size == 0 && ImmOff >= 0 && ImmOff < (0x1000 << Scale)) || in SelectAddrModeXRO() 1078 isPreferredADD(ImmOff) || isPreferredADD(-ImmOff)) in SelectAddrModeXRO()
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/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelDAGToDAG.cpp | 1029 static bool isPreferredADD(int64_t ImmOff) { in isPreferredADD() argument 1031 if ((ImmOff & 0xfffffffffffff000LL) == 0x0LL) in isPreferredADD() 1034 if ((ImmOff & 0xffffffffff000fffLL) == 0x0LL) in isPreferredADD() 1036 return (ImmOff & 0xffffffffff00ffffLL) != 0x0LL && in isPreferredADD() 1037 (ImmOff & 0xffffffffffff0fffLL) != 0x0LL; in isPreferredADD() 1072 int64_t ImmOff = (int64_t)cast<ConstantSDNode>(RHS)->getZExtValue(); in SelectAddrModeXRO() local 1077 if ((ImmOff % Size == 0 && ImmOff >= 0 && ImmOff < (0x1000 << Scale)) || in SelectAddrModeXRO() 1078 isPreferredADD(ImmOff) || isPreferredADD(-ImmOff)) in SelectAddrModeXRO()
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/dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelDAGToDAG.cpp | 1029 static bool isPreferredADD(int64_t ImmOff) { in isPreferredADD() argument 1031 if ((ImmOff & 0xfffffffffffff000LL) == 0x0LL) in isPreferredADD() 1034 if ((ImmOff & 0xffffffffff000fffLL) == 0x0LL) in isPreferredADD() 1036 return (ImmOff & 0xffffffffff00ffffLL) != 0x0LL && in isPreferredADD() 1037 (ImmOff & 0xffffffffffff0fffLL) != 0x0LL; in isPreferredADD() 1072 int64_t ImmOff = (int64_t)cast<ConstantSDNode>(RHS)->getZExtValue(); in SelectAddrModeXRO() local 1077 if ((ImmOff % Size == 0 && ImmOff >= 0 && ImmOff < (0x1000 << Scale)) || in SelectAddrModeXRO() 1078 isPreferredADD(ImmOff) || isPreferredADD(-ImmOff)) in SelectAddrModeXRO()
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/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelDAGToDAG.cpp | 1099 static bool isPreferredADD(int64_t ImmOff) { in isPreferredADD() argument 1101 if ((ImmOff & 0xfffffffffffff000LL) == 0x0LL) in isPreferredADD() 1104 if ((ImmOff & 0xffffffffff000fffLL) == 0x0LL) in isPreferredADD() 1106 return (ImmOff & 0xffffffffff00ffffLL) != 0x0LL && in isPreferredADD() 1107 (ImmOff & 0xffffffffffff0fffLL) != 0x0LL; in isPreferredADD() 1142 int64_t ImmOff = (int64_t)cast<ConstantSDNode>(RHS)->getZExtValue(); in SelectAddrModeXRO() local 1147 if ((ImmOff % Size == 0 && ImmOff >= 0 && ImmOff < (0x1000 << Scale)) || in SelectAddrModeXRO() 1148 isPreferredADD(ImmOff) || isPreferredADD(-ImmOff)) in SelectAddrModeXRO()
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/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelDAGToDAG.cpp | 1094 static bool isPreferredADD(int64_t ImmOff) { in isPreferredADD() argument 1096 if ((ImmOff & 0xfffffffffffff000LL) == 0x0LL) in isPreferredADD() 1099 if ((ImmOff & 0xffffffffff000fffLL) == 0x0LL) in isPreferredADD() 1101 return (ImmOff & 0xffffffffff00ffffLL) != 0x0LL && in isPreferredADD() 1102 (ImmOff & 0xffffffffffff0fffLL) != 0x0LL; in isPreferredADD() 1137 int64_t ImmOff = (int64_t)cast<ConstantSDNode>(RHS)->getZExtValue(); in SelectAddrModeXRO() local 1142 if ((ImmOff % Size == 0 && ImmOff >= 0 && ImmOff < (0x1000 << Scale)) || in SelectAddrModeXRO() 1143 isPreferredADD(ImmOff) || isPreferredADD(-ImmOff)) in SelectAddrModeXRO()
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/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/lib/Target/AArch64/GISel/ |
H A D | AArch64InstructionSelector.cpp | 5594 int64_t ImmOff = ValAndVReg->Value.getSExtValue(); in selectAddrModeXRO() local 5598 if (ImmOff % SizeInBytes == 0 && ImmOff >= 0 && in selectAddrModeXRO() 5599 ImmOff < (0x1000 << Scale)) in selectAddrModeXRO() 5603 auto isPreferredADD = [](int64_t ImmOff) { in selectAddrModeXRO() argument 5605 if ((ImmOff & 0xfffffffffffff000LL) == 0x0LL) in selectAddrModeXRO() 5609 if ((ImmOff & 0xffffffffff000fffLL) != 0x0LL) in selectAddrModeXRO() 5615 return (ImmOff & 0xffffffffff00ffffLL) != 0x0LL && in selectAddrModeXRO() 5616 (ImmOff & 0xffffffffffff0fffLL) != 0x0LL; in selectAddrModeXRO() 5620 if (isPreferredADD(ImmOff) || isPreferredADD(-ImmOff)) in selectAddrModeXRO()
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/dports/graphics/llvm-mesa/llvm-13.0.1.src/lib/Target/AArch64/GISel/ |
H A D | AArch64InstructionSelector.cpp | 5594 int64_t ImmOff = ValAndVReg->Value.getSExtValue(); in selectAddrModeXRO() local 5598 if (ImmOff % SizeInBytes == 0 && ImmOff >= 0 && in selectAddrModeXRO() 5599 ImmOff < (0x1000 << Scale)) in selectAddrModeXRO() 5603 auto isPreferredADD = [](int64_t ImmOff) { in selectAddrModeXRO() argument 5605 if ((ImmOff & 0xfffffffffffff000LL) == 0x0LL) in selectAddrModeXRO() 5609 if ((ImmOff & 0xffffffffff000fffLL) != 0x0LL) in selectAddrModeXRO() 5615 return (ImmOff & 0xffffffffff00ffffLL) != 0x0LL && in selectAddrModeXRO() 5616 (ImmOff & 0xffffffffffff0fffLL) != 0x0LL; in selectAddrModeXRO() 5620 if (isPreferredADD(ImmOff) || isPreferredADD(-ImmOff)) in selectAddrModeXRO()
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/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelDAGToDAG.cpp | 1099 static bool isPreferredADD(int64_t ImmOff) { in isPreferredADD() argument 1101 if ((ImmOff & 0xfffffffffffff000LL) == 0x0LL) in isPreferredADD() 1104 if ((ImmOff & 0xffffffffff000fffLL) == 0x0LL) in isPreferredADD() 1106 return (ImmOff & 0xffffffffff00ffffLL) != 0x0LL && in isPreferredADD() 1107 (ImmOff & 0xffffffffffff0fffLL) != 0x0LL; in isPreferredADD() 1142 int64_t ImmOff = (int64_t)cast<ConstantSDNode>(RHS)->getZExtValue(); in SelectAddrModeXRO() local 1147 if ((ImmOff % Size == 0 && ImmOff >= 0 && ImmOff < (0x1000 << Scale)) || in SelectAddrModeXRO() 1148 isPreferredADD(ImmOff) || isPreferredADD(-ImmOff)) in SelectAddrModeXRO()
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/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/lib/Target/AArch64/GISel/ |
H A D | AArch64InstructionSelector.cpp | 5415 int64_t ImmOff = ValAndVReg->Value.getSExtValue(); in selectAddrModeXRO() local 5419 if (ImmOff % SizeInBytes == 0 && ImmOff >= 0 && in selectAddrModeXRO() 5420 ImmOff < (0x1000 << Scale)) in selectAddrModeXRO() 5424 auto isPreferredADD = [](int64_t ImmOff) { in selectAddrModeXRO() argument 5426 if ((ImmOff & 0xfffffffffffff000LL) == 0x0LL) in selectAddrModeXRO() 5430 if ((ImmOff & 0xffffffffff000fffLL) != 0x0LL) in selectAddrModeXRO() 5436 return (ImmOff & 0xffffffffff00ffffLL) != 0x0LL && in selectAddrModeXRO() 5437 (ImmOff & 0xffffffffffff0fffLL) != 0x0LL; in selectAddrModeXRO() 5441 if (isPreferredADD(ImmOff) || isPreferredADD(-ImmOff)) in selectAddrModeXRO()
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/dports/devel/llvm11/llvm-11.0.1.src/lib/Target/AArch64/ |
H A D | AArch64ISelDAGToDAG.cpp | 1093 static bool isPreferredADD(int64_t ImmOff) { in isPreferredADD() argument 1095 if ((ImmOff & 0xfffffffffffff000LL) == 0x0LL) in isPreferredADD() 1098 if ((ImmOff & 0xffffffffff000fffLL) == 0x0LL) in isPreferredADD() 1100 return (ImmOff & 0xffffffffff00ffffLL) != 0x0LL && in isPreferredADD() 1101 (ImmOff & 0xffffffffffff0fffLL) != 0x0LL; in isPreferredADD() 1136 int64_t ImmOff = (int64_t)cast<ConstantSDNode>(RHS)->getZExtValue(); in SelectAddrModeXRO() local 1141 if ((ImmOff % Size == 0 && ImmOff >= 0 && ImmOff < (0x1000 << Scale)) || in SelectAddrModeXRO() 1142 isPreferredADD(ImmOff) || isPreferredADD(-ImmOff)) in SelectAddrModeXRO()
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/dports/lang/rust/rustc-1.58.1-src/src/llvm-project/llvm/lib/Target/AArch64/GISel/ |
H A D | AArch64InstructionSelector.cpp | 5594 int64_t ImmOff = ValAndVReg->Value.getSExtValue(); in selectAddrModeXRO() local 5598 if (ImmOff % SizeInBytes == 0 && ImmOff >= 0 && in selectAddrModeXRO() 5599 ImmOff < (0x1000 << Scale)) in selectAddrModeXRO() 5603 auto isPreferredADD = [](int64_t ImmOff) { in selectAddrModeXRO() argument 5605 if ((ImmOff & 0xfffffffffffff000LL) == 0x0LL) in selectAddrModeXRO() 5609 if ((ImmOff & 0xffffffffff000fffLL) != 0x0LL) in selectAddrModeXRO() 5615 return (ImmOff & 0xffffffffff00ffffLL) != 0x0LL && in selectAddrModeXRO() 5616 (ImmOff & 0xffffffffffff0fffLL) != 0x0LL; in selectAddrModeXRO() 5620 if (isPreferredADD(ImmOff) || isPreferredADD(-ImmOff)) in selectAddrModeXRO()
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/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/lib/Target/AArch64/GISel/ |
H A D | AArch64InstructionSelector.cpp | 5594 int64_t ImmOff = ValAndVReg->Value.getSExtValue(); in selectAddrModeXRO() local 5598 if (ImmOff % SizeInBytes == 0 && ImmOff >= 0 && in selectAddrModeXRO() 5599 ImmOff < (0x1000 << Scale)) in selectAddrModeXRO() 5603 auto isPreferredADD = [](int64_t ImmOff) { in selectAddrModeXRO() argument 5605 if ((ImmOff & 0xfffffffffffff000LL) == 0x0LL) in selectAddrModeXRO() 5609 if ((ImmOff & 0xffffffffff000fffLL) != 0x0LL) in selectAddrModeXRO() 5615 return (ImmOff & 0xffffffffff00ffffLL) != 0x0LL && in selectAddrModeXRO() 5616 (ImmOff & 0xffffffffffff0fffLL) != 0x0LL; in selectAddrModeXRO() 5620 if (isPreferredADD(ImmOff) || isPreferredADD(-ImmOff)) in selectAddrModeXRO()
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/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/lib/Target/AArch64/GISel/ |
H A D | AArch64InstructionSelector.cpp | 5415 int64_t ImmOff = ValAndVReg->Value.getSExtValue(); in selectAddrModeXRO() local 5419 if (ImmOff % SizeInBytes == 0 && ImmOff >= 0 && in selectAddrModeXRO() 5420 ImmOff < (0x1000 << Scale)) in selectAddrModeXRO() 5424 auto isPreferredADD = [](int64_t ImmOff) { in selectAddrModeXRO() argument 5426 if ((ImmOff & 0xfffffffffffff000LL) == 0x0LL) in selectAddrModeXRO() 5430 if ((ImmOff & 0xffffffffff000fffLL) != 0x0LL) in selectAddrModeXRO() 5436 return (ImmOff & 0xffffffffff00ffffLL) != 0x0LL && in selectAddrModeXRO() 5437 (ImmOff & 0xffffffffffff0fffLL) != 0x0LL; in selectAddrModeXRO() 5441 if (isPreferredADD(ImmOff) || isPreferredADD(-ImmOff)) in selectAddrModeXRO()
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/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelDAGToDAG.cpp | 1099 static bool isPreferredADD(int64_t ImmOff) { in isPreferredADD() argument 1101 if ((ImmOff & 0xfffffffffffff000LL) == 0x0LL) in isPreferredADD() 1104 if ((ImmOff & 0xffffffffff000fffLL) == 0x0LL) in isPreferredADD() 1106 return (ImmOff & 0xffffffffff00ffffLL) != 0x0LL && in isPreferredADD() 1107 (ImmOff & 0xffffffffffff0fffLL) != 0x0LL; in isPreferredADD() 1142 int64_t ImmOff = (int64_t)cast<ConstantSDNode>(RHS)->getZExtValue(); in SelectAddrModeXRO() local 1147 if ((ImmOff % Size == 0 && ImmOff >= 0 && ImmOff < (0x1000 << Scale)) || in SelectAddrModeXRO() 1148 isPreferredADD(ImmOff) || isPreferredADD(-ImmOff)) in SelectAddrModeXRO()
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