/dports/games/retroarch/RetroArch-1.9.7/wii/libogc/libogc/ |
H A D | cache_asm.S | 311 mfspr r3,L2CR; 314 mtspr L2CR,r3 321 mfspr r3,L2CR 323 mtspr L2CR,r3 333 mfspr r3,L2CR 335 mtspr L2CR,r3 336 1: mfspr r3,L2CR 340 mfspr r3,L2CR 342 mtspr L2CR,r3 343 2: mfspr r3,L2CR
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H A D | system_asm.S | 236 mfspr r3, L2CR
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/dports/devel/gdb761/gdb-7.6.1/sim/ppc/ |
H A D | ppc-spr-table | 87 L2CR:1017:0:0
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/dports/devel/zpu-gcc/zpu-toolchain-1.0/toolchain/gdb/sim/ppc/ |
H A D | ppc-spr-table | 86 L2CR:1017:0:0
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/dports/devel/avr-gdb/gdb-7.3.1/sim/ppc/ |
H A D | ppc-spr-table | 88 L2CR:1017:0:0
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/dports/devel/zpu-binutils/zpu-toolchain-1.0/toolchain/gdb/sim/ppc/ |
H A D | ppc-spr-table | 86 L2CR:1017:0:0
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/dports/games/retroarch/RetroArch-1.9.7/wii/libogc/include/ogc/machine/ |
H A D | asm.h | 314 #define L2CR 1017 macro
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/dports/emulators/fs-uae/fs-uae-3.1.35/src/ppc/pearpc/cpu/ |
H A D | common.h | 314 #define L2CR 1017 /* L2 Cache control */ macro
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/dports/lang/fpc-source/fpc-3.2.2/packages/libogcfpc/src/ogc/machine/ |
H A D | asm.inc | 299 L2CR = 1017;
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/dports/emulators/qemu60/qemu-6.0.0/roms/openbios/include/arch/ppc/ |
H A D | processor.h | 347 #define L2CR S_L2CR /* PPC 750 L2 control register */ macro
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/dports/emulators/qemu42/qemu-4.2.1/roms/openbios/include/arch/ppc/ |
H A D | processor.h | 347 #define L2CR S_L2CR /* PPC 750 L2 control register */ macro
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/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/roms/openbios/include/arch/ppc/ |
H A D | processor.h | 347 #define L2CR S_L2CR /* PPC 750 L2 control register */ macro
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/dports/emulators/qemu-utils/qemu-4.2.1/roms/openbios/include/arch/ppc/ |
H A D | processor.h | 347 #define L2CR S_L2CR /* PPC 750 L2 control register */ macro
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/dports/emulators/qemu5/qemu-5.2.0/roms/openbios/include/arch/ppc/ |
H A D | processor.h | 347 #define L2CR S_L2CR /* PPC 750 L2 control register */ macro
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/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/openbios/include/arch/ppc/ |
H A D | processor.h | 347 #define L2CR S_L2CR /* PPC 750 L2 control register */ macro
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/dports/emulators/qemu/qemu-6.2.0/roms/openbios/include/arch/ppc/ |
H A D | processor.h | 347 #define L2CR S_L2CR /* PPC 750 L2 control register */ macro
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/dports/sysutils/u-boot-olinuxino-lime2-emmc/u-boot-2021.07/arch/powerpc/include/asm/ |
H A D | processor.h | 650 #define L2CR SPRN_L2CR /* PPC 750 L2 control register */ macro
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/dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/arch/powerpc/include/asm/ |
H A D | processor.h | 650 #define L2CR SPRN_L2CR /* PPC 750 L2 control register */ macro
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/dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/arch/powerpc/include/asm/ |
H A D | processor.h | 650 #define L2CR SPRN_L2CR /* PPC 750 L2 control register */ macro
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/dports/sysutils/u-boot-chip/u-boot-2021.07/arch/powerpc/include/asm/ |
H A D | processor.h | 650 #define L2CR SPRN_L2CR /* PPC 750 L2 control register */ macro
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/dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/arch/powerpc/include/asm/ |
H A D | processor.h | 650 #define L2CR SPRN_L2CR /* PPC 750 L2 control register */ macro
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/dports/sysutils/u-boot-firefly-rk3399/u-boot-2021.07/arch/powerpc/include/asm/ |
H A D | processor.h | 650 #define L2CR SPRN_L2CR /* PPC 750 L2 control register */ macro
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/dports/sysutils/u-boot-sopine/u-boot-2021.07/arch/powerpc/include/asm/ |
H A D | processor.h | 650 #define L2CR SPRN_L2CR /* PPC 750 L2 control register */ macro
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/dports/sysutils/u-boot-sinovoip-bpi-m3/u-boot-2021.07/arch/powerpc/include/asm/ |
H A D | processor.h | 650 #define L2CR SPRN_L2CR /* PPC 750 L2 control register */ macro
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/dports/sysutils/u-boot-a13-olinuxino/u-boot-2021.07/arch/powerpc/include/asm/ |
H A D | processor.h | 650 #define L2CR SPRN_L2CR /* PPC 750 L2 control register */ macro
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