| /dports/multimedia/v4l-utils/linux-5.13-rc2/arch/powerpc/kernel/ |
| H A D | cpu_setup_fsl_booke.S | 304 ori r3, r3, L2CSR0_L2FL@l
312 andi. r3, r3, L2CSR0_L2FL@l
|
| /dports/multimedia/v4l_compat/linux-5.13-rc2/arch/powerpc/kernel/ |
| H A D | cpu_setup_fsl_booke.S | 304 ori r3, r3, L2CSR0_L2FL@l
312 andi. r3, r3, L2CSR0_L2FL@l
|
| /dports/multimedia/libv4l/linux-5.13-rc2/arch/powerpc/kernel/ |
| H A D | cpu_setup_fsl_booke.S | 304 ori r3, r3, L2CSR0_L2FL@l
312 andi. r3, r3, L2CSR0_L2FL@l
|
| /dports/multimedia/v4l-utils/linux-5.13-rc2/arch/powerpc/include/asm/ |
| H A D | reg_booke.h | 612 #define L2CSR0_L2FL 0x00000800 /* L2 Cache Flush */ macro
|
| /dports/multimedia/v4l_compat/linux-5.13-rc2/arch/powerpc/include/asm/ |
| H A D | reg_booke.h | 612 #define L2CSR0_L2FL 0x00000800 /* L2 Cache Flush */ macro
|
| /dports/multimedia/libv4l/linux-5.13-rc2/arch/powerpc/include/asm/ |
| H A D | reg_booke.h | 612 #define L2CSR0_L2FL 0x00000800 /* L2 Cache Flush */ macro
|
| /dports/sysutils/u-boot-utilite/u-boot-2015.07/arch/powerpc/cpu/mpc85xx/ |
| H A D | start.S | 143 lis r2,(L2CSR0_L2FL)@h
144 ori r2, r2, (L2CSR0_L2FL)@l
|
| /dports/sysutils/u-boot-olinuxino-lime2-emmc/u-boot-2021.07/arch/powerpc/include/asm/ |
| H A D | processor.h | 518 #define L2CSR0_L2FL 0x00000800 /* L2 Cache Flush */ macro
|
| /dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/arch/powerpc/include/asm/ |
| H A D | processor.h | 518 #define L2CSR0_L2FL 0x00000800 /* L2 Cache Flush */ macro
|
| /dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/arch/powerpc/include/asm/ |
| H A D | processor.h | 518 #define L2CSR0_L2FL 0x00000800 /* L2 Cache Flush */ macro
|
| /dports/sysutils/u-boot-chip/u-boot-2021.07/arch/powerpc/include/asm/ |
| H A D | processor.h | 518 #define L2CSR0_L2FL 0x00000800 /* L2 Cache Flush */ macro
|
| /dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/arch/powerpc/include/asm/ |
| H A D | processor.h | 518 #define L2CSR0_L2FL 0x00000800 /* L2 Cache Flush */ macro
|
| /dports/sysutils/u-boot-firefly-rk3399/u-boot-2021.07/arch/powerpc/include/asm/ |
| H A D | processor.h | 518 #define L2CSR0_L2FL 0x00000800 /* L2 Cache Flush */ macro
|
| /dports/sysutils/u-boot-sopine/u-boot-2021.07/arch/powerpc/include/asm/ |
| H A D | processor.h | 518 #define L2CSR0_L2FL 0x00000800 /* L2 Cache Flush */ macro
|
| /dports/sysutils/u-boot-sinovoip-bpi-m3/u-boot-2021.07/arch/powerpc/include/asm/ |
| H A D | processor.h | 518 #define L2CSR0_L2FL 0x00000800 /* L2 Cache Flush */ macro
|
| /dports/sysutils/u-boot-a13-olinuxino/u-boot-2021.07/arch/powerpc/include/asm/ |
| H A D | processor.h | 518 #define L2CSR0_L2FL 0x00000800 /* L2 Cache Flush */ macro
|
| /dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/arch/powerpc/include/asm/ |
| H A D | processor.h | 518 #define L2CSR0_L2FL 0x00000800 /* L2 Cache Flush */ macro
|
| /dports/sysutils/u-boot-sopine-spi/u-boot-2021.07/arch/powerpc/include/asm/ |
| H A D | processor.h | 518 #define L2CSR0_L2FL 0x00000800 /* L2 Cache Flush */ macro
|
| /dports/sysutils/u-boot-qemu-arm64/u-boot-2021.07/arch/powerpc/include/asm/ |
| H A D | processor.h | 518 #define L2CSR0_L2FL 0x00000800 /* L2 Cache Flush */ macro
|
| /dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/arch/powerpc/include/asm/ |
| H A D | processor.h | 518 #define L2CSR0_L2FL 0x00000800 /* L2 Cache Flush */ macro
|
| /dports/sysutils/u-boot-nanopi-neo/u-boot-2021.07/arch/powerpc/include/asm/ |
| H A D | processor.h | 518 #define L2CSR0_L2FL 0x00000800 /* L2 Cache Flush */ macro
|
| /dports/sysutils/u-boot-nanopi-r4s/u-boot-2021.07/arch/powerpc/include/asm/ |
| H A D | processor.h | 518 #define L2CSR0_L2FL 0x00000800 /* L2 Cache Flush */ macro
|
| /dports/sysutils/u-boot-bananapi/u-boot-2021.07/arch/powerpc/include/asm/ |
| H A D | processor.h | 518 #define L2CSR0_L2FL 0x00000800 /* L2 Cache Flush */ macro
|
| /dports/sysutils/u-boot-clearfog/u-boot-2021.07/arch/powerpc/include/asm/ |
| H A D | processor.h | 518 #define L2CSR0_L2FL 0x00000800 /* L2 Cache Flush */ macro
|
| /dports/sysutils/u-boot-cubieboard2/u-boot-2021.07/arch/powerpc/include/asm/ |
| H A D | processor.h | 518 #define L2CSR0_L2FL 0x00000800 /* L2 Cache Flush */ macro
|