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Searched refs:L2RAM_PIPELINE_LATE (Results 1 – 2 of 2) sorted by relevance

/dports/misc/rump/buildrump.sh-b914579/src/sys/arch/powerpc/include/oea/
H A Dspr.h202 #define L2RAM_PIPELINE_LATE 0x01800000 macro
/dports/emulators/gxemul/gxemul-0.6.3/src/include/thirdparty/
H A Dppc_spr.h420 #define L2RAM_PIPELINE_LATE 0x01800000 macro