/dports/devel/openwince-include/include-0.4.2/arm/sa11x0/ |
H A D | lcd.h | 77 #define LCCR2 LCD_pointer->lccr2 macro
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/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/video/fbdev/ |
H A D | sa1100fb.h | 22 #define LCCR2 0x0024 /* LCD Control Reg. 2 */ macro
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/dports/multimedia/libv4l/linux-5.13-rc2/drivers/video/fbdev/ |
H A D | sa1100fb.h | 22 #define LCCR2 0x0024 /* LCD Control Reg. 2 */ macro
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/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/video/fbdev/ |
H A D | sa1100fb.h | 22 #define LCCR2 0x0024 /* LCD Control Reg. 2 */ macro
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/dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot-sam460ex/arch/arm/cpu/pxa/ |
H A D | pxafb.c | 359 LCCR2 = vid->pxa.reg_lccr2; in pxafb_enable_controller() 372 debug("LCCR2 = 0x%08x\n", (unsigned int)LCCR2); in pxafb_enable_controller()
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/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot-sam460ex/arch/arm/cpu/pxa/ |
H A D | pxafb.c | 359 LCCR2 = vid->pxa.reg_lccr2; in pxafb_enable_controller() 372 debug("LCCR2 = 0x%08x\n", (unsigned int)LCCR2); in pxafb_enable_controller()
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/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot-sam460ex/arch/arm/cpu/pxa/ |
H A D | pxafb.c | 359 LCCR2 = vid->pxa.reg_lccr2; in pxafb_enable_controller() 372 debug("LCCR2 = 0x%08x\n", (unsigned int)LCCR2); in pxafb_enable_controller()
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/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/roms/u-boot-sam460ex/arch/arm/cpu/pxa/ |
H A D | pxafb.c | 359 LCCR2 = vid->pxa.reg_lccr2; in pxafb_enable_controller() 372 debug("LCCR2 = 0x%08x\n", (unsigned int)LCCR2); in pxafb_enable_controller()
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/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot-sam460ex/arch/arm/cpu/pxa/ |
H A D | pxafb.c | 359 LCCR2 = vid->pxa.reg_lccr2; in pxafb_enable_controller() 372 debug("LCCR2 = 0x%08x\n", (unsigned int)LCCR2); in pxafb_enable_controller()
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/dports/emulators/qemu/qemu-6.2.0/roms/u-boot-sam460ex/arch/arm/cpu/pxa/ |
H A D | pxafb.c | 359 LCCR2 = vid->pxa.reg_lccr2; in pxafb_enable_controller() 372 debug("LCCR2 = 0x%08x\n", (unsigned int)LCCR2); in pxafb_enable_controller()
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/dports/emulators/qemu60/qemu-6.0.0/roms/u-boot-sam460ex/arch/arm/cpu/pxa/ |
H A D | pxafb.c | 359 LCCR2 = vid->pxa.reg_lccr2; in pxafb_enable_controller() 372 debug("LCCR2 = 0x%08x\n", (unsigned int)LCCR2); in pxafb_enable_controller()
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/dports/devel/directfb/DirectFB-1.4.17/gfxdrivers/pxa3xx/ |
H A D | pxa3xx_regs.h | 45 #define LCCR2 (PXA3XX_LCD_BASE + 0x0008) macro
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/dports/multimedia/v4l-utils/linux-5.13-rc2/arch/arm/mach-pxa/include/mach/ |
H A D | regs-lcd.h | 12 #define LCCR2 (0x008) /* LCD Controller Control Register 2 */ macro
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/dports/multimedia/v4l_compat/linux-5.13-rc2/arch/arm/mach-pxa/include/mach/ |
H A D | regs-lcd.h | 12 #define LCCR2 (0x008) /* LCD Controller Control Register 2 */ macro
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/dports/multimedia/libv4l/linux-5.13-rc2/arch/arm/mach-pxa/include/mach/ |
H A D | regs-lcd.h | 12 #define LCCR2 (0x008) /* LCD Controller Control Register 2 */ macro
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/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/drivers/video/ |
H A D | pxa_lcd.c | 498 writel(vid->pxa.reg_lccr2, LCCR2); in pxafb_enable_controller() 515 debug("LCCR2 = 0x%08x\n", readl(LCCR2)); in pxafb_enable_controller()
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/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/drivers/video/ |
H A D | pxa_lcd.c | 498 writel(vid->pxa.reg_lccr2, LCCR2); in pxafb_enable_controller() 515 debug("LCCR2 = 0x%08x\n", readl(LCCR2)); in pxafb_enable_controller()
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/dports/sysutils/u-boot-nanopi-neo2/u-boot-2021.07/drivers/video/ |
H A D | pxa_lcd.c | 499 writel(vid->pxa.reg_lccr2, LCCR2); in pxafb_enable_controller() 516 debug("LCCR2 = 0x%08x\n", readl(LCCR2)); in pxafb_enable_controller()
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/dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/drivers/video/ |
H A D | pxa_lcd.c | 499 writel(vid->pxa.reg_lccr2, LCCR2); in pxafb_enable_controller() 516 debug("LCCR2 = 0x%08x\n", readl(LCCR2)); in pxafb_enable_controller()
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/dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/drivers/video/ |
H A D | pxa_lcd.c | 499 writel(vid->pxa.reg_lccr2, LCCR2); in pxafb_enable_controller() 516 debug("LCCR2 = 0x%08x\n", readl(LCCR2)); in pxafb_enable_controller()
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/dports/sysutils/u-boot-chip/u-boot-2021.07/drivers/video/ |
H A D | pxa_lcd.c | 499 writel(vid->pxa.reg_lccr2, LCCR2); in pxafb_enable_controller() 516 debug("LCCR2 = 0x%08x\n", readl(LCCR2)); in pxafb_enable_controller()
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/dports/sysutils/u-boot-cubieboard2/u-boot-2021.07/drivers/video/ |
H A D | pxa_lcd.c | 499 writel(vid->pxa.reg_lccr2, LCCR2); in pxafb_enable_controller() 516 debug("LCCR2 = 0x%08x\n", readl(LCCR2)); in pxafb_enable_controller()
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/dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/drivers/video/ |
H A D | pxa_lcd.c | 499 writel(vid->pxa.reg_lccr2, LCCR2); in pxafb_enable_controller() 516 debug("LCCR2 = 0x%08x\n", readl(LCCR2)); in pxafb_enable_controller()
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/dports/sysutils/u-boot-firefly-rk3399/u-boot-2021.07/drivers/video/ |
H A D | pxa_lcd.c | 499 writel(vid->pxa.reg_lccr2, LCCR2); in pxafb_enable_controller() 516 debug("LCCR2 = 0x%08x\n", readl(LCCR2)); in pxafb_enable_controller()
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/dports/sysutils/u-boot-a13-olinuxino/u-boot-2021.07/drivers/video/ |
H A D | pxa_lcd.c | 499 writel(vid->pxa.reg_lccr2, LCCR2); in pxafb_enable_controller() 516 debug("LCCR2 = 0x%08x\n", readl(LCCR2)); in pxafb_enable_controller()
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